1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2015, 2016 Imagination Technologies Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * IMG Marduk board is also known as Creator Ci40. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "pistachio.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "IMG Marduk (Creator Ci40)"; 14*4882a593Smuzhiyun compatible = "img,pistachio-marduk", "img,pistachio"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun serial0 = &uart0; 18*4882a593Smuzhiyun serial1 = &uart1; 19*4882a593Smuzhiyun ethernet0 = &enet; 20*4882a593Smuzhiyun spi0 = &spfi0; 21*4882a593Smuzhiyun spi1 = &spfi1; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun chosen { 25*4882a593Smuzhiyun bootargs = "root=/dev/sda1 rootwait ro lpj=723968"; 26*4882a593Smuzhiyun stdout-path = "serial1:115200"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun memory { 30*4882a593Smuzhiyun device_type = "memory"; 31*4882a593Smuzhiyun reg = <0x00000000 0x10000000>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun reg_1v8: fixed-regulator { 35*4882a593Smuzhiyun compatible = "regulator-fixed"; 36*4882a593Smuzhiyun regulator-name = "aux_adc_vref"; 37*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 38*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 39*4882a593Smuzhiyun regulator-boot-on; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun internal_dac_supply: internal-dac-supply { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun regulator-name = "internal_dac_supply"; 45*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 46*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun leds { 50*4882a593Smuzhiyun compatible = "pwm-leds"; 51*4882a593Smuzhiyun heartbeat { 52*4882a593Smuzhiyun label = "marduk:red:heartbeat"; 53*4882a593Smuzhiyun pwms = <&pwm 3 300000>; 54*4882a593Smuzhiyun max-brightness = <255>; 55*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun keys { 60*4882a593Smuzhiyun compatible = "gpio-keys"; 61*4882a593Smuzhiyun button@1 { 62*4882a593Smuzhiyun label = "Button 1"; 63*4882a593Smuzhiyun linux,code = <0x101>; /* BTN_1 */ 64*4882a593Smuzhiyun gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun button@2 { 67*4882a593Smuzhiyun label = "Button 2"; 68*4882a593Smuzhiyun linux,code = <0x102>; /* BTN_2 */ 69*4882a593Smuzhiyun gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&internal_dac { 75*4882a593Smuzhiyun VDD-supply = <&internal_dac_supply>; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun&spfi1 { 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun pinctrl-0 = <&spim1_pins>, <&spim1_quad_pins>, <&spim1_cs0_pin>, 82*4882a593Smuzhiyun <&spim1_cs1_pin>; 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun cs-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, <&gpio0 1 GPIO_ACTIVE_HIGH>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun flash@0 { 87*4882a593Smuzhiyun compatible = "spansion,s25fl016k", "jedec,spi-nor"; 88*4882a593Smuzhiyun reg = <0>; 89*4882a593Smuzhiyun spi-max-frequency = <50000000>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&uart0 { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun assigned-clock-rates = <114278400>, <1843200>; 96*4882a593Smuzhiyun}; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun&uart1 { 99*4882a593Smuzhiyun status = "okay"; 100*4882a593Smuzhiyun}; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun&usb { 103*4882a593Smuzhiyun status = "okay"; 104*4882a593Smuzhiyun}; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun&enet { 107*4882a593Smuzhiyun status = "okay"; 108*4882a593Smuzhiyun}; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun&pin_enet { 111*4882a593Smuzhiyun drive-strength = <2>; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&pin_enet_phy_clk { 115*4882a593Smuzhiyun drive-strength = <2>; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&sdhost { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun bus-width = <4>; 121*4882a593Smuzhiyun disable-wp; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&pin_sdhost_cmd { 125*4882a593Smuzhiyun drive-strength = <2>; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&pin_sdhost_data { 129*4882a593Smuzhiyun drive-strength = <2>; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&pwm { 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun pinctrl-0 = <&pwmpdm0_pin>, <&pwmpdm1_pin>, <&pwmpdm2_pin>, 136*4882a593Smuzhiyun <&pwmpdm3_pin>; 137*4882a593Smuzhiyun pinctrl-names = "default"; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&adc { 141*4882a593Smuzhiyun status = "okay"; 142*4882a593Smuzhiyun vref-supply = <®_1v8>; 143*4882a593Smuzhiyun adc-reserved-channels = <0x10>; 144*4882a593Smuzhiyun}; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun&i2c2 { 147*4882a593Smuzhiyun status = "okay"; 148*4882a593Smuzhiyun clock-frequency = <400000>; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun tpm@20 { 151*4882a593Smuzhiyun compatible = "infineon,slb9645tt"; 152*4882a593Smuzhiyun reg = <0x20>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&i2c3 { 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun clock-frequency = <400000>; 160*4882a593Smuzhiyun}; 161