xref: /OK3568_Linux_fs/kernel/arch/mips/boot/dts/brcm/bcm6328.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/ {
3*4882a593Smuzhiyun	#address-cells = <1>;
4*4882a593Smuzhiyun	#size-cells = <1>;
5*4882a593Smuzhiyun	compatible = "brcm,bcm6328";
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun	cpus {
8*4882a593Smuzhiyun		#address-cells = <1>;
9*4882a593Smuzhiyun		#size-cells = <0>;
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun		mips-hpt-frequency = <160000000>;
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun		cpu@0 {
14*4882a593Smuzhiyun			compatible = "brcm,bmips4350";
15*4882a593Smuzhiyun			device_type = "cpu";
16*4882a593Smuzhiyun			reg = <0>;
17*4882a593Smuzhiyun		};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun		cpu@1 {
20*4882a593Smuzhiyun			compatible = "brcm,bmips4350";
21*4882a593Smuzhiyun			device_type = "cpu";
22*4882a593Smuzhiyun			reg = <1>;
23*4882a593Smuzhiyun		};
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	clocks {
27*4882a593Smuzhiyun		periph_clk: periph-clk {
28*4882a593Smuzhiyun			compatible = "fixed-clock";
29*4882a593Smuzhiyun			#clock-cells = <0>;
30*4882a593Smuzhiyun			clock-frequency = <50000000>;
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	aliases {
35*4882a593Smuzhiyun		serial0 = &uart0;
36*4882a593Smuzhiyun		serial1 = &uart1;
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	cpu_intc: interrupt-controller {
40*4882a593Smuzhiyun		#address-cells = <0>;
41*4882a593Smuzhiyun		compatible = "mti,cpu-interrupt-controller";
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		interrupt-controller;
44*4882a593Smuzhiyun		#interrupt-cells = <1>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	ubus {
48*4882a593Smuzhiyun		#address-cells = <1>;
49*4882a593Smuzhiyun		#size-cells = <1>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		compatible = "simple-bus";
52*4882a593Smuzhiyun		ranges;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		clkctl: clock-controller@10000004 {
55*4882a593Smuzhiyun			compatible = "brcm,bcm6328-clocks";
56*4882a593Smuzhiyun			reg = <0x10000004 0x4>;
57*4882a593Smuzhiyun			#clock-cells = <1>;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		periph_intc: interrupt-controller@10000020 {
61*4882a593Smuzhiyun			compatible = "brcm,bcm6345-l1-intc";
62*4882a593Smuzhiyun			reg = <0x10000020 0x10>,
63*4882a593Smuzhiyun			      <0x10000030 0x10>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun			interrupt-controller;
66*4882a593Smuzhiyun			#interrupt-cells = <1>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun			interrupt-parent = <&cpu_intc>;
69*4882a593Smuzhiyun			interrupts = <2>, <3>;
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		uart0: serial@10000100 {
73*4882a593Smuzhiyun			compatible = "brcm,bcm6345-uart";
74*4882a593Smuzhiyun			reg = <0x10000100 0x18>;
75*4882a593Smuzhiyun			interrupt-parent = <&periph_intc>;
76*4882a593Smuzhiyun			interrupts = <28>;
77*4882a593Smuzhiyun			clocks = <&periph_clk>;
78*4882a593Smuzhiyun			clock-names = "refclk";
79*4882a593Smuzhiyun			status = "disabled";
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		uart1: serial@10000120 {
83*4882a593Smuzhiyun			compatible = "brcm,bcm6345-uart";
84*4882a593Smuzhiyun			reg = <0x10000120 0x18>;
85*4882a593Smuzhiyun			interrupt-parent = <&periph_intc>;
86*4882a593Smuzhiyun			interrupts = <39>;
87*4882a593Smuzhiyun			clocks = <&periph_clk>;
88*4882a593Smuzhiyun			clock-names = "refclk";
89*4882a593Smuzhiyun			status = "disabled";
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		timer: syscon@10000040 {
93*4882a593Smuzhiyun			compatible = "syscon";
94*4882a593Smuzhiyun			reg = <0x10000040 0x2c>;
95*4882a593Smuzhiyun			native-endian;
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		reboot: syscon-reboot@10000068 {
99*4882a593Smuzhiyun			compatible = "syscon-reboot";
100*4882a593Smuzhiyun			regmap = <&timer>;
101*4882a593Smuzhiyun			offset = <0x28>;
102*4882a593Smuzhiyun			mask = <0x1>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		leds0: led-controller@10000800 {
106*4882a593Smuzhiyun			#address-cells = <1>;
107*4882a593Smuzhiyun			#size-cells = <0>;
108*4882a593Smuzhiyun			compatible = "brcm,bcm6328-leds";
109*4882a593Smuzhiyun			reg = <0x10000800 0x24>;
110*4882a593Smuzhiyun			status = "disabled";
111*4882a593Smuzhiyun		};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		periph_pwr: power-controller@10001848 {
114*4882a593Smuzhiyun			compatible = "brcm,bcm6328-power-controller";
115*4882a593Smuzhiyun			reg = <0x10001848 0x4>;
116*4882a593Smuzhiyun			#power-domain-cells = <1>;
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun		ehci: usb@10002500 {
120*4882a593Smuzhiyun			compatible = "brcm,bcm6328-ehci", "generic-ehci";
121*4882a593Smuzhiyun			reg = <0x10002500 0x100>;
122*4882a593Smuzhiyun			big-endian;
123*4882a593Smuzhiyun			interrupt-parent = <&periph_intc>;
124*4882a593Smuzhiyun			interrupts = <42>;
125*4882a593Smuzhiyun			status = "disabled";
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		ohci: usb@10002600 {
129*4882a593Smuzhiyun			compatible = "brcm,bcm6328-ohci", "generic-ohci";
130*4882a593Smuzhiyun			reg = <0x10002600 0x100>;
131*4882a593Smuzhiyun			big-endian;
132*4882a593Smuzhiyun			no-big-frame-no;
133*4882a593Smuzhiyun			interrupt-parent = <&periph_intc>;
134*4882a593Smuzhiyun			interrupts = <41>;
135*4882a593Smuzhiyun			status = "disabled";
136*4882a593Smuzhiyun		};
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139