1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * 16550 compatible uart based serial debug support for zboot 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include <linux/types.h> 7*4882a593Smuzhiyun #include <linux/serial_reg.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <asm/addrspace.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #if defined(CONFIG_MACH_LOONGSON64) || defined(CONFIG_MIPS_MALTA) 12*4882a593Smuzhiyun #define UART_BASE 0x1fd003f8 13*4882a593Smuzhiyun #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) 14*4882a593Smuzhiyun #endif 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifdef CONFIG_AR7 17*4882a593Smuzhiyun #include <ar7.h> 18*4882a593Smuzhiyun #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset)) 19*4882a593Smuzhiyun #endif 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #ifdef CONFIG_MACH_INGENIC 22*4882a593Smuzhiyun #define INGENIC_UART0_BASE_ADDR 0x10030000 23*4882a593Smuzhiyun #define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset)) 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifdef CONFIG_CPU_XLR 27*4882a593Smuzhiyun #define UART0_BASE 0x1EF14000 28*4882a593Smuzhiyun #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) 29*4882a593Smuzhiyun #define IOTYPE unsigned int 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #ifdef CONFIG_CPU_XLP 33*4882a593Smuzhiyun #define UART0_BASE 0x18030100 34*4882a593Smuzhiyun #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) 35*4882a593Smuzhiyun #define IOTYPE unsigned int 36*4882a593Smuzhiyun #endif 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifndef IOTYPE 39*4882a593Smuzhiyun #define IOTYPE char 40*4882a593Smuzhiyun #endif 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #ifndef PORT 43*4882a593Smuzhiyun #error please define the serial port address for your own machine 44*4882a593Smuzhiyun #endif 45*4882a593Smuzhiyun serial_in(int offset)46*4882a593Smuzhiyunstatic inline unsigned int serial_in(int offset) 47*4882a593Smuzhiyun { 48*4882a593Smuzhiyun return *((volatile IOTYPE *)PORT(offset)) & 0xFF; 49*4882a593Smuzhiyun } 50*4882a593Smuzhiyun serial_out(int offset,int value)51*4882a593Smuzhiyunstatic inline void serial_out(int offset, int value) 52*4882a593Smuzhiyun { 53*4882a593Smuzhiyun *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; 54*4882a593Smuzhiyun } 55*4882a593Smuzhiyun putc(char c)56*4882a593Smuzhiyunvoid putc(char c) 57*4882a593Smuzhiyun { 58*4882a593Smuzhiyun int timeout = 1000000; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) 61*4882a593Smuzhiyun ; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun serial_out(UART_TX, c); 64*4882a593Smuzhiyun } 65