1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun * for more details.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <asm/bootinfo.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <bcm63xx_cs.h>
14*4882a593Smuzhiyun #include <bcm63xx_cpu.h>
15*4882a593Smuzhiyun #include <bcm63xx_dev_pcmcia.h>
16*4882a593Smuzhiyun #include <bcm63xx_io.h>
17*4882a593Smuzhiyun #include <bcm63xx_regs.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static struct resource pcmcia_resources[] = {
20*4882a593Smuzhiyun /* pcmcia registers */
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun /* start & end filled at runtime */
23*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
24*4882a593Smuzhiyun },
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* pcmcia memory zone resources */
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun .start = BCM_PCMCIA_COMMON_BASE_PA,
29*4882a593Smuzhiyun .end = BCM_PCMCIA_COMMON_END_PA,
30*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
31*4882a593Smuzhiyun },
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun .start = BCM_PCMCIA_ATTR_BASE_PA,
34*4882a593Smuzhiyun .end = BCM_PCMCIA_ATTR_END_PA,
35*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
36*4882a593Smuzhiyun },
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun .start = BCM_PCMCIA_IO_BASE_PA,
39*4882a593Smuzhiyun .end = BCM_PCMCIA_IO_END_PA,
40*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
41*4882a593Smuzhiyun },
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* PCMCIA irq */
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun /* start filled at runtime */
46*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
47*4882a593Smuzhiyun },
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* declare PCMCIA IO resource also */
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun .start = BCM_PCMCIA_IO_BASE_PA,
52*4882a593Smuzhiyun .end = BCM_PCMCIA_IO_END_PA,
53*4882a593Smuzhiyun .flags = IORESOURCE_IO,
54*4882a593Smuzhiyun },
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static struct bcm63xx_pcmcia_platform_data pd;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static struct platform_device bcm63xx_pcmcia_device = {
60*4882a593Smuzhiyun .name = "bcm63xx_pcmcia",
61*4882a593Smuzhiyun .id = 0,
62*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(pcmcia_resources),
63*4882a593Smuzhiyun .resource = pcmcia_resources,
64*4882a593Smuzhiyun .dev = {
65*4882a593Smuzhiyun .platform_data = &pd,
66*4882a593Smuzhiyun },
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
config_pcmcia_cs(unsigned int cs,u32 base,unsigned int size)69*4882a593Smuzhiyun static int __init config_pcmcia_cs(unsigned int cs,
70*4882a593Smuzhiyun u32 base, unsigned int size)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun int ret;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun ret = bcm63xx_set_cs_status(cs, 0);
75*4882a593Smuzhiyun if (!ret)
76*4882a593Smuzhiyun ret = bcm63xx_set_cs_base(cs, base, size);
77*4882a593Smuzhiyun if (!ret)
78*4882a593Smuzhiyun ret = bcm63xx_set_cs_status(cs, 1);
79*4882a593Smuzhiyun return ret;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const struct {
83*4882a593Smuzhiyun unsigned int cs;
84*4882a593Smuzhiyun unsigned int base;
85*4882a593Smuzhiyun unsigned int size;
86*4882a593Smuzhiyun } pcmcia_cs[3] __initconst = {
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun .cs = MPI_CS_PCMCIA_COMMON,
89*4882a593Smuzhiyun .base = BCM_PCMCIA_COMMON_BASE_PA,
90*4882a593Smuzhiyun .size = BCM_PCMCIA_COMMON_SIZE
91*4882a593Smuzhiyun },
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun .cs = MPI_CS_PCMCIA_ATTR,
94*4882a593Smuzhiyun .base = BCM_PCMCIA_ATTR_BASE_PA,
95*4882a593Smuzhiyun .size = BCM_PCMCIA_ATTR_SIZE
96*4882a593Smuzhiyun },
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun .cs = MPI_CS_PCMCIA_IO,
99*4882a593Smuzhiyun .base = BCM_PCMCIA_IO_BASE_PA,
100*4882a593Smuzhiyun .size = BCM_PCMCIA_IO_SIZE
101*4882a593Smuzhiyun },
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
bcm63xx_pcmcia_register(void)104*4882a593Smuzhiyun int __init bcm63xx_pcmcia_register(void)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun int ret, i;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* use correct pcmcia ready gpio depending on processor */
112*4882a593Smuzhiyun switch (bcm63xx_get_cpu_id()) {
113*4882a593Smuzhiyun case BCM6348_CPU_ID:
114*4882a593Smuzhiyun pd.ready_gpio = 22;
115*4882a593Smuzhiyun break;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun case BCM6358_CPU_ID:
118*4882a593Smuzhiyun pd.ready_gpio = 18;
119*4882a593Smuzhiyun break;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun default:
122*4882a593Smuzhiyun return -ENODEV;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
126*4882a593Smuzhiyun pcmcia_resources[0].end = pcmcia_resources[0].start +
127*4882a593Smuzhiyun RSET_PCMCIA_SIZE - 1;
128*4882a593Smuzhiyun pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* configure pcmcia chip selects */
131*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
132*4882a593Smuzhiyun ret = config_pcmcia_cs(pcmcia_cs[i].cs,
133*4882a593Smuzhiyun pcmcia_cs[i].base,
134*4882a593Smuzhiyun pcmcia_cs[i].size);
135*4882a593Smuzhiyun if (ret)
136*4882a593Smuzhiyun goto out_err;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return platform_device_register(&bcm63xx_pcmcia_device);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun out_err:
142*4882a593Smuzhiyun pr_err("unable to set pcmcia chip select\n");
143*4882a593Smuzhiyun return ret;
144*4882a593Smuzhiyun }
145