xref: /OK3568_Linux_fs/kernel/arch/mips/bcm63xx/dev-enet.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * This file is subject to the terms and conditions of the GNU General Public
3*4882a593Smuzhiyun  * License.  See the file "COPYING" in the main directory of this archive
4*4882a593Smuzhiyun  * for more details.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/export.h>
13*4882a593Smuzhiyun #include <bcm63xx_dev_enet.h>
14*4882a593Smuzhiyun #include <bcm63xx_io.h>
15*4882a593Smuzhiyun #include <bcm63xx_regs.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static const unsigned long bcm6348_regs_enetdmac[] = {
18*4882a593Smuzhiyun 	[ENETDMAC_CHANCFG]	= ENETDMAC_CHANCFG_REG,
19*4882a593Smuzhiyun 	[ENETDMAC_IR]		= ENETDMAC_IR_REG,
20*4882a593Smuzhiyun 	[ENETDMAC_IRMASK]	= ENETDMAC_IRMASK_REG,
21*4882a593Smuzhiyun 	[ENETDMAC_MAXBURST]	= ENETDMAC_MAXBURST_REG,
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun static const unsigned long bcm6345_regs_enetdmac[] = {
25*4882a593Smuzhiyun 	[ENETDMAC_CHANCFG]	= ENETDMA_6345_CHANCFG_REG,
26*4882a593Smuzhiyun 	[ENETDMAC_IR]		= ENETDMA_6345_IR_REG,
27*4882a593Smuzhiyun 	[ENETDMAC_IRMASK]	= ENETDMA_6345_IRMASK_REG,
28*4882a593Smuzhiyun 	[ENETDMAC_MAXBURST]	= ENETDMA_6345_MAXBURST_REG,
29*4882a593Smuzhiyun 	[ENETDMAC_BUFALLOC]	= ENETDMA_6345_BUFALLOC_REG,
30*4882a593Smuzhiyun 	[ENETDMAC_RSTART]	= ENETDMA_6345_RSTART_REG,
31*4882a593Smuzhiyun 	[ENETDMAC_FC]		= ENETDMA_6345_FC_REG,
32*4882a593Smuzhiyun 	[ENETDMAC_LEN]		= ENETDMA_6345_LEN_REG,
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun const unsigned long *bcm63xx_regs_enetdmac;
36*4882a593Smuzhiyun EXPORT_SYMBOL(bcm63xx_regs_enetdmac);
37*4882a593Smuzhiyun 
bcm63xx_enetdmac_regs_init(void)38*4882a593Smuzhiyun static __init void bcm63xx_enetdmac_regs_init(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	if (BCMCPU_IS_6345())
41*4882a593Smuzhiyun 		bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
42*4882a593Smuzhiyun 	else
43*4882a593Smuzhiyun 		bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static struct resource shared_res[] = {
47*4882a593Smuzhiyun 	{
48*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
49*4882a593Smuzhiyun 		.end		= -1, /* filled at runtime */
50*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
51*4882a593Smuzhiyun 	},
52*4882a593Smuzhiyun 	{
53*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
54*4882a593Smuzhiyun 		.end		= -1, /* filled at runtime */
55*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
56*4882a593Smuzhiyun 	},
57*4882a593Smuzhiyun 	{
58*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
59*4882a593Smuzhiyun 		.end		= -1, /* filled at runtime */
60*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
61*4882a593Smuzhiyun 	},
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun static struct platform_device bcm63xx_enet_shared_device = {
65*4882a593Smuzhiyun 	.name		= "bcm63xx_enet_shared",
66*4882a593Smuzhiyun 	.id		= 0,
67*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(shared_res),
68*4882a593Smuzhiyun 	.resource	= shared_res,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static int shared_device_registered;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun static u64 enet_dmamask = DMA_BIT_MASK(32);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static struct resource enet0_res[] = {
76*4882a593Smuzhiyun 	{
77*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
78*4882a593Smuzhiyun 		.end		= -1, /* filled at runtime */
79*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
80*4882a593Smuzhiyun 	},
81*4882a593Smuzhiyun 	{
82*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
83*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
84*4882a593Smuzhiyun 	},
85*4882a593Smuzhiyun 	{
86*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
87*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
88*4882a593Smuzhiyun 	},
89*4882a593Smuzhiyun 	{
90*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
91*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
92*4882a593Smuzhiyun 	},
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun static struct bcm63xx_enet_platform_data enet0_pd;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static struct platform_device bcm63xx_enet0_device = {
98*4882a593Smuzhiyun 	.name		= "bcm63xx_enet",
99*4882a593Smuzhiyun 	.id		= 0,
100*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(enet0_res),
101*4882a593Smuzhiyun 	.resource	= enet0_res,
102*4882a593Smuzhiyun 	.dev		= {
103*4882a593Smuzhiyun 		.platform_data = &enet0_pd,
104*4882a593Smuzhiyun 		.dma_mask = &enet_dmamask,
105*4882a593Smuzhiyun 		.coherent_dma_mask = DMA_BIT_MASK(32),
106*4882a593Smuzhiyun 	},
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static struct resource enet1_res[] = {
110*4882a593Smuzhiyun 	{
111*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
112*4882a593Smuzhiyun 		.end		= -1, /* filled at runtime */
113*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
114*4882a593Smuzhiyun 	},
115*4882a593Smuzhiyun 	{
116*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
117*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
118*4882a593Smuzhiyun 	},
119*4882a593Smuzhiyun 	{
120*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
121*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
122*4882a593Smuzhiyun 	},
123*4882a593Smuzhiyun 	{
124*4882a593Smuzhiyun 		.start		= -1, /* filled at runtime */
125*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
126*4882a593Smuzhiyun 	},
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct bcm63xx_enet_platform_data enet1_pd;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static struct platform_device bcm63xx_enet1_device = {
132*4882a593Smuzhiyun 	.name		= "bcm63xx_enet",
133*4882a593Smuzhiyun 	.id		= 1,
134*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(enet1_res),
135*4882a593Smuzhiyun 	.resource	= enet1_res,
136*4882a593Smuzhiyun 	.dev		= {
137*4882a593Smuzhiyun 		.platform_data = &enet1_pd,
138*4882a593Smuzhiyun 		.dma_mask = &enet_dmamask,
139*4882a593Smuzhiyun 		.coherent_dma_mask = DMA_BIT_MASK(32),
140*4882a593Smuzhiyun 	},
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static struct resource enetsw_res[] = {
144*4882a593Smuzhiyun 	{
145*4882a593Smuzhiyun 		/* start & end filled at runtime */
146*4882a593Smuzhiyun 		.flags		= IORESOURCE_MEM,
147*4882a593Smuzhiyun 	},
148*4882a593Smuzhiyun 	{
149*4882a593Smuzhiyun 		/* start filled at runtime */
150*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
151*4882a593Smuzhiyun 	},
152*4882a593Smuzhiyun 	{
153*4882a593Smuzhiyun 		/* start filled at runtime */
154*4882a593Smuzhiyun 		.flags		= IORESOURCE_IRQ,
155*4882a593Smuzhiyun 	},
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static struct bcm63xx_enetsw_platform_data enetsw_pd;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static struct platform_device bcm63xx_enetsw_device = {
161*4882a593Smuzhiyun 	.name		= "bcm63xx_enetsw",
162*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(enetsw_res),
163*4882a593Smuzhiyun 	.resource	= enetsw_res,
164*4882a593Smuzhiyun 	.dev		= {
165*4882a593Smuzhiyun 		.platform_data = &enetsw_pd,
166*4882a593Smuzhiyun 		.dma_mask = &enet_dmamask,
167*4882a593Smuzhiyun 		.coherent_dma_mask = DMA_BIT_MASK(32),
168*4882a593Smuzhiyun 	},
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
register_shared(void)171*4882a593Smuzhiyun static int __init register_shared(void)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	int ret, chan_count;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	if (shared_device_registered)
176*4882a593Smuzhiyun 		return 0;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	bcm63xx_enetdmac_regs_init();
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
181*4882a593Smuzhiyun 	shared_res[0].end = shared_res[0].start;
182*4882a593Smuzhiyun 	if (BCMCPU_IS_6345())
183*4882a593Smuzhiyun 		shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1;
184*4882a593Smuzhiyun 	else
185*4882a593Smuzhiyun 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
188*4882a593Smuzhiyun 		chan_count = 32;
189*4882a593Smuzhiyun 	else if (BCMCPU_IS_6345())
190*4882a593Smuzhiyun 		chan_count = 8;
191*4882a593Smuzhiyun 	else
192*4882a593Smuzhiyun 		chan_count = 16;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
195*4882a593Smuzhiyun 	shared_res[1].end = shared_res[1].start;
196*4882a593Smuzhiyun 	shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count)  - 1;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
199*4882a593Smuzhiyun 	shared_res[2].end = shared_res[2].start;
200*4882a593Smuzhiyun 	shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count)  - 1;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	ret = platform_device_register(&bcm63xx_enet_shared_device);
203*4882a593Smuzhiyun 	if (ret)
204*4882a593Smuzhiyun 		return ret;
205*4882a593Smuzhiyun 	shared_device_registered = 1;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
bcm63xx_enet_register(int unit,const struct bcm63xx_enet_platform_data * pd)210*4882a593Smuzhiyun int __init bcm63xx_enet_register(int unit,
211*4882a593Smuzhiyun 				 const struct bcm63xx_enet_platform_data *pd)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	struct platform_device *pdev;
214*4882a593Smuzhiyun 	struct bcm63xx_enet_platform_data *dpd;
215*4882a593Smuzhiyun 	int ret;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	if (unit > 1)
218*4882a593Smuzhiyun 		return -ENODEV;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
221*4882a593Smuzhiyun 		return -ENODEV;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	ret = register_shared();
224*4882a593Smuzhiyun 	if (ret)
225*4882a593Smuzhiyun 		return ret;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	if (unit == 0) {
228*4882a593Smuzhiyun 		enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
229*4882a593Smuzhiyun 		enet0_res[0].end = enet0_res[0].start;
230*4882a593Smuzhiyun 		enet0_res[0].end += RSET_ENET_SIZE - 1;
231*4882a593Smuzhiyun 		enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0);
232*4882a593Smuzhiyun 		enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA);
233*4882a593Smuzhiyun 		enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA);
234*4882a593Smuzhiyun 		pdev = &bcm63xx_enet0_device;
235*4882a593Smuzhiyun 	} else {
236*4882a593Smuzhiyun 		enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1);
237*4882a593Smuzhiyun 		enet1_res[0].end = enet1_res[0].start;
238*4882a593Smuzhiyun 		enet1_res[0].end += RSET_ENET_SIZE - 1;
239*4882a593Smuzhiyun 		enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1);
240*4882a593Smuzhiyun 		enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA);
241*4882a593Smuzhiyun 		enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA);
242*4882a593Smuzhiyun 		pdev = &bcm63xx_enet1_device;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	/* copy given platform data */
246*4882a593Smuzhiyun 	dpd = pdev->dev.platform_data;
247*4882a593Smuzhiyun 	memcpy(dpd, pd, sizeof(*pd));
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	/* adjust them in case internal phy is used */
250*4882a593Smuzhiyun 	if (dpd->use_internal_phy) {
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 		/* internal phy only exists for enet0 */
253*4882a593Smuzhiyun 		if (unit == 1)
254*4882a593Smuzhiyun 			return -ENODEV;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 		dpd->phy_id = 1;
257*4882a593Smuzhiyun 		dpd->has_phy_interrupt = 1;
258*4882a593Smuzhiyun 		dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
262*4882a593Smuzhiyun 	dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
263*4882a593Smuzhiyun 	if (BCMCPU_IS_6345()) {
264*4882a593Smuzhiyun 		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK;
265*4882a593Smuzhiyun 		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK;
266*4882a593Smuzhiyun 		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK;
267*4882a593Smuzhiyun 		dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
268*4882a593Smuzhiyun 		dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
269*4882a593Smuzhiyun 		dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
270*4882a593Smuzhiyun 		dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
271*4882a593Smuzhiyun 	} else {
272*4882a593Smuzhiyun 		dpd->dma_has_sram = true;
273*4882a593Smuzhiyun 		dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
274*4882a593Smuzhiyun 	}
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	if (unit == 0) {
277*4882a593Smuzhiyun 		dpd->rx_chan = 0;
278*4882a593Smuzhiyun 		dpd->tx_chan = 1;
279*4882a593Smuzhiyun 	} else {
280*4882a593Smuzhiyun 		dpd->rx_chan = 2;
281*4882a593Smuzhiyun 		dpd->tx_chan = 3;
282*4882a593Smuzhiyun 	}
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	ret = platform_device_register(pdev);
285*4882a593Smuzhiyun 	if (ret)
286*4882a593Smuzhiyun 		return ret;
287*4882a593Smuzhiyun 	return 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun int __init
bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data * pd)291*4882a593Smuzhiyun bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun 	int ret;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
296*4882a593Smuzhiyun 		return -ENODEV;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	ret = register_shared();
299*4882a593Smuzhiyun 	if (ret)
300*4882a593Smuzhiyun 		return ret;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
303*4882a593Smuzhiyun 	enetsw_res[0].end = enetsw_res[0].start;
304*4882a593Smuzhiyun 	enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
305*4882a593Smuzhiyun 	enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
306*4882a593Smuzhiyun 	enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
307*4882a593Smuzhiyun 	if (!enetsw_res[2].start)
308*4882a593Smuzhiyun 		enetsw_res[2].start = -1;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	if (BCMCPU_IS_6328())
313*4882a593Smuzhiyun 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
314*4882a593Smuzhiyun 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
315*4882a593Smuzhiyun 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	enetsw_pd.dma_has_sram = true;
318*4882a593Smuzhiyun 	enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
319*4882a593Smuzhiyun 	enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
320*4882a593Smuzhiyun 	enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	ret = platform_device_register(&bcm63xx_enetsw_device);
323*4882a593Smuzhiyun 	if (ret)
324*4882a593Smuzhiyun 		return ret;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	return 0;
327*4882a593Smuzhiyun }
328