1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
4*4882a593Smuzhiyun * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/string.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/ssb/ssb.h>
14*4882a593Smuzhiyun #include <asm/addrspace.h>
15*4882a593Smuzhiyun #include <bcm63xx_board.h>
16*4882a593Smuzhiyun #include <bcm63xx_cpu.h>
17*4882a593Smuzhiyun #include <bcm63xx_dev_uart.h>
18*4882a593Smuzhiyun #include <bcm63xx_regs.h>
19*4882a593Smuzhiyun #include <bcm63xx_io.h>
20*4882a593Smuzhiyun #include <bcm63xx_nvram.h>
21*4882a593Smuzhiyun #include <bcm63xx_dev_pci.h>
22*4882a593Smuzhiyun #include <bcm63xx_dev_enet.h>
23*4882a593Smuzhiyun #include <bcm63xx_dev_flash.h>
24*4882a593Smuzhiyun #include <bcm63xx_dev_hsspi.h>
25*4882a593Smuzhiyun #include <bcm63xx_dev_pcmcia.h>
26*4882a593Smuzhiyun #include <bcm63xx_dev_spi.h>
27*4882a593Smuzhiyun #include <bcm63xx_dev_usb_usbd.h>
28*4882a593Smuzhiyun #include <board_bcm963xx.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <uapi/linux/bcm933xx_hcs.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define HCS_OFFSET_128K 0x20000
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun static struct board_info board;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun * known 3368 boards
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_3368
40*4882a593Smuzhiyun static struct board_info __initdata board_cvg834g = {
41*4882a593Smuzhiyun .name = "CVG834G_E15R3921",
42*4882a593Smuzhiyun .expected_cpu_id = 0x3368,
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun .ephy_reset_gpio = 36,
45*4882a593Smuzhiyun .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
46*4882a593Smuzhiyun .has_pci = 1,
47*4882a593Smuzhiyun .has_uart0 = 1,
48*4882a593Smuzhiyun .has_uart1 = 1,
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun .has_enet0 = 1,
51*4882a593Smuzhiyun .enet0 = {
52*4882a593Smuzhiyun .has_phy = 1,
53*4882a593Smuzhiyun .use_internal_phy = 1,
54*4882a593Smuzhiyun },
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun .leds = {
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun .name = "CVG834G:green:power",
59*4882a593Smuzhiyun .gpio = 37,
60*4882a593Smuzhiyun .default_trigger= "default-on",
61*4882a593Smuzhiyun },
62*4882a593Smuzhiyun },
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_3368 */
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /*
67*4882a593Smuzhiyun * known 6328 boards
68*4882a593Smuzhiyun */
69*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6328
70*4882a593Smuzhiyun static struct board_info __initdata board_96328avng = {
71*4882a593Smuzhiyun .name = "96328avng",
72*4882a593Smuzhiyun .expected_cpu_id = 0x6328,
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun .has_pci = 1,
75*4882a593Smuzhiyun .has_uart0 = 1,
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun .has_usbd = 0,
78*4882a593Smuzhiyun .usbd = {
79*4882a593Smuzhiyun .use_fullspeed = 0,
80*4882a593Smuzhiyun .port_no = 0,
81*4882a593Smuzhiyun },
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun .leds = {
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun .name = "96328avng::ppp-fail",
86*4882a593Smuzhiyun .gpio = 2,
87*4882a593Smuzhiyun .active_low = 1,
88*4882a593Smuzhiyun },
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun .name = "96328avng::power",
91*4882a593Smuzhiyun .gpio = 4,
92*4882a593Smuzhiyun .active_low = 1,
93*4882a593Smuzhiyun .default_trigger = "default-on",
94*4882a593Smuzhiyun },
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun .name = "96328avng::power-fail",
97*4882a593Smuzhiyun .gpio = 8,
98*4882a593Smuzhiyun .active_low = 1,
99*4882a593Smuzhiyun },
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun .name = "96328avng::wps",
102*4882a593Smuzhiyun .gpio = 9,
103*4882a593Smuzhiyun .active_low = 1,
104*4882a593Smuzhiyun },
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun .name = "96328avng::ppp",
107*4882a593Smuzhiyun .gpio = 11,
108*4882a593Smuzhiyun .active_low = 1,
109*4882a593Smuzhiyun },
110*4882a593Smuzhiyun },
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6328 */
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /*
115*4882a593Smuzhiyun * known 6338 boards
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6338
118*4882a593Smuzhiyun static struct board_info __initdata board_96338gw = {
119*4882a593Smuzhiyun .name = "96338GW",
120*4882a593Smuzhiyun .expected_cpu_id = 0x6338,
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun .has_ohci0 = 1,
123*4882a593Smuzhiyun .has_uart0 = 1,
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun .has_enet0 = 1,
126*4882a593Smuzhiyun .enet0 = {
127*4882a593Smuzhiyun .force_speed_100 = 1,
128*4882a593Smuzhiyun .force_duplex_full = 1,
129*4882a593Smuzhiyun },
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun .leds = {
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun .name = "adsl",
134*4882a593Smuzhiyun .gpio = 3,
135*4882a593Smuzhiyun .active_low = 1,
136*4882a593Smuzhiyun },
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun .name = "ses",
139*4882a593Smuzhiyun .gpio = 5,
140*4882a593Smuzhiyun .active_low = 1,
141*4882a593Smuzhiyun },
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun .name = "ppp-fail",
144*4882a593Smuzhiyun .gpio = 4,
145*4882a593Smuzhiyun .active_low = 1,
146*4882a593Smuzhiyun },
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun .name = "power",
149*4882a593Smuzhiyun .gpio = 0,
150*4882a593Smuzhiyun .active_low = 1,
151*4882a593Smuzhiyun .default_trigger = "default-on",
152*4882a593Smuzhiyun },
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun .name = "stop",
155*4882a593Smuzhiyun .gpio = 1,
156*4882a593Smuzhiyun .active_low = 1,
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun },
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun static struct board_info __initdata board_96338w = {
162*4882a593Smuzhiyun .name = "96338W",
163*4882a593Smuzhiyun .expected_cpu_id = 0x6338,
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun .has_uart0 = 1,
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun .has_enet0 = 1,
168*4882a593Smuzhiyun .enet0 = {
169*4882a593Smuzhiyun .force_speed_100 = 1,
170*4882a593Smuzhiyun .force_duplex_full = 1,
171*4882a593Smuzhiyun },
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun .leds = {
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun .name = "adsl",
176*4882a593Smuzhiyun .gpio = 3,
177*4882a593Smuzhiyun .active_low = 1,
178*4882a593Smuzhiyun },
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun .name = "ses",
181*4882a593Smuzhiyun .gpio = 5,
182*4882a593Smuzhiyun .active_low = 1,
183*4882a593Smuzhiyun },
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun .name = "ppp-fail",
186*4882a593Smuzhiyun .gpio = 4,
187*4882a593Smuzhiyun .active_low = 1,
188*4882a593Smuzhiyun },
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun .name = "power",
191*4882a593Smuzhiyun .gpio = 0,
192*4882a593Smuzhiyun .active_low = 1,
193*4882a593Smuzhiyun .default_trigger = "default-on",
194*4882a593Smuzhiyun },
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun .name = "stop",
197*4882a593Smuzhiyun .gpio = 1,
198*4882a593Smuzhiyun .active_low = 1,
199*4882a593Smuzhiyun },
200*4882a593Smuzhiyun },
201*4882a593Smuzhiyun };
202*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6338 */
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun * known 6345 boards
206*4882a593Smuzhiyun */
207*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6345
208*4882a593Smuzhiyun static struct board_info __initdata board_96345gw2 = {
209*4882a593Smuzhiyun .name = "96345GW2",
210*4882a593Smuzhiyun .expected_cpu_id = 0x6345,
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun .has_uart0 = 1,
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6345 */
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /*
217*4882a593Smuzhiyun * known 6348 boards
218*4882a593Smuzhiyun */
219*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6348
220*4882a593Smuzhiyun static struct board_info __initdata board_96348r = {
221*4882a593Smuzhiyun .name = "96348R",
222*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun .has_pci = 1,
225*4882a593Smuzhiyun .has_uart0 = 1,
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun .has_enet0 = 1,
228*4882a593Smuzhiyun .enet0 = {
229*4882a593Smuzhiyun .has_phy = 1,
230*4882a593Smuzhiyun .use_internal_phy = 1,
231*4882a593Smuzhiyun },
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun .leds = {
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun .name = "adsl-fail",
236*4882a593Smuzhiyun .gpio = 2,
237*4882a593Smuzhiyun .active_low = 1,
238*4882a593Smuzhiyun },
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun .name = "ppp",
241*4882a593Smuzhiyun .gpio = 3,
242*4882a593Smuzhiyun .active_low = 1,
243*4882a593Smuzhiyun },
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun .name = "ppp-fail",
246*4882a593Smuzhiyun .gpio = 4,
247*4882a593Smuzhiyun .active_low = 1,
248*4882a593Smuzhiyun },
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun .name = "power",
251*4882a593Smuzhiyun .gpio = 0,
252*4882a593Smuzhiyun .active_low = 1,
253*4882a593Smuzhiyun .default_trigger = "default-on",
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun },
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun .name = "stop",
258*4882a593Smuzhiyun .gpio = 1,
259*4882a593Smuzhiyun .active_low = 1,
260*4882a593Smuzhiyun },
261*4882a593Smuzhiyun },
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun static struct board_info __initdata board_96348gw_10 = {
265*4882a593Smuzhiyun .name = "96348GW-10",
266*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun .has_ohci0 = 1,
269*4882a593Smuzhiyun .has_pccard = 1,
270*4882a593Smuzhiyun .has_pci = 1,
271*4882a593Smuzhiyun .has_uart0 = 1,
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun .has_enet0 = 1,
274*4882a593Smuzhiyun .enet0 = {
275*4882a593Smuzhiyun .has_phy = 1,
276*4882a593Smuzhiyun .use_internal_phy = 1,
277*4882a593Smuzhiyun },
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun .has_enet1 = 1,
280*4882a593Smuzhiyun .enet1 = {
281*4882a593Smuzhiyun .force_speed_100 = 1,
282*4882a593Smuzhiyun .force_duplex_full = 1,
283*4882a593Smuzhiyun },
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun .leds = {
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun .name = "adsl-fail",
288*4882a593Smuzhiyun .gpio = 2,
289*4882a593Smuzhiyun .active_low = 1,
290*4882a593Smuzhiyun },
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun .name = "ppp",
293*4882a593Smuzhiyun .gpio = 3,
294*4882a593Smuzhiyun .active_low = 1,
295*4882a593Smuzhiyun },
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun .name = "ppp-fail",
298*4882a593Smuzhiyun .gpio = 4,
299*4882a593Smuzhiyun .active_low = 1,
300*4882a593Smuzhiyun },
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun .name = "power",
303*4882a593Smuzhiyun .gpio = 0,
304*4882a593Smuzhiyun .active_low = 1,
305*4882a593Smuzhiyun .default_trigger = "default-on",
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun .name = "stop",
309*4882a593Smuzhiyun .gpio = 1,
310*4882a593Smuzhiyun .active_low = 1,
311*4882a593Smuzhiyun },
312*4882a593Smuzhiyun },
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun static struct board_info __initdata board_96348gw_11 = {
316*4882a593Smuzhiyun .name = "96348GW-11",
317*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun .has_ohci0 = 1,
320*4882a593Smuzhiyun .has_pccard = 1,
321*4882a593Smuzhiyun .has_pci = 1,
322*4882a593Smuzhiyun .has_uart0 = 1,
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun .has_enet0 = 1,
325*4882a593Smuzhiyun .enet0 = {
326*4882a593Smuzhiyun .has_phy = 1,
327*4882a593Smuzhiyun .use_internal_phy = 1,
328*4882a593Smuzhiyun },
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun .has_enet1 = 1,
331*4882a593Smuzhiyun .enet1 = {
332*4882a593Smuzhiyun .force_speed_100 = 1,
333*4882a593Smuzhiyun .force_duplex_full = 1,
334*4882a593Smuzhiyun },
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun .leds = {
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun .name = "adsl-fail",
339*4882a593Smuzhiyun .gpio = 2,
340*4882a593Smuzhiyun .active_low = 1,
341*4882a593Smuzhiyun },
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun .name = "ppp",
344*4882a593Smuzhiyun .gpio = 3,
345*4882a593Smuzhiyun .active_low = 1,
346*4882a593Smuzhiyun },
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun .name = "ppp-fail",
349*4882a593Smuzhiyun .gpio = 4,
350*4882a593Smuzhiyun .active_low = 1,
351*4882a593Smuzhiyun },
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun .name = "power",
354*4882a593Smuzhiyun .gpio = 0,
355*4882a593Smuzhiyun .active_low = 1,
356*4882a593Smuzhiyun .default_trigger = "default-on",
357*4882a593Smuzhiyun },
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun .name = "stop",
360*4882a593Smuzhiyun .gpio = 1,
361*4882a593Smuzhiyun .active_low = 1,
362*4882a593Smuzhiyun },
363*4882a593Smuzhiyun },
364*4882a593Smuzhiyun };
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun static struct board_info __initdata board_96348gw = {
367*4882a593Smuzhiyun .name = "96348GW",
368*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun .has_ohci0 = 1,
371*4882a593Smuzhiyun .has_pci = 1,
372*4882a593Smuzhiyun .has_uart0 = 1,
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun .has_enet0 = 1,
375*4882a593Smuzhiyun .enet0 = {
376*4882a593Smuzhiyun .has_phy = 1,
377*4882a593Smuzhiyun .use_internal_phy = 1,
378*4882a593Smuzhiyun },
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun .has_enet1 = 1,
381*4882a593Smuzhiyun .enet1 = {
382*4882a593Smuzhiyun .force_speed_100 = 1,
383*4882a593Smuzhiyun .force_duplex_full = 1,
384*4882a593Smuzhiyun },
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun .leds = {
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun .name = "adsl-fail",
389*4882a593Smuzhiyun .gpio = 2,
390*4882a593Smuzhiyun .active_low = 1,
391*4882a593Smuzhiyun },
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun .name = "ppp",
394*4882a593Smuzhiyun .gpio = 3,
395*4882a593Smuzhiyun .active_low = 1,
396*4882a593Smuzhiyun },
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun .name = "ppp-fail",
399*4882a593Smuzhiyun .gpio = 4,
400*4882a593Smuzhiyun .active_low = 1,
401*4882a593Smuzhiyun },
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun .name = "power",
404*4882a593Smuzhiyun .gpio = 0,
405*4882a593Smuzhiyun .active_low = 1,
406*4882a593Smuzhiyun .default_trigger = "default-on",
407*4882a593Smuzhiyun },
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun .name = "stop",
410*4882a593Smuzhiyun .gpio = 1,
411*4882a593Smuzhiyun .active_low = 1,
412*4882a593Smuzhiyun },
413*4882a593Smuzhiyun },
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static struct board_info __initdata board_FAST2404 = {
417*4882a593Smuzhiyun .name = "F@ST2404",
418*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun .has_ohci0 = 1,
421*4882a593Smuzhiyun .has_pccard = 1,
422*4882a593Smuzhiyun .has_pci = 1,
423*4882a593Smuzhiyun .has_uart0 = 1,
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun .has_enet0 = 1,
426*4882a593Smuzhiyun .enet0 = {
427*4882a593Smuzhiyun .has_phy = 1,
428*4882a593Smuzhiyun .use_internal_phy = 1,
429*4882a593Smuzhiyun },
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun .has_enet1 = 1,
432*4882a593Smuzhiyun .enet1 = {
433*4882a593Smuzhiyun .force_speed_100 = 1,
434*4882a593Smuzhiyun .force_duplex_full = 1,
435*4882a593Smuzhiyun },
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun static struct board_info __initdata board_rta1025w_16 = {
439*4882a593Smuzhiyun .name = "RTA1025W_16",
440*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun .has_pci = 1,
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun .has_enet0 = 1,
445*4882a593Smuzhiyun .enet0 = {
446*4882a593Smuzhiyun .has_phy = 1,
447*4882a593Smuzhiyun .use_internal_phy = 1,
448*4882a593Smuzhiyun },
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun .has_enet1 = 1,
451*4882a593Smuzhiyun .enet1 = {
452*4882a593Smuzhiyun .force_speed_100 = 1,
453*4882a593Smuzhiyun .force_duplex_full = 1,
454*4882a593Smuzhiyun },
455*4882a593Smuzhiyun };
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun static struct board_info __initdata board_DV201AMR = {
458*4882a593Smuzhiyun .name = "DV201AMR",
459*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun .has_ohci0 = 1,
462*4882a593Smuzhiyun .has_pci = 1,
463*4882a593Smuzhiyun .has_uart0 = 1,
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun .has_enet0 = 1,
466*4882a593Smuzhiyun .enet0 = {
467*4882a593Smuzhiyun .has_phy = 1,
468*4882a593Smuzhiyun .use_internal_phy = 1,
469*4882a593Smuzhiyun },
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun .has_enet1 = 1,
472*4882a593Smuzhiyun .enet1 = {
473*4882a593Smuzhiyun .force_speed_100 = 1,
474*4882a593Smuzhiyun .force_duplex_full = 1,
475*4882a593Smuzhiyun },
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun static struct board_info __initdata board_96348gw_a = {
479*4882a593Smuzhiyun .name = "96348GW-A",
480*4882a593Smuzhiyun .expected_cpu_id = 0x6348,
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun .has_ohci0 = 1,
483*4882a593Smuzhiyun .has_pci = 1,
484*4882a593Smuzhiyun .has_uart0 = 1,
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun .has_enet0 = 1,
487*4882a593Smuzhiyun .enet0 = {
488*4882a593Smuzhiyun .has_phy = 1,
489*4882a593Smuzhiyun .use_internal_phy = 1,
490*4882a593Smuzhiyun },
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun .has_enet1 = 1,
493*4882a593Smuzhiyun .enet1 = {
494*4882a593Smuzhiyun .force_speed_100 = 1,
495*4882a593Smuzhiyun .force_duplex_full = 1,
496*4882a593Smuzhiyun },
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6348 */
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun /*
501*4882a593Smuzhiyun * known 6358 boards
502*4882a593Smuzhiyun */
503*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6358
504*4882a593Smuzhiyun static struct board_info __initdata board_96358vw = {
505*4882a593Smuzhiyun .name = "96358VW",
506*4882a593Smuzhiyun .expected_cpu_id = 0x6358,
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun .has_ehci0 = 1,
509*4882a593Smuzhiyun .has_ohci0 = 1,
510*4882a593Smuzhiyun .has_pccard = 1,
511*4882a593Smuzhiyun .has_pci = 1,
512*4882a593Smuzhiyun .has_uart0 = 1,
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun .has_enet0 = 1,
515*4882a593Smuzhiyun .enet0 = {
516*4882a593Smuzhiyun .has_phy = 1,
517*4882a593Smuzhiyun .use_internal_phy = 1,
518*4882a593Smuzhiyun },
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun .has_enet1 = 1,
521*4882a593Smuzhiyun .enet1 = {
522*4882a593Smuzhiyun .force_speed_100 = 1,
523*4882a593Smuzhiyun .force_duplex_full = 1,
524*4882a593Smuzhiyun },
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun .leds = {
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun .name = "adsl-fail",
529*4882a593Smuzhiyun .gpio = 15,
530*4882a593Smuzhiyun .active_low = 1,
531*4882a593Smuzhiyun },
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun .name = "ppp",
534*4882a593Smuzhiyun .gpio = 22,
535*4882a593Smuzhiyun .active_low = 1,
536*4882a593Smuzhiyun },
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun .name = "ppp-fail",
539*4882a593Smuzhiyun .gpio = 23,
540*4882a593Smuzhiyun .active_low = 1,
541*4882a593Smuzhiyun },
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun .name = "power",
544*4882a593Smuzhiyun .gpio = 4,
545*4882a593Smuzhiyun .default_trigger = "default-on",
546*4882a593Smuzhiyun },
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun .name = "stop",
549*4882a593Smuzhiyun .gpio = 5,
550*4882a593Smuzhiyun },
551*4882a593Smuzhiyun },
552*4882a593Smuzhiyun };
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun static struct board_info __initdata board_96358vw2 = {
555*4882a593Smuzhiyun .name = "96358VW2",
556*4882a593Smuzhiyun .expected_cpu_id = 0x6358,
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun .has_ehci0 = 1,
559*4882a593Smuzhiyun .has_ohci0 = 1,
560*4882a593Smuzhiyun .has_pccard = 1,
561*4882a593Smuzhiyun .has_pci = 1,
562*4882a593Smuzhiyun .has_uart0 = 1,
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun .has_enet0 = 1,
565*4882a593Smuzhiyun .enet0 = {
566*4882a593Smuzhiyun .has_phy = 1,
567*4882a593Smuzhiyun .use_internal_phy = 1,
568*4882a593Smuzhiyun },
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun .has_enet1 = 1,
571*4882a593Smuzhiyun .enet1 = {
572*4882a593Smuzhiyun .force_speed_100 = 1,
573*4882a593Smuzhiyun .force_duplex_full = 1,
574*4882a593Smuzhiyun },
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun .leds = {
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun .name = "adsl",
579*4882a593Smuzhiyun .gpio = 22,
580*4882a593Smuzhiyun .active_low = 1,
581*4882a593Smuzhiyun },
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun .name = "ppp-fail",
584*4882a593Smuzhiyun .gpio = 23,
585*4882a593Smuzhiyun },
586*4882a593Smuzhiyun {
587*4882a593Smuzhiyun .name = "power",
588*4882a593Smuzhiyun .gpio = 5,
589*4882a593Smuzhiyun .active_low = 1,
590*4882a593Smuzhiyun .default_trigger = "default-on",
591*4882a593Smuzhiyun },
592*4882a593Smuzhiyun {
593*4882a593Smuzhiyun .name = "stop",
594*4882a593Smuzhiyun .gpio = 4,
595*4882a593Smuzhiyun .active_low = 1,
596*4882a593Smuzhiyun },
597*4882a593Smuzhiyun },
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun static struct board_info __initdata board_AGPFS0 = {
601*4882a593Smuzhiyun .name = "AGPF-S0",
602*4882a593Smuzhiyun .expected_cpu_id = 0x6358,
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun .has_ehci0 = 1,
605*4882a593Smuzhiyun .has_ohci0 = 1,
606*4882a593Smuzhiyun .has_pci = 1,
607*4882a593Smuzhiyun .has_uart0 = 1,
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun .has_enet0 = 1,
610*4882a593Smuzhiyun .enet0 = {
611*4882a593Smuzhiyun .has_phy = 1,
612*4882a593Smuzhiyun .use_internal_phy = 1,
613*4882a593Smuzhiyun },
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun .has_enet1 = 1,
616*4882a593Smuzhiyun .enet1 = {
617*4882a593Smuzhiyun .force_speed_100 = 1,
618*4882a593Smuzhiyun .force_duplex_full = 1,
619*4882a593Smuzhiyun },
620*4882a593Smuzhiyun };
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun static struct board_info __initdata board_DWVS0 = {
623*4882a593Smuzhiyun .name = "DWV-S0",
624*4882a593Smuzhiyun .expected_cpu_id = 0x6358,
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun .has_ehci0 = 1,
627*4882a593Smuzhiyun .has_ohci0 = 1,
628*4882a593Smuzhiyun .has_pci = 1,
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun .has_enet0 = 1,
631*4882a593Smuzhiyun .enet0 = {
632*4882a593Smuzhiyun .has_phy = 1,
633*4882a593Smuzhiyun .use_internal_phy = 1,
634*4882a593Smuzhiyun },
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun .has_enet1 = 1,
637*4882a593Smuzhiyun .enet1 = {
638*4882a593Smuzhiyun .force_speed_100 = 1,
639*4882a593Smuzhiyun .force_duplex_full = 1,
640*4882a593Smuzhiyun },
641*4882a593Smuzhiyun };
642*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6358 */
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun /*
645*4882a593Smuzhiyun * all boards
646*4882a593Smuzhiyun */
647*4882a593Smuzhiyun static const struct board_info __initconst *bcm963xx_boards[] = {
648*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_3368
649*4882a593Smuzhiyun &board_cvg834g,
650*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_3368 */
651*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6328
652*4882a593Smuzhiyun &board_96328avng,
653*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6328 */
654*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6338
655*4882a593Smuzhiyun &board_96338gw,
656*4882a593Smuzhiyun &board_96338w,
657*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6338 */
658*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6345
659*4882a593Smuzhiyun &board_96345gw2,
660*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6345 */
661*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6348
662*4882a593Smuzhiyun &board_96348r,
663*4882a593Smuzhiyun &board_96348gw,
664*4882a593Smuzhiyun &board_96348gw_10,
665*4882a593Smuzhiyun &board_96348gw_11,
666*4882a593Smuzhiyun &board_FAST2404,
667*4882a593Smuzhiyun &board_DV201AMR,
668*4882a593Smuzhiyun &board_96348gw_a,
669*4882a593Smuzhiyun &board_rta1025w_16,
670*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6348 */
671*4882a593Smuzhiyun #ifdef CONFIG_BCM63XX_CPU_6358
672*4882a593Smuzhiyun &board_96358vw,
673*4882a593Smuzhiyun &board_96358vw2,
674*4882a593Smuzhiyun &board_AGPFS0,
675*4882a593Smuzhiyun &board_DWVS0,
676*4882a593Smuzhiyun #endif /* CONFIG_BCM63XX_CPU_6358 */
677*4882a593Smuzhiyun };
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun /*
680*4882a593Smuzhiyun * Register a sane SPROMv2 to make the on-board
681*4882a593Smuzhiyun * bcm4318 WLAN work
682*4882a593Smuzhiyun */
683*4882a593Smuzhiyun #ifdef CONFIG_SSB_PCIHOST
684*4882a593Smuzhiyun static struct ssb_sprom bcm63xx_sprom = {
685*4882a593Smuzhiyun .revision = 0x02,
686*4882a593Smuzhiyun .board_rev = 0x17,
687*4882a593Smuzhiyun .country_code = 0x0,
688*4882a593Smuzhiyun .ant_available_bg = 0x3,
689*4882a593Smuzhiyun .pa0b0 = 0x15ae,
690*4882a593Smuzhiyun .pa0b1 = 0xfa85,
691*4882a593Smuzhiyun .pa0b2 = 0xfe8d,
692*4882a593Smuzhiyun .pa1b0 = 0xffff,
693*4882a593Smuzhiyun .pa1b1 = 0xffff,
694*4882a593Smuzhiyun .pa1b2 = 0xffff,
695*4882a593Smuzhiyun .gpio0 = 0xff,
696*4882a593Smuzhiyun .gpio1 = 0xff,
697*4882a593Smuzhiyun .gpio2 = 0xff,
698*4882a593Smuzhiyun .gpio3 = 0xff,
699*4882a593Smuzhiyun .maxpwr_bg = 0x004c,
700*4882a593Smuzhiyun .itssi_bg = 0x00,
701*4882a593Smuzhiyun .boardflags_lo = 0x2848,
702*4882a593Smuzhiyun .boardflags_hi = 0x0000,
703*4882a593Smuzhiyun };
704*4882a593Smuzhiyun
bcm63xx_get_fallback_sprom(struct ssb_bus * bus,struct ssb_sprom * out)705*4882a593Smuzhiyun int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun if (bus->bustype == SSB_BUSTYPE_PCI) {
708*4882a593Smuzhiyun memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
709*4882a593Smuzhiyun return 0;
710*4882a593Smuzhiyun } else {
711*4882a593Smuzhiyun pr_err("unable to fill SPROM for given bustype\n");
712*4882a593Smuzhiyun return -EINVAL;
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun #endif /* CONFIG_SSB_PCIHOST */
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun /*
718*4882a593Smuzhiyun * return board name for /proc/cpuinfo
719*4882a593Smuzhiyun */
board_get_name(void)720*4882a593Smuzhiyun const char *board_get_name(void)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun return board.name;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun /*
726*4882a593Smuzhiyun * early init callback, read nvram data from flash and checksum it
727*4882a593Smuzhiyun */
board_prom_init(void)728*4882a593Smuzhiyun void __init board_prom_init(void)
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun unsigned int i;
731*4882a593Smuzhiyun u8 *boot_addr, *cfe;
732*4882a593Smuzhiyun char cfe_version[32];
733*4882a593Smuzhiyun char *board_name = NULL;
734*4882a593Smuzhiyun u32 val;
735*4882a593Smuzhiyun struct bcm_hcs *hcs;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* read base address of boot chip select (0)
738*4882a593Smuzhiyun * 6328/6362 do not have MPI but boot from a fixed address
739*4882a593Smuzhiyun */
740*4882a593Smuzhiyun if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
741*4882a593Smuzhiyun val = 0x18000000;
742*4882a593Smuzhiyun } else {
743*4882a593Smuzhiyun val = bcm_mpi_readl(MPI_CSBASE_REG(0));
744*4882a593Smuzhiyun val &= MPI_CSBASE_BASE_MASK;
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun boot_addr = (u8 *)KSEG1ADDR(val);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun /* dump cfe version */
749*4882a593Smuzhiyun cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
750*4882a593Smuzhiyun if (strstarts(cfe, "cfe-")) {
751*4882a593Smuzhiyun if(cfe[4] == 'v') {
752*4882a593Smuzhiyun if(cfe[5] == 'd')
753*4882a593Smuzhiyun snprintf(cfe_version, 11, "%s",
754*4882a593Smuzhiyun (char *) &cfe[5]);
755*4882a593Smuzhiyun else if (cfe[10] > 0)
756*4882a593Smuzhiyun snprintf(cfe_version, sizeof(cfe_version),
757*4882a593Smuzhiyun "%u.%u.%u-%u.%u-%u", cfe[5], cfe[6],
758*4882a593Smuzhiyun cfe[7], cfe[8], cfe[9], cfe[10]);
759*4882a593Smuzhiyun else
760*4882a593Smuzhiyun snprintf(cfe_version, sizeof(cfe_version),
761*4882a593Smuzhiyun "%u.%u.%u-%u.%u", cfe[5], cfe[6],
762*4882a593Smuzhiyun cfe[7], cfe[8], cfe[9]);
763*4882a593Smuzhiyun } else {
764*4882a593Smuzhiyun snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun } else {
767*4882a593Smuzhiyun strcpy(cfe_version, "unknown");
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun pr_info("CFE version: %s\n", cfe_version);
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun if (BCMCPU_IS_3368()) {
774*4882a593Smuzhiyun hcs = (struct bcm_hcs *)boot_addr;
775*4882a593Smuzhiyun board_name = hcs->filename;
776*4882a593Smuzhiyun } else {
777*4882a593Smuzhiyun board_name = bcm63xx_nvram_get_name();
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun /* find board by name */
780*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
781*4882a593Smuzhiyun if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
782*4882a593Smuzhiyun continue;
783*4882a593Smuzhiyun /* copy, board desc array is marked initdata */
784*4882a593Smuzhiyun memcpy(&board, bcm963xx_boards[i], sizeof(board));
785*4882a593Smuzhiyun break;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun /* bail out if board is not found, will complain later */
789*4882a593Smuzhiyun if (!board.name[0]) {
790*4882a593Smuzhiyun char name[17];
791*4882a593Smuzhiyun memcpy(name, board_name, 16);
792*4882a593Smuzhiyun name[16] = 0;
793*4882a593Smuzhiyun pr_err("unknown bcm963xx board: %s\n", name);
794*4882a593Smuzhiyun return;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun /* setup pin multiplexing depending on board enabled device,
798*4882a593Smuzhiyun * this has to be done this early since PCI init is done
799*4882a593Smuzhiyun * inside arch_initcall */
800*4882a593Smuzhiyun val = 0;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun #ifdef CONFIG_PCI
803*4882a593Smuzhiyun if (board.has_pci) {
804*4882a593Smuzhiyun bcm63xx_pci_enabled = 1;
805*4882a593Smuzhiyun if (BCMCPU_IS_6348())
806*4882a593Smuzhiyun val |= GPIO_MODE_6348_G2_PCI;
807*4882a593Smuzhiyun }
808*4882a593Smuzhiyun #endif /* CONFIG_PCI */
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun if (board.has_pccard) {
811*4882a593Smuzhiyun if (BCMCPU_IS_6348())
812*4882a593Smuzhiyun val |= GPIO_MODE_6348_G1_MII_PCCARD;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun if (board.has_enet0 && !board.enet0.use_internal_phy) {
816*4882a593Smuzhiyun if (BCMCPU_IS_6348())
817*4882a593Smuzhiyun val |= GPIO_MODE_6348_G3_EXT_MII |
818*4882a593Smuzhiyun GPIO_MODE_6348_G0_EXT_MII;
819*4882a593Smuzhiyun }
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun if (board.has_enet1 && !board.enet1.use_internal_phy) {
822*4882a593Smuzhiyun if (BCMCPU_IS_6348())
823*4882a593Smuzhiyun val |= GPIO_MODE_6348_G3_EXT_MII |
824*4882a593Smuzhiyun GPIO_MODE_6348_G0_EXT_MII;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun bcm_gpio_writel(val, GPIO_MODE_REG);
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun /*
831*4882a593Smuzhiyun * second stage init callback, good time to panic if we couldn't
832*4882a593Smuzhiyun * identify on which board we're running since early printk is working
833*4882a593Smuzhiyun */
board_setup(void)834*4882a593Smuzhiyun void __init board_setup(void)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun if (!board.name[0])
837*4882a593Smuzhiyun panic("unable to detect bcm963xx board");
838*4882a593Smuzhiyun pr_info("board name: %s\n", board.name);
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun /* make sure we're running on expected cpu */
841*4882a593Smuzhiyun if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
842*4882a593Smuzhiyun panic("unexpected CPU for bcm963xx board");
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun static struct gpio_led_platform_data bcm63xx_led_data;
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun static struct platform_device bcm63xx_gpio_leds = {
848*4882a593Smuzhiyun .name = "leds-gpio",
849*4882a593Smuzhiyun .id = 0,
850*4882a593Smuzhiyun .dev.platform_data = &bcm63xx_led_data,
851*4882a593Smuzhiyun };
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun /*
854*4882a593Smuzhiyun * third stage init callback, register all board devices.
855*4882a593Smuzhiyun */
board_register_devices(void)856*4882a593Smuzhiyun int __init board_register_devices(void)
857*4882a593Smuzhiyun {
858*4882a593Smuzhiyun if (board.has_uart0)
859*4882a593Smuzhiyun bcm63xx_uart_register(0);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun if (board.has_uart1)
862*4882a593Smuzhiyun bcm63xx_uart_register(1);
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun if (board.has_pccard)
865*4882a593Smuzhiyun bcm63xx_pcmcia_register();
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun if (board.has_enet0 &&
868*4882a593Smuzhiyun !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
869*4882a593Smuzhiyun bcm63xx_enet_register(0, &board.enet0);
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun if (board.has_enet1 &&
872*4882a593Smuzhiyun !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
873*4882a593Smuzhiyun bcm63xx_enet_register(1, &board.enet1);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun if (board.has_enetsw &&
876*4882a593Smuzhiyun !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
877*4882a593Smuzhiyun bcm63xx_enetsw_register(&board.enetsw);
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun if (board.has_usbd)
880*4882a593Smuzhiyun bcm63xx_usbd_register(&board.usbd);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun /* Generate MAC address for WLAN and register our SPROM,
883*4882a593Smuzhiyun * do this after registering enet devices
884*4882a593Smuzhiyun */
885*4882a593Smuzhiyun #ifdef CONFIG_SSB_PCIHOST
886*4882a593Smuzhiyun if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
887*4882a593Smuzhiyun memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
888*4882a593Smuzhiyun memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
889*4882a593Smuzhiyun if (ssb_arch_register_fallback_sprom(
890*4882a593Smuzhiyun &bcm63xx_get_fallback_sprom) < 0)
891*4882a593Smuzhiyun pr_err("failed to register fallback SPROM\n");
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun #endif /* CONFIG_SSB_PCIHOST */
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun bcm63xx_spi_register();
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun bcm63xx_hsspi_register();
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun bcm63xx_flash_register();
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
902*4882a593Smuzhiyun bcm63xx_led_data.leds = board.leds;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun platform_device_register(&bcm63xx_gpio_leds);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
907*4882a593Smuzhiyun gpio_request_one(board.ephy_reset_gpio,
908*4882a593Smuzhiyun board.ephy_reset_gpio_flags, "ephy-reset");
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun return 0;
911*4882a593Smuzhiyun }
912