xref: /OK3568_Linux_fs/kernel/arch/mips/bcm47xx/time.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *  This program is free software; you can redistribute  it and/or modify it
5*4882a593Smuzhiyun  *  under  the terms of  the GNU General  Public License as published by the
6*4882a593Smuzhiyun  *  Free Software Foundation;  either version 2 of the  License, or (at your
7*4882a593Smuzhiyun  *  option) any later version.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
10*4882a593Smuzhiyun  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
11*4882a593Smuzhiyun  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
12*4882a593Smuzhiyun  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
13*4882a593Smuzhiyun  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14*4882a593Smuzhiyun  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
15*4882a593Smuzhiyun  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16*4882a593Smuzhiyun  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
17*4882a593Smuzhiyun  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18*4882a593Smuzhiyun  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  *  You should have received a copy of the  GNU General Public License along
21*4882a593Smuzhiyun  *  with this program; if not, write  to the Free Software Foundation, Inc.,
22*4882a593Smuzhiyun  *  675 Mass Ave, Cambridge, MA 02139, USA.
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/ssb/ssb.h>
27*4882a593Smuzhiyun #include <asm/time.h>
28*4882a593Smuzhiyun #include <bcm47xx.h>
29*4882a593Smuzhiyun #include <bcm47xx_board.h>
30*4882a593Smuzhiyun 
plat_time_init(void)31*4882a593Smuzhiyun void __init plat_time_init(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	unsigned long hz = 0;
34*4882a593Smuzhiyun 	u16 chip_id = 0;
35*4882a593Smuzhiyun 	char buf[10];
36*4882a593Smuzhiyun 	int len;
37*4882a593Smuzhiyun 	enum bcm47xx_board board = bcm47xx_board_get();
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	/*
40*4882a593Smuzhiyun 	 * Use deterministic values for initial counter interrupt
41*4882a593Smuzhiyun 	 * so that calibrate delay avoids encountering a counter wrap.
42*4882a593Smuzhiyun 	 */
43*4882a593Smuzhiyun 	write_c0_count(0);
44*4882a593Smuzhiyun 	write_c0_compare(0xffff);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	switch (bcm47xx_bus_type) {
47*4882a593Smuzhiyun #ifdef CONFIG_BCM47XX_SSB
48*4882a593Smuzhiyun 	case BCM47XX_BUS_TYPE_SSB:
49*4882a593Smuzhiyun 		hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
50*4882a593Smuzhiyun 		chip_id = bcm47xx_bus.ssb.chip_id;
51*4882a593Smuzhiyun 		break;
52*4882a593Smuzhiyun #endif
53*4882a593Smuzhiyun #ifdef CONFIG_BCM47XX_BCMA
54*4882a593Smuzhiyun 	case BCM47XX_BUS_TYPE_BCMA:
55*4882a593Smuzhiyun 		hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
56*4882a593Smuzhiyun 		chip_id = bcm47xx_bus.bcma.bus.chipinfo.id;
57*4882a593Smuzhiyun 		break;
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun 	}
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	if (chip_id == 0x5354) {
62*4882a593Smuzhiyun 		len = bcm47xx_nvram_getenv("clkfreq", buf, sizeof(buf));
63*4882a593Smuzhiyun 		if (len >= 0 && !strncmp(buf, "200", 4))
64*4882a593Smuzhiyun 			hz = 100000000;
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	switch (board) {
68*4882a593Smuzhiyun 	case BCM47XX_BOARD_ASUS_WL520GC:
69*4882a593Smuzhiyun 	case BCM47XX_BOARD_ASUS_WL520GU:
70*4882a593Smuzhiyun 		hz = 100000000;
71*4882a593Smuzhiyun 		break;
72*4882a593Smuzhiyun 	default:
73*4882a593Smuzhiyun 		break;
74*4882a593Smuzhiyun 	}
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	if (!hz)
77*4882a593Smuzhiyun 		hz = 100000000;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
80*4882a593Smuzhiyun 	mips_hpt_frequency = hz;
81*4882a593Smuzhiyun }
82