1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * BRIEF MODULE DESCRIPTION
4*4882a593Smuzhiyun * MyCable XXS1500 board support
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright 2003, 2008 MontaVista Software Inc.
7*4882a593Smuzhiyun * Author: MontaVista Software, Inc. <source@mvista.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/gpio.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/pm.h>
17*4882a593Smuzhiyun #include <asm/bootinfo.h>
18*4882a593Smuzhiyun #include <asm/reboot.h>
19*4882a593Smuzhiyun #include <asm/setup.h>
20*4882a593Smuzhiyun #include <asm/mach-au1x00/au1000.h>
21*4882a593Smuzhiyun #include <asm/mach-au1x00/gpio-au1000.h>
22*4882a593Smuzhiyun #include <prom.h>
23*4882a593Smuzhiyun
get_system_type(void)24*4882a593Smuzhiyun const char *get_system_type(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun return "XXS1500";
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
prom_putchar(char c)29*4882a593Smuzhiyun void prom_putchar(char c)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
xxs1500_reset(char * c)34*4882a593Smuzhiyun static void xxs1500_reset(char *c)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun /* Jump to the reset vector */
37*4882a593Smuzhiyun __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
xxs1500_power_off(void)40*4882a593Smuzhiyun static void xxs1500_power_off(void)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun while (1)
43*4882a593Smuzhiyun asm volatile (
44*4882a593Smuzhiyun " .set mips32 \n"
45*4882a593Smuzhiyun " wait \n"
46*4882a593Smuzhiyun " .set mips0 \n");
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
board_setup(void)49*4882a593Smuzhiyun void __init board_setup(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun u32 pin_func;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun pm_power_off = xxs1500_power_off;
54*4882a593Smuzhiyun _machine_halt = xxs1500_power_off;
55*4882a593Smuzhiyun _machine_restart = xxs1500_reset;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun alchemy_gpio1_input_enable();
58*4882a593Smuzhiyun alchemy_gpio2_enable();
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
61*4882a593Smuzhiyun pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
62*4882a593Smuzhiyun pin_func |= SYS_PF_UR3;
63*4882a593Smuzhiyun alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* Enable UART */
66*4882a593Smuzhiyun alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
67*4882a593Smuzhiyun /* Enable DTR (MCR bit 0) = USB power up */
68*4882a593Smuzhiyun __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
69*4882a593Smuzhiyun wmb();
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /******************************************************************************/
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static struct resource xxs1500_pcmcia_res[] = {
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun .name = "pcmcia-io",
77*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
78*4882a593Smuzhiyun .start = AU1000_PCMCIA_IO_PHYS_ADDR,
79*4882a593Smuzhiyun .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
80*4882a593Smuzhiyun },
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun .name = "pcmcia-attr",
83*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
84*4882a593Smuzhiyun .start = AU1000_PCMCIA_ATTR_PHYS_ADDR,
85*4882a593Smuzhiyun .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
86*4882a593Smuzhiyun },
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun .name = "pcmcia-mem",
89*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
90*4882a593Smuzhiyun .start = AU1000_PCMCIA_MEM_PHYS_ADDR,
91*4882a593Smuzhiyun .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static struct platform_device xxs1500_pcmcia_dev = {
96*4882a593Smuzhiyun .name = "xxs1500_pcmcia",
97*4882a593Smuzhiyun .id = -1,
98*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(xxs1500_pcmcia_res),
99*4882a593Smuzhiyun .resource = xxs1500_pcmcia_res,
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static struct platform_device *xxs1500_devs[] __initdata = {
103*4882a593Smuzhiyun &xxs1500_pcmcia_dev,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
xxs1500_dev_init(void)106*4882a593Smuzhiyun static int __init xxs1500_dev_init(void)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
109*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
110*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
111*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
112*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
113*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
116*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
117*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
118*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
119*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
120*4882a593Smuzhiyun irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return platform_add_devices(xxs1500_devs,
123*4882a593Smuzhiyun ARRAY_SIZE(xxs1500_devs));
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun device_initcall(xxs1500_dev_init);
126