1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 3*4882a593Smuzhiyun * Copyright (C) 2008-2009 PetaLogix 4*4882a593Smuzhiyun * Copyright (C) 2006 Atmark Techno, Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 7*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 8*4882a593Smuzhiyun * for more details. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOUTPUT_ARCH(microblaze) 12*4882a593SmuzhiyunENTRY(microblaze_start) 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#define RO_EXCEPTION_TABLE_ALIGN 16 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun#include <asm/cache.h> 17*4882a593Smuzhiyun#include <asm/page.h> 18*4882a593Smuzhiyun#include <asm-generic/vmlinux.lds.h> 19*4882a593Smuzhiyun#include <asm/thread_info.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun#ifdef __MICROBLAZEEL__ 22*4882a593Smuzhiyunjiffies = jiffies_64; 23*4882a593Smuzhiyun#else 24*4882a593Smuzhiyunjiffies = jiffies_64 + 4; 25*4882a593Smuzhiyun#endif 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunSECTIONS { 28*4882a593Smuzhiyun . = CONFIG_KERNEL_START; 29*4882a593Smuzhiyun microblaze_start = CONFIG_KERNEL_BASE_ADDR; 30*4882a593Smuzhiyun .text : AT(ADDR(.text) - LOAD_OFFSET) { 31*4882a593Smuzhiyun _text = . ; 32*4882a593Smuzhiyun _stext = . ; 33*4882a593Smuzhiyun HEAD_TEXT 34*4882a593Smuzhiyun TEXT_TEXT 35*4882a593Smuzhiyun *(.fixup) 36*4882a593Smuzhiyun EXIT_TEXT 37*4882a593Smuzhiyun EXIT_CALL 38*4882a593Smuzhiyun SCHED_TEXT 39*4882a593Smuzhiyun CPUIDLE_TEXT 40*4882a593Smuzhiyun LOCK_TEXT 41*4882a593Smuzhiyun KPROBES_TEXT 42*4882a593Smuzhiyun IRQENTRY_TEXT 43*4882a593Smuzhiyun SOFTIRQENTRY_TEXT 44*4882a593Smuzhiyun . = ALIGN (4) ; 45*4882a593Smuzhiyun _etext = . ; 46*4882a593Smuzhiyun } 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun . = ALIGN (4) ; 49*4882a593Smuzhiyun __fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) { 50*4882a593Smuzhiyun _fdt_start = . ; /* place for fdt blob */ 51*4882a593Smuzhiyun *(__fdt_blob) ; /* Any link-placed DTB */ 52*4882a593Smuzhiyun . = _fdt_start + 0x10000; /* Pad up to 64kbyte */ 53*4882a593Smuzhiyun _fdt_end = . ; 54*4882a593Smuzhiyun } 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun . = ALIGN(16); 57*4882a593Smuzhiyun RO_DATA(4096) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * sdata2 section can go anywhere, but must be word aligned 61*4882a593Smuzhiyun * and SDA2_BASE must point to the middle of it 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) { 64*4882a593Smuzhiyun _ssrw = .; 65*4882a593Smuzhiyun . = ALIGN(PAGE_SIZE); /* page aligned when MMU used */ 66*4882a593Smuzhiyun *(.sdata2) 67*4882a593Smuzhiyun . = ALIGN(8); 68*4882a593Smuzhiyun _essrw = .; 69*4882a593Smuzhiyun _ssrw_size = _essrw - _ssrw; 70*4882a593Smuzhiyun _KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2); 71*4882a593Smuzhiyun } 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun _sdata = . ; 74*4882a593Smuzhiyun RW_DATA(32, PAGE_SIZE, THREAD_SIZE) 75*4882a593Smuzhiyun _edata = . ; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* Under the microblaze ABI, .sdata and .sbss must be contiguous */ 78*4882a593Smuzhiyun . = ALIGN(8); 79*4882a593Smuzhiyun .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) { 80*4882a593Smuzhiyun _ssro = .; 81*4882a593Smuzhiyun *(.sdata) 82*4882a593Smuzhiyun } 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) { 85*4882a593Smuzhiyun _ssbss = .; 86*4882a593Smuzhiyun *(.sbss) 87*4882a593Smuzhiyun _esbss = .; 88*4882a593Smuzhiyun _essro = .; 89*4882a593Smuzhiyun _ssro_size = _essro - _ssro ; 90*4882a593Smuzhiyun _KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ; 91*4882a593Smuzhiyun } 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun PERCPU_SECTION(L1_CACHE_BYTES) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun . = ALIGN(PAGE_SIZE); 96*4882a593Smuzhiyun __init_begin = .; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun INIT_TEXT_SECTION(PAGE_SIZE) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { 101*4882a593Smuzhiyun INIT_DATA 102*4882a593Smuzhiyun } 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun . = ALIGN(4); 105*4882a593Smuzhiyun .init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) { 106*4882a593Smuzhiyun __ivt_start = .; 107*4882a593Smuzhiyun *(.init.ivt) 108*4882a593Smuzhiyun __ivt_end = .; 109*4882a593Smuzhiyun } 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { 112*4882a593Smuzhiyun INIT_SETUP(0) 113*4882a593Smuzhiyun } 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) { 116*4882a593Smuzhiyun INIT_CALLS 117*4882a593Smuzhiyun } 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { 120*4882a593Smuzhiyun CON_INITCALL 121*4882a593Smuzhiyun } 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun __init_end_before_initramfs = .; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { 126*4882a593Smuzhiyun INIT_RAM_FS 127*4882a593Smuzhiyun } 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun __init_end = .; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun .bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) { 132*4882a593Smuzhiyun /* page aligned when MMU used */ 133*4882a593Smuzhiyun __bss_start = . ; 134*4882a593Smuzhiyun *(.bss*) 135*4882a593Smuzhiyun *(COMMON) 136*4882a593Smuzhiyun . = ALIGN (4) ; 137*4882a593Smuzhiyun __bss_stop = . ; 138*4882a593Smuzhiyun } 139*4882a593Smuzhiyun . = ALIGN(PAGE_SIZE); 140*4882a593Smuzhiyun _end = .; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun DISCARDS 143*4882a593Smuzhiyun} 144