xref: /OK3568_Linux_fs/kernel/arch/microblaze/kernel/misc.S (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Miscellaneous low-level MMU functions.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5*4882a593Smuzhiyun * Copyright (C) 2008-2009 PetaLogix
6*4882a593Smuzhiyun * Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Derived from arch/ppc/kernel/misc.S
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General
11*4882a593Smuzhiyun * Public License. See the file COPYING in the main directory of this
12*4882a593Smuzhiyun * archive for more details.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun#include <linux/linkage.h>
16*4882a593Smuzhiyun#include <linux/sys.h>
17*4882a593Smuzhiyun#include <asm/unistd.h>
18*4882a593Smuzhiyun#include <linux/errno.h>
19*4882a593Smuzhiyun#include <asm/mmu.h>
20*4882a593Smuzhiyun#include <asm/page.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	.text
23*4882a593Smuzhiyun/*
24*4882a593Smuzhiyun * Flush MMU TLB
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * We avoid flushing the pinned 0, 1 and possibly 2 entries.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun.globl _tlbia;
29*4882a593Smuzhiyun.type  _tlbia, @function
30*4882a593Smuzhiyun.align 4;
31*4882a593Smuzhiyun_tlbia:
32*4882a593Smuzhiyun	lwi	r12, r0, tlb_skip;
33*4882a593Smuzhiyun	/* isync */
34*4882a593Smuzhiyun_tlbia_1:
35*4882a593Smuzhiyun	mts	rtlbx, r12
36*4882a593Smuzhiyun	nop
37*4882a593Smuzhiyun	mts	rtlbhi, r0 /* flush: ensure V is clear */
38*4882a593Smuzhiyun	nop
39*4882a593Smuzhiyun	rsubi	r11, r12, MICROBLAZE_TLB_SIZE - 1
40*4882a593Smuzhiyun	bneid	r11, _tlbia_1 /* loop for all entries */
41*4882a593Smuzhiyun	addik	r12, r12, 1
42*4882a593Smuzhiyun	mbar	1 /* sync */
43*4882a593Smuzhiyun	rtsd	r15, 8
44*4882a593Smuzhiyun	nop
45*4882a593Smuzhiyun	.size  _tlbia, . - _tlbia
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/*
48*4882a593Smuzhiyun * Flush MMU TLB for a particular address (in r5)
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun.globl _tlbie;
51*4882a593Smuzhiyun.type  _tlbie, @function
52*4882a593Smuzhiyun.align 4;
53*4882a593Smuzhiyun_tlbie:
54*4882a593Smuzhiyun	mts	rtlbsx, r5 /* look up the address in TLB */
55*4882a593Smuzhiyun	nop
56*4882a593Smuzhiyun	mfs	r12, rtlbx /* Retrieve index */
57*4882a593Smuzhiyun	nop
58*4882a593Smuzhiyun	blti	r12, _tlbie_1 /* Check if found */
59*4882a593Smuzhiyun	mts	rtlbhi, r0 /* flush: ensure V is clear */
60*4882a593Smuzhiyun	nop
61*4882a593Smuzhiyun	mbar	1 /* sync */
62*4882a593Smuzhiyun_tlbie_1:
63*4882a593Smuzhiyun	rtsd	r15, 8
64*4882a593Smuzhiyun	nop
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	.size  _tlbie, . - _tlbie
67