1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun# For a description of the syntax of this configuration file, 3*4882a593Smuzhiyun# see Documentation/kbuild/kconfig-language.rst. 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun# Platform selection Kconfig menu for MicroBlaze targets 6*4882a593Smuzhiyun# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyunmenu "Platform options" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunconfig OPT_LIB_FUNCTION 11*4882a593Smuzhiyun bool "Optimalized lib function" 12*4882a593Smuzhiyun default y 13*4882a593Smuzhiyun help 14*4882a593Smuzhiyun Allows turn on optimalized library function (memcpy and memmove). 15*4882a593Smuzhiyun They are optimized by using word alignment. This will work 16*4882a593Smuzhiyun fine if both source and destination are aligned on the same 17*4882a593Smuzhiyun boundary. However, if they are aligned on different boundaries 18*4882a593Smuzhiyun shifts will be necessary. This might result in bad performance 19*4882a593Smuzhiyun on MicroBlaze systems without a barrel shifter. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunconfig OPT_LIB_ASM 22*4882a593Smuzhiyun bool "Optimalized lib function ASM" 23*4882a593Smuzhiyun depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1) 24*4882a593Smuzhiyun depends on CPU_BIG_ENDIAN 25*4882a593Smuzhiyun default n 26*4882a593Smuzhiyun help 27*4882a593Smuzhiyun Allows turn on optimalized library function (memcpy and memmove). 28*4882a593Smuzhiyun Function are written in asm code. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun# Definitions for MICROBLAZE0 31*4882a593Smuzhiyuncomment "Definitions for MICROBLAZE0" 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunconfig KERNEL_BASE_ADDR 34*4882a593Smuzhiyun hex "Physical address where Linux Kernel is" 35*4882a593Smuzhiyun default "0x90000000" 36*4882a593Smuzhiyun help 37*4882a593Smuzhiyun BASE Address for kernel 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_FAMILY 40*4882a593Smuzhiyun string "Targeted FPGA family" 41*4882a593Smuzhiyun default "virtex5" 42*4882a593Smuzhiyun 43*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_MSR_INSTR 44*4882a593Smuzhiyun int "USE_MSR_INSTR range (0:1)" 45*4882a593Smuzhiyun default 0 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_PCMP_INSTR 48*4882a593Smuzhiyun int "USE_PCMP_INSTR range (0:1)" 49*4882a593Smuzhiyun default 0 50*4882a593Smuzhiyun 51*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_BARREL 52*4882a593Smuzhiyun int "USE_BARREL range (0:1)" 53*4882a593Smuzhiyun default 0 54*4882a593Smuzhiyun 55*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_DIV 56*4882a593Smuzhiyun int "USE_DIV range (0:1)" 57*4882a593Smuzhiyun default 0 58*4882a593Smuzhiyun 59*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_HW_MUL 60*4882a593Smuzhiyun int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)" 61*4882a593Smuzhiyun default 0 62*4882a593Smuzhiyun 63*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_USE_FPU 64*4882a593Smuzhiyun int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)" 65*4882a593Smuzhiyun default 0 66*4882a593Smuzhiyun 67*4882a593Smuzhiyunconfig XILINX_MICROBLAZE0_HW_VER 68*4882a593Smuzhiyun string "Core version number" 69*4882a593Smuzhiyun default "7.10.d" 70*4882a593Smuzhiyun 71*4882a593Smuzhiyunendmenu 72