xref: /OK3568_Linux_fs/kernel/arch/m68k/mac/misc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Miscellaneous Mac68K-specific stuff
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/types.h>
7*4882a593Smuzhiyun #include <linux/errno.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/sched.h>
11*4882a593Smuzhiyun #include <linux/time.h>
12*4882a593Smuzhiyun #include <linux/rtc.h>
13*4882a593Smuzhiyun #include <linux/mm.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/adb.h>
16*4882a593Smuzhiyun #include <linux/cuda.h>
17*4882a593Smuzhiyun #include <linux/pmu.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/uaccess.h>
20*4882a593Smuzhiyun #include <asm/io.h>
21*4882a593Smuzhiyun #include <asm/segment.h>
22*4882a593Smuzhiyun #include <asm/setup.h>
23*4882a593Smuzhiyun #include <asm/macintosh.h>
24*4882a593Smuzhiyun #include <asm/mac_via.h>
25*4882a593Smuzhiyun #include <asm/mac_oss.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <asm/machdep.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun  * Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
31*4882a593Smuzhiyun  * times wrap in 2040. If we need to handle later times, the read_time functions
32*4882a593Smuzhiyun  * need to be changed to interpret wrapped times as post-2040.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define RTC_OFFSET 2082844800
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun static void (*rom_reset)(void);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_NVRAM)
40*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
cuda_pram_read_byte(int offset)41*4882a593Smuzhiyun static unsigned char cuda_pram_read_byte(int offset)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct adb_request req;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	if (cuda_request(&req, NULL, 4, CUDA_PACKET, CUDA_GET_PRAM,
46*4882a593Smuzhiyun 			 (offset >> 8) & 0xFF, offset & 0xFF) < 0)
47*4882a593Smuzhiyun 		return 0;
48*4882a593Smuzhiyun 	while (!req.complete)
49*4882a593Smuzhiyun 		cuda_poll();
50*4882a593Smuzhiyun 	return req.reply[3];
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
cuda_pram_write_byte(unsigned char data,int offset)53*4882a593Smuzhiyun static void cuda_pram_write_byte(unsigned char data, int offset)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	struct adb_request req;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	if (cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_SET_PRAM,
58*4882a593Smuzhiyun 			 (offset >> 8) & 0xFF, offset & 0xFF, data) < 0)
59*4882a593Smuzhiyun 		return;
60*4882a593Smuzhiyun 	while (!req.complete)
61*4882a593Smuzhiyun 		cuda_poll();
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun #endif /* CONFIG_ADB_CUDA */
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
pmu_pram_read_byte(int offset)66*4882a593Smuzhiyun static unsigned char pmu_pram_read_byte(int offset)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	struct adb_request req;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	if (pmu_request(&req, NULL, 3, PMU_READ_XPRAM,
71*4882a593Smuzhiyun 	                offset & 0xFF, 1) < 0)
72*4882a593Smuzhiyun 		return 0;
73*4882a593Smuzhiyun 	pmu_wait_complete(&req);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return req.reply[0];
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
pmu_pram_write_byte(unsigned char data,int offset)78*4882a593Smuzhiyun static void pmu_pram_write_byte(unsigned char data, int offset)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct adb_request req;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	if (pmu_request(&req, NULL, 4, PMU_WRITE_XPRAM,
83*4882a593Smuzhiyun 	                offset & 0xFF, 1, data) < 0)
84*4882a593Smuzhiyun 		return;
85*4882a593Smuzhiyun 	pmu_wait_complete(&req);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun #endif /* CONFIG_ADB_PMU */
88*4882a593Smuzhiyun #endif /* CONFIG_NVRAM */
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /*
91*4882a593Smuzhiyun  * VIA PRAM/RTC access routines
92*4882a593Smuzhiyun  *
93*4882a593Smuzhiyun  * Must be called with interrupts disabled and
94*4882a593Smuzhiyun  * the RTC should be enabled.
95*4882a593Smuzhiyun  */
96*4882a593Smuzhiyun 
via_rtc_recv(void)97*4882a593Smuzhiyun static __u8 via_rtc_recv(void)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	int i, reg;
100*4882a593Smuzhiyun 	__u8 data;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	reg = via1[vBufB] & ~VIA1B_vRTCClk;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	/* Set the RTC data line to be an input. */
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	via1[vDirB] &= ~VIA1B_vRTCData;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	/* The bits of the byte come out in MSB order */
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	data = 0;
111*4882a593Smuzhiyun 	for (i = 0 ; i < 8 ; i++) {
112*4882a593Smuzhiyun 		via1[vBufB] = reg;
113*4882a593Smuzhiyun 		via1[vBufB] = reg | VIA1B_vRTCClk;
114*4882a593Smuzhiyun 		data = (data << 1) | (via1[vBufB] & VIA1B_vRTCData);
115*4882a593Smuzhiyun 	}
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	/* Return RTC data line to output state */
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	via1[vDirB] |= VIA1B_vRTCData;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	return data;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
via_rtc_send(__u8 data)124*4882a593Smuzhiyun static void via_rtc_send(__u8 data)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	int i, reg, bit;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	reg = via1[vBufB] & ~(VIA1B_vRTCClk | VIA1B_vRTCData);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	/* The bits of the byte go in in MSB order */
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	for (i = 0 ; i < 8 ; i++) {
133*4882a593Smuzhiyun 		bit = data & 0x80? 1 : 0;
134*4882a593Smuzhiyun 		data <<= 1;
135*4882a593Smuzhiyun 		via1[vBufB] = reg | bit;
136*4882a593Smuzhiyun 		via1[vBufB] = reg | bit | VIA1B_vRTCClk;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /*
141*4882a593Smuzhiyun  * These values can be found in Inside Macintosh vol. III ch. 2
142*4882a593Smuzhiyun  * which has a description of the RTC chip in the original Mac.
143*4882a593Smuzhiyun  */
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define RTC_FLG_READ            BIT(7)
146*4882a593Smuzhiyun #define RTC_FLG_WRITE_PROTECT   BIT(7)
147*4882a593Smuzhiyun #define RTC_CMD_READ(r)         (RTC_FLG_READ | (r << 2))
148*4882a593Smuzhiyun #define RTC_CMD_WRITE(r)        (r << 2)
149*4882a593Smuzhiyun #define RTC_REG_SECONDS_0       0
150*4882a593Smuzhiyun #define RTC_REG_SECONDS_1       1
151*4882a593Smuzhiyun #define RTC_REG_SECONDS_2       2
152*4882a593Smuzhiyun #define RTC_REG_SECONDS_3       3
153*4882a593Smuzhiyun #define RTC_REG_WRITE_PROTECT   13
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun /*
156*4882a593Smuzhiyun  * Inside Mac has no information about two-byte RTC commands but
157*4882a593Smuzhiyun  * the MAME/MESS source code has the essentials.
158*4882a593Smuzhiyun  */
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #define RTC_REG_XPRAM           14
161*4882a593Smuzhiyun #define RTC_CMD_XPRAM_READ      (RTC_CMD_READ(RTC_REG_XPRAM) << 8)
162*4882a593Smuzhiyun #define RTC_CMD_XPRAM_WRITE     (RTC_CMD_WRITE(RTC_REG_XPRAM) << 8)
163*4882a593Smuzhiyun #define RTC_CMD_XPRAM_ARG(a)    (((a & 0xE0) << 3) | ((a & 0x1F) << 2))
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun /*
166*4882a593Smuzhiyun  * Execute a VIA PRAM/RTC command. For read commands
167*4882a593Smuzhiyun  * data should point to a one-byte buffer for the
168*4882a593Smuzhiyun  * resulting data. For write commands it should point
169*4882a593Smuzhiyun  * to the data byte to for the command.
170*4882a593Smuzhiyun  *
171*4882a593Smuzhiyun  * This function disables all interrupts while running.
172*4882a593Smuzhiyun  */
173*4882a593Smuzhiyun 
via_rtc_command(int command,__u8 * data)174*4882a593Smuzhiyun static void via_rtc_command(int command, __u8 *data)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	unsigned long flags;
177*4882a593Smuzhiyun 	int is_read;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	local_irq_save(flags);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	/* The least significant bits must be 0b01 according to Inside Mac */
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	command = (command & ~3) | 1;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/* Enable the RTC and make sure the strobe line is high */
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	via1[vBufB] = (via1[vBufB] | VIA1B_vRTCClk) & ~VIA1B_vRTCEnb;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	if (command & 0xFF00) {		/* extended (two-byte) command */
190*4882a593Smuzhiyun 		via_rtc_send((command & 0xFF00) >> 8);
191*4882a593Smuzhiyun 		via_rtc_send(command & 0xFF);
192*4882a593Smuzhiyun 		is_read = command & (RTC_FLG_READ << 8);
193*4882a593Smuzhiyun 	} else {			/* one-byte command */
194*4882a593Smuzhiyun 		via_rtc_send(command);
195*4882a593Smuzhiyun 		is_read = command & RTC_FLG_READ;
196*4882a593Smuzhiyun 	}
197*4882a593Smuzhiyun 	if (is_read) {
198*4882a593Smuzhiyun 		*data = via_rtc_recv();
199*4882a593Smuzhiyun 	} else {
200*4882a593Smuzhiyun 		via_rtc_send(*data);
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	/* All done, disable the RTC */
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	via1[vBufB] |= VIA1B_vRTCEnb;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	local_irq_restore(flags);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_NVRAM)
via_pram_read_byte(int offset)211*4882a593Smuzhiyun static unsigned char via_pram_read_byte(int offset)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	unsigned char temp;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_XPRAM_READ | RTC_CMD_XPRAM_ARG(offset), &temp);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	return temp;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
via_pram_write_byte(unsigned char data,int offset)220*4882a593Smuzhiyun static void via_pram_write_byte(unsigned char data, int offset)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	unsigned char temp;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	temp = 0x55;
225*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	temp = data;
228*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_XPRAM_WRITE | RTC_CMD_XPRAM_ARG(offset), &temp);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	temp = 0x55 | RTC_FLG_WRITE_PROTECT;
231*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun #endif /* CONFIG_NVRAM */
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun /*
236*4882a593Smuzhiyun  * Return the current time in seconds since January 1, 1904.
237*4882a593Smuzhiyun  *
238*4882a593Smuzhiyun  * This only works on machines with the VIA-based PRAM/RTC, which
239*4882a593Smuzhiyun  * is basically any machine with Mac II-style ADB.
240*4882a593Smuzhiyun  */
241*4882a593Smuzhiyun 
via_read_time(void)242*4882a593Smuzhiyun static time64_t via_read_time(void)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	union {
245*4882a593Smuzhiyun 		__u8 cdata[4];
246*4882a593Smuzhiyun 		__u32 idata;
247*4882a593Smuzhiyun 	} result, last_result;
248*4882a593Smuzhiyun 	int count = 1;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_0), &last_result.cdata[3]);
251*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_1), &last_result.cdata[2]);
252*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_2), &last_result.cdata[1]);
253*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_3), &last_result.cdata[0]);
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	/*
256*4882a593Smuzhiyun 	 * The NetBSD guys say to loop until you get the same reading
257*4882a593Smuzhiyun 	 * twice in a row.
258*4882a593Smuzhiyun 	 */
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	while (1) {
261*4882a593Smuzhiyun 		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_0),
262*4882a593Smuzhiyun 		                &result.cdata[3]);
263*4882a593Smuzhiyun 		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_1),
264*4882a593Smuzhiyun 		                &result.cdata[2]);
265*4882a593Smuzhiyun 		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_2),
266*4882a593Smuzhiyun 		                &result.cdata[1]);
267*4882a593Smuzhiyun 		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_3),
268*4882a593Smuzhiyun 		                &result.cdata[0]);
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 		if (result.idata == last_result.idata)
271*4882a593Smuzhiyun 			return (time64_t)result.idata - RTC_OFFSET;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 		if (++count > 10)
274*4882a593Smuzhiyun 			break;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 		last_result.idata = result.idata;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	pr_err("%s: failed to read a stable value; got 0x%08x then 0x%08x\n",
280*4882a593Smuzhiyun 	       __func__, last_result.idata, result.idata);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun /*
286*4882a593Smuzhiyun  * Set the current time to a number of seconds since January 1, 1904.
287*4882a593Smuzhiyun  *
288*4882a593Smuzhiyun  * This only works on machines with the VIA-based PRAM/RTC, which
289*4882a593Smuzhiyun  * is basically any machine with Mac II-style ADB.
290*4882a593Smuzhiyun  */
291*4882a593Smuzhiyun 
via_set_rtc_time(struct rtc_time * tm)292*4882a593Smuzhiyun static void via_set_rtc_time(struct rtc_time *tm)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	union {
295*4882a593Smuzhiyun 		__u8 cdata[4];
296*4882a593Smuzhiyun 		__u32 idata;
297*4882a593Smuzhiyun 	} data;
298*4882a593Smuzhiyun 	__u8 temp;
299*4882a593Smuzhiyun 	time64_t time;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	time = mktime64(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday,
302*4882a593Smuzhiyun 	                tm->tm_hour, tm->tm_min, tm->tm_sec);
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	/* Clear the write protect bit */
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	temp = 0x55;
307*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	data.idata = lower_32_bits(time + RTC_OFFSET);
310*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_0), &data.cdata[3]);
311*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_1), &data.cdata[2]);
312*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_2), &data.cdata[1]);
313*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_3), &data.cdata[0]);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/* Set the write protect bit */
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	temp = 0x55 | RTC_FLG_WRITE_PROTECT;
318*4882a593Smuzhiyun 	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
via_shutdown(void)321*4882a593Smuzhiyun static void via_shutdown(void)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	if (rbv_present) {
324*4882a593Smuzhiyun 		via2[rBufB] &= ~0x04;
325*4882a593Smuzhiyun 	} else {
326*4882a593Smuzhiyun 		/* Direction of vDirB is output */
327*4882a593Smuzhiyun 		via2[vDirB] |= 0x04;
328*4882a593Smuzhiyun 		/* Send a value of 0 on that line */
329*4882a593Smuzhiyun 		via2[vBufB] &= ~0x04;
330*4882a593Smuzhiyun 		mdelay(1000);
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun 
oss_shutdown(void)334*4882a593Smuzhiyun static void oss_shutdown(void)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun 	oss->rom_ctrl = OSS_POWEROFF;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
cuda_restart(void)340*4882a593Smuzhiyun static void cuda_restart(void)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct adb_request req;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM) < 0)
345*4882a593Smuzhiyun 		return;
346*4882a593Smuzhiyun 	while (!req.complete)
347*4882a593Smuzhiyun 		cuda_poll();
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun 
cuda_shutdown(void)350*4882a593Smuzhiyun static void cuda_shutdown(void)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun 	struct adb_request req;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN) < 0)
355*4882a593Smuzhiyun 		return;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* Avoid infinite polling loop when PSU is not under Cuda control */
358*4882a593Smuzhiyun 	switch (macintosh_config->ident) {
359*4882a593Smuzhiyun 	case MAC_MODEL_C660:
360*4882a593Smuzhiyun 	case MAC_MODEL_Q605:
361*4882a593Smuzhiyun 	case MAC_MODEL_Q605_ACC:
362*4882a593Smuzhiyun 	case MAC_MODEL_P475:
363*4882a593Smuzhiyun 	case MAC_MODEL_P475F:
364*4882a593Smuzhiyun 		return;
365*4882a593Smuzhiyun 	}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	while (!req.complete)
368*4882a593Smuzhiyun 		cuda_poll();
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun #endif /* CONFIG_ADB_CUDA */
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun /*
373*4882a593Smuzhiyun  *-------------------------------------------------------------------
374*4882a593Smuzhiyun  * Below this point are the generic routines; they'll dispatch to the
375*4882a593Smuzhiyun  * correct routine for the hardware on which we're running.
376*4882a593Smuzhiyun  *-------------------------------------------------------------------
377*4882a593Smuzhiyun  */
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_NVRAM)
mac_pram_read_byte(int addr)380*4882a593Smuzhiyun unsigned char mac_pram_read_byte(int addr)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun 	switch (macintosh_config->adb_type) {
383*4882a593Smuzhiyun 	case MAC_ADB_IOP:
384*4882a593Smuzhiyun 	case MAC_ADB_II:
385*4882a593Smuzhiyun 	case MAC_ADB_PB1:
386*4882a593Smuzhiyun 		return via_pram_read_byte(addr);
387*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
388*4882a593Smuzhiyun 	case MAC_ADB_EGRET:
389*4882a593Smuzhiyun 	case MAC_ADB_CUDA:
390*4882a593Smuzhiyun 		return cuda_pram_read_byte(addr);
391*4882a593Smuzhiyun #endif
392*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
393*4882a593Smuzhiyun 	case MAC_ADB_PB2:
394*4882a593Smuzhiyun 		return pmu_pram_read_byte(addr);
395*4882a593Smuzhiyun #endif
396*4882a593Smuzhiyun 	default:
397*4882a593Smuzhiyun 		return 0xFF;
398*4882a593Smuzhiyun 	}
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
mac_pram_write_byte(unsigned char val,int addr)401*4882a593Smuzhiyun void mac_pram_write_byte(unsigned char val, int addr)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	switch (macintosh_config->adb_type) {
404*4882a593Smuzhiyun 	case MAC_ADB_IOP:
405*4882a593Smuzhiyun 	case MAC_ADB_II:
406*4882a593Smuzhiyun 	case MAC_ADB_PB1:
407*4882a593Smuzhiyun 		via_pram_write_byte(val, addr);
408*4882a593Smuzhiyun 		break;
409*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
410*4882a593Smuzhiyun 	case MAC_ADB_EGRET:
411*4882a593Smuzhiyun 	case MAC_ADB_CUDA:
412*4882a593Smuzhiyun 		cuda_pram_write_byte(val, addr);
413*4882a593Smuzhiyun 		break;
414*4882a593Smuzhiyun #endif
415*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
416*4882a593Smuzhiyun 	case MAC_ADB_PB2:
417*4882a593Smuzhiyun 		pmu_pram_write_byte(val, addr);
418*4882a593Smuzhiyun 		break;
419*4882a593Smuzhiyun #endif
420*4882a593Smuzhiyun 	default:
421*4882a593Smuzhiyun 		break;
422*4882a593Smuzhiyun 	}
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun 
mac_pram_get_size(void)425*4882a593Smuzhiyun ssize_t mac_pram_get_size(void)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	return 256;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun #endif /* CONFIG_NVRAM */
430*4882a593Smuzhiyun 
mac_poweroff(void)431*4882a593Smuzhiyun void mac_poweroff(void)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	if (oss_present) {
434*4882a593Smuzhiyun 		oss_shutdown();
435*4882a593Smuzhiyun 	} else if (macintosh_config->adb_type == MAC_ADB_II) {
436*4882a593Smuzhiyun 		via_shutdown();
437*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
438*4882a593Smuzhiyun 	} else if (macintosh_config->adb_type == MAC_ADB_EGRET ||
439*4882a593Smuzhiyun 	           macintosh_config->adb_type == MAC_ADB_CUDA) {
440*4882a593Smuzhiyun 		cuda_shutdown();
441*4882a593Smuzhiyun #endif
442*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
443*4882a593Smuzhiyun 	} else if (macintosh_config->adb_type == MAC_ADB_PB2) {
444*4882a593Smuzhiyun 		pmu_shutdown();
445*4882a593Smuzhiyun #endif
446*4882a593Smuzhiyun 	}
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	pr_crit("It is now safe to turn off your Macintosh.\n");
449*4882a593Smuzhiyun 	local_irq_disable();
450*4882a593Smuzhiyun 	while(1);
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
mac_reset(void)453*4882a593Smuzhiyun void mac_reset(void)
454*4882a593Smuzhiyun {
455*4882a593Smuzhiyun 	if (macintosh_config->adb_type == MAC_ADB_II &&
456*4882a593Smuzhiyun 	    macintosh_config->ident != MAC_MODEL_SE30) {
457*4882a593Smuzhiyun 		/* need ROMBASE in booter */
458*4882a593Smuzhiyun 		/* indeed, plus need to MAP THE ROM !! */
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 		if (mac_bi_data.rombase == 0)
461*4882a593Smuzhiyun 			mac_bi_data.rombase = 0x40800000;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 		/* works on some */
464*4882a593Smuzhiyun 		rom_reset = (void *) (mac_bi_data.rombase + 0xa);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 		local_irq_disable();
467*4882a593Smuzhiyun 		rom_reset();
468*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
469*4882a593Smuzhiyun 	} else if (macintosh_config->adb_type == MAC_ADB_EGRET ||
470*4882a593Smuzhiyun 	           macintosh_config->adb_type == MAC_ADB_CUDA) {
471*4882a593Smuzhiyun 		cuda_restart();
472*4882a593Smuzhiyun #endif
473*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
474*4882a593Smuzhiyun 	} else if (macintosh_config->adb_type == MAC_ADB_PB2) {
475*4882a593Smuzhiyun 		pmu_restart();
476*4882a593Smuzhiyun #endif
477*4882a593Smuzhiyun 	} else if (CPU_IS_030) {
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 		/* 030-specific reset routine.  The idea is general, but the
480*4882a593Smuzhiyun 		 * specific registers to reset are '030-specific.  Until I
481*4882a593Smuzhiyun 		 * have a non-030 machine, I can't test anything else.
482*4882a593Smuzhiyun 		 *  -- C. Scott Ananian <cananian@alumni.princeton.edu>
483*4882a593Smuzhiyun 		 */
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 		unsigned long rombase = 0x40000000;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 		/* make a 1-to-1 mapping, using the transparent tran. reg. */
488*4882a593Smuzhiyun 		unsigned long virt = (unsigned long) mac_reset;
489*4882a593Smuzhiyun 		unsigned long phys = virt_to_phys(mac_reset);
490*4882a593Smuzhiyun 		unsigned long addr = (phys&0xFF000000)|0x8777;
491*4882a593Smuzhiyun 		unsigned long offset = phys-virt;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 		local_irq_disable(); /* lets not screw this up, ok? */
494*4882a593Smuzhiyun 		__asm__ __volatile__(".chip 68030\n\t"
495*4882a593Smuzhiyun 				     "pmove %0,%/tt0\n\t"
496*4882a593Smuzhiyun 				     ".chip 68k"
497*4882a593Smuzhiyun 				     : : "m" (addr));
498*4882a593Smuzhiyun 		/* Now jump to physical address so we can disable MMU */
499*4882a593Smuzhiyun 		__asm__ __volatile__(
500*4882a593Smuzhiyun 		    ".chip 68030\n\t"
501*4882a593Smuzhiyun 		    "lea %/pc@(1f),%/a0\n\t"
502*4882a593Smuzhiyun 		    "addl %0,%/a0\n\t"/* fixup target address and stack ptr */
503*4882a593Smuzhiyun 		    "addl %0,%/sp\n\t"
504*4882a593Smuzhiyun 		    "pflusha\n\t"
505*4882a593Smuzhiyun 		    "jmp %/a0@\n\t" /* jump into physical memory */
506*4882a593Smuzhiyun 		    "0:.long 0\n\t" /* a constant zero. */
507*4882a593Smuzhiyun 		    /* OK.  Now reset everything and jump to reset vector. */
508*4882a593Smuzhiyun 		    "1:\n\t"
509*4882a593Smuzhiyun 		    "lea %/pc@(0b),%/a0\n\t"
510*4882a593Smuzhiyun 		    "pmove %/a0@, %/tc\n\t" /* disable mmu */
511*4882a593Smuzhiyun 		    "pmove %/a0@, %/tt0\n\t" /* disable tt0 */
512*4882a593Smuzhiyun 		    "pmove %/a0@, %/tt1\n\t" /* disable tt1 */
513*4882a593Smuzhiyun 		    "movel #0, %/a0\n\t"
514*4882a593Smuzhiyun 		    "movec %/a0, %/vbr\n\t" /* clear vector base register */
515*4882a593Smuzhiyun 		    "movec %/a0, %/cacr\n\t" /* disable caches */
516*4882a593Smuzhiyun 		    "movel #0x0808,%/a0\n\t"
517*4882a593Smuzhiyun 		    "movec %/a0, %/cacr\n\t" /* flush i&d caches */
518*4882a593Smuzhiyun 		    "movew #0x2700,%/sr\n\t" /* set up status register */
519*4882a593Smuzhiyun 		    "movel %1@(0x0),%/a0\n\t"/* load interrupt stack pointer */
520*4882a593Smuzhiyun 		    "movec %/a0, %/isp\n\t"
521*4882a593Smuzhiyun 		    "movel %1@(0x4),%/a0\n\t" /* load reset vector */
522*4882a593Smuzhiyun 		    "reset\n\t" /* reset external devices */
523*4882a593Smuzhiyun 		    "jmp %/a0@\n\t" /* jump to the reset vector */
524*4882a593Smuzhiyun 		    ".chip 68k"
525*4882a593Smuzhiyun 		    : : "r" (offset), "a" (rombase) : "a0");
526*4882a593Smuzhiyun 	}
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	/* should never get here */
529*4882a593Smuzhiyun 	pr_crit("Restart failed. Please restart manually.\n");
530*4882a593Smuzhiyun 	local_irq_disable();
531*4882a593Smuzhiyun 	while(1);
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun /*
535*4882a593Smuzhiyun  * This function translates seconds since 1970 into a proper date.
536*4882a593Smuzhiyun  *
537*4882a593Smuzhiyun  * Algorithm cribbed from glibc2.1, __offtime().
538*4882a593Smuzhiyun  *
539*4882a593Smuzhiyun  * This is roughly same as rtc_time64_to_tm(), which we should probably
540*4882a593Smuzhiyun  * use here, but it's only available when CONFIG_RTC_LIB is enabled.
541*4882a593Smuzhiyun  */
542*4882a593Smuzhiyun #define SECS_PER_MINUTE (60)
543*4882a593Smuzhiyun #define SECS_PER_HOUR  (SECS_PER_MINUTE * 60)
544*4882a593Smuzhiyun #define SECS_PER_DAY   (SECS_PER_HOUR * 24)
545*4882a593Smuzhiyun 
unmktime(time64_t time,long offset,int * yearp,int * monp,int * dayp,int * hourp,int * minp,int * secp)546*4882a593Smuzhiyun static void unmktime(time64_t time, long offset,
547*4882a593Smuzhiyun 		     int *yearp, int *monp, int *dayp,
548*4882a593Smuzhiyun 		     int *hourp, int *minp, int *secp)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun         /* How many days come before each month (0-12).  */
551*4882a593Smuzhiyun 	static const unsigned short int __mon_yday[2][13] =
552*4882a593Smuzhiyun 	{
553*4882a593Smuzhiyun 		/* Normal years.  */
554*4882a593Smuzhiyun 		{ 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
555*4882a593Smuzhiyun 		/* Leap years.  */
556*4882a593Smuzhiyun 		{ 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
557*4882a593Smuzhiyun 	};
558*4882a593Smuzhiyun 	int days, rem, y, wday, yday;
559*4882a593Smuzhiyun 	const unsigned short int *ip;
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 	days = div_u64_rem(time, SECS_PER_DAY, &rem);
562*4882a593Smuzhiyun 	rem += offset;
563*4882a593Smuzhiyun 	while (rem < 0) {
564*4882a593Smuzhiyun 		rem += SECS_PER_DAY;
565*4882a593Smuzhiyun 		--days;
566*4882a593Smuzhiyun 	}
567*4882a593Smuzhiyun 	while (rem >= SECS_PER_DAY) {
568*4882a593Smuzhiyun 		rem -= SECS_PER_DAY;
569*4882a593Smuzhiyun 		++days;
570*4882a593Smuzhiyun 	}
571*4882a593Smuzhiyun 	*hourp = rem / SECS_PER_HOUR;
572*4882a593Smuzhiyun 	rem %= SECS_PER_HOUR;
573*4882a593Smuzhiyun 	*minp = rem / SECS_PER_MINUTE;
574*4882a593Smuzhiyun 	*secp = rem % SECS_PER_MINUTE;
575*4882a593Smuzhiyun 	/* January 1, 1970 was a Thursday. */
576*4882a593Smuzhiyun 	wday = (4 + days) % 7; /* Day in the week. Not currently used */
577*4882a593Smuzhiyun 	if (wday < 0) wday += 7;
578*4882a593Smuzhiyun 	y = 1970;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun #define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
581*4882a593Smuzhiyun #define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
582*4882a593Smuzhiyun #define __isleap(year)	\
583*4882a593Smuzhiyun   ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	while (days < 0 || days >= (__isleap (y) ? 366 : 365))
586*4882a593Smuzhiyun 	{
587*4882a593Smuzhiyun 		/* Guess a corrected year, assuming 365 days per year.  */
588*4882a593Smuzhiyun 		long int yg = y + days / 365 - (days % 365 < 0);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 		/* Adjust DAYS and Y to match the guessed year.  */
591*4882a593Smuzhiyun 		days -= (yg - y) * 365 +
592*4882a593Smuzhiyun 			LEAPS_THRU_END_OF(yg - 1) - LEAPS_THRU_END_OF(y - 1);
593*4882a593Smuzhiyun 		y = yg;
594*4882a593Smuzhiyun 	}
595*4882a593Smuzhiyun 	*yearp = y - 1900;
596*4882a593Smuzhiyun 	yday = days; /* day in the year.  Not currently used. */
597*4882a593Smuzhiyun 	ip = __mon_yday[__isleap(y)];
598*4882a593Smuzhiyun 	for (y = 11; days < (long int) ip[y]; --y)
599*4882a593Smuzhiyun 		continue;
600*4882a593Smuzhiyun 	days -= ip[y];
601*4882a593Smuzhiyun 	*monp = y;
602*4882a593Smuzhiyun 	*dayp = days + 1; /* day in the month */
603*4882a593Smuzhiyun 	return;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun /*
607*4882a593Smuzhiyun  * Read/write the hardware clock.
608*4882a593Smuzhiyun  */
609*4882a593Smuzhiyun 
mac_hwclk(int op,struct rtc_time * t)610*4882a593Smuzhiyun int mac_hwclk(int op, struct rtc_time *t)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	time64_t now;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	if (!op) { /* read */
615*4882a593Smuzhiyun 		switch (macintosh_config->adb_type) {
616*4882a593Smuzhiyun 		case MAC_ADB_IOP:
617*4882a593Smuzhiyun 		case MAC_ADB_II:
618*4882a593Smuzhiyun 		case MAC_ADB_PB1:
619*4882a593Smuzhiyun 			now = via_read_time();
620*4882a593Smuzhiyun 			break;
621*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
622*4882a593Smuzhiyun 		case MAC_ADB_EGRET:
623*4882a593Smuzhiyun 		case MAC_ADB_CUDA:
624*4882a593Smuzhiyun 			now = cuda_get_time();
625*4882a593Smuzhiyun 			break;
626*4882a593Smuzhiyun #endif
627*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
628*4882a593Smuzhiyun 		case MAC_ADB_PB2:
629*4882a593Smuzhiyun 			now = pmu_get_time();
630*4882a593Smuzhiyun 			break;
631*4882a593Smuzhiyun #endif
632*4882a593Smuzhiyun 		default:
633*4882a593Smuzhiyun 			now = 0;
634*4882a593Smuzhiyun 		}
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 		t->tm_wday = 0;
637*4882a593Smuzhiyun 		unmktime(now, 0,
638*4882a593Smuzhiyun 			 &t->tm_year, &t->tm_mon, &t->tm_mday,
639*4882a593Smuzhiyun 			 &t->tm_hour, &t->tm_min, &t->tm_sec);
640*4882a593Smuzhiyun 		pr_debug("%s: read %ptR\n", __func__, t);
641*4882a593Smuzhiyun 	} else { /* write */
642*4882a593Smuzhiyun 		pr_debug("%s: tried to write %ptR\n", __func__, t);
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 		switch (macintosh_config->adb_type) {
645*4882a593Smuzhiyun 		case MAC_ADB_IOP:
646*4882a593Smuzhiyun 		case MAC_ADB_II:
647*4882a593Smuzhiyun 		case MAC_ADB_PB1:
648*4882a593Smuzhiyun 			via_set_rtc_time(t);
649*4882a593Smuzhiyun 			break;
650*4882a593Smuzhiyun #ifdef CONFIG_ADB_CUDA
651*4882a593Smuzhiyun 		case MAC_ADB_EGRET:
652*4882a593Smuzhiyun 		case MAC_ADB_CUDA:
653*4882a593Smuzhiyun 			cuda_set_rtc_time(t);
654*4882a593Smuzhiyun 			break;
655*4882a593Smuzhiyun #endif
656*4882a593Smuzhiyun #ifdef CONFIG_ADB_PMU
657*4882a593Smuzhiyun 		case MAC_ADB_PB2:
658*4882a593Smuzhiyun 			pmu_set_rtc_time(t);
659*4882a593Smuzhiyun 			break;
660*4882a593Smuzhiyun #endif
661*4882a593Smuzhiyun 		default:
662*4882a593Smuzhiyun 			return -ENODEV;
663*4882a593Smuzhiyun 		}
664*4882a593Smuzhiyun 	}
665*4882a593Smuzhiyun 	return 0;
666*4882a593Smuzhiyun }
667