1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* sun3xflop.h: Sun3/80 specific parts of the floppy driver.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Derived partially from asm-sparc/floppy.h, which is:
5*4882a593Smuzhiyun * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Sun3x version 2/4/2000 Sam Creasey (sammy@sammy.net)
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef __ASM_SUN3X_FLOPPY_H
11*4882a593Smuzhiyun #define __ASM_SUN3X_FLOPPY_H
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/pgtable.h>
14*4882a593Smuzhiyun #include <asm/page.h>
15*4882a593Smuzhiyun #include <asm/irq.h>
16*4882a593Smuzhiyun #include <asm/sun3x.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* default interrupt vector */
19*4882a593Smuzhiyun #define SUN3X_FDC_IRQ 0x40
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /* some constants */
22*4882a593Smuzhiyun #define FCR_TC 0x1
23*4882a593Smuzhiyun #define FCR_EJECT 0x2
24*4882a593Smuzhiyun #define FCR_MTRON 0x4
25*4882a593Smuzhiyun #define FCR_DSEL1 0x8
26*4882a593Smuzhiyun #define FCR_DSEL0 0x10
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* We don't need no stinkin' I/O port allocation crap. */
29*4882a593Smuzhiyun #undef release_region
30*4882a593Smuzhiyun #undef request_region
31*4882a593Smuzhiyun #define release_region(X, Y) do { } while(0)
32*4882a593Smuzhiyun #define request_region(X, Y, Z) (1)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct sun3xflop_private {
35*4882a593Smuzhiyun volatile unsigned char *status_r;
36*4882a593Smuzhiyun volatile unsigned char *data_r;
37*4882a593Smuzhiyun volatile unsigned char *fcr_r;
38*4882a593Smuzhiyun volatile unsigned char *fvr_r;
39*4882a593Smuzhiyun unsigned char fcr;
40*4882a593Smuzhiyun } sun3x_fdc;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Super paranoid... */
43*4882a593Smuzhiyun #undef HAVE_DISABLE_HLT
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* Routines unique to each controller type on a Sun. */
sun3x_82072_fd_inb(int port)46*4882a593Smuzhiyun static unsigned char sun3x_82072_fd_inb(int port)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun static int once = 0;
49*4882a593Smuzhiyun // udelay(5);
50*4882a593Smuzhiyun switch(port & 7) {
51*4882a593Smuzhiyun default:
52*4882a593Smuzhiyun pr_crit("floppy: Asked to read unknown port %d\n", port);
53*4882a593Smuzhiyun panic("floppy: Port bolixed.");
54*4882a593Smuzhiyun case 4: /* FD_STATUS */
55*4882a593Smuzhiyun return (*sun3x_fdc.status_r) & ~STATUS_DMA;
56*4882a593Smuzhiyun case 5: /* FD_DATA */
57*4882a593Smuzhiyun return (*sun3x_fdc.data_r);
58*4882a593Smuzhiyun case 7: /* FD_DIR */
59*4882a593Smuzhiyun /* ugly hack, I can't find a way to actually detect the disk */
60*4882a593Smuzhiyun if(!once) {
61*4882a593Smuzhiyun once = 1;
62*4882a593Smuzhiyun return 0x80;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun panic("sun_82072_fd_inb: How did I get here?");
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
sun3x_82072_fd_outb(unsigned char value,int port)69*4882a593Smuzhiyun static void sun3x_82072_fd_outb(unsigned char value, int port)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun // udelay(5);
72*4882a593Smuzhiyun switch(port & 7) {
73*4882a593Smuzhiyun default:
74*4882a593Smuzhiyun pr_crit("floppy: Asked to write to unknown port %d\n", port);
75*4882a593Smuzhiyun panic("floppy: Port bolixed.");
76*4882a593Smuzhiyun case 2: /* FD_DOR */
77*4882a593Smuzhiyun /* Oh geese, 82072 on the Sun has no DOR register,
78*4882a593Smuzhiyun * so we make do with taunting the FCR.
79*4882a593Smuzhiyun *
80*4882a593Smuzhiyun * ASSUMPTIONS: There will only ever be one floppy
81*4882a593Smuzhiyun * drive attached to a Sun controller
82*4882a593Smuzhiyun * and it will be at drive zero.
83*4882a593Smuzhiyun */
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun unsigned char fcr = sun3x_fdc.fcr;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun if(value & 0x10) {
89*4882a593Smuzhiyun fcr |= (FCR_DSEL0 | FCR_MTRON);
90*4882a593Smuzhiyun } else
91*4882a593Smuzhiyun fcr &= ~(FCR_DSEL0 | FCR_MTRON);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun if(fcr != sun3x_fdc.fcr) {
95*4882a593Smuzhiyun *(sun3x_fdc.fcr_r) = fcr;
96*4882a593Smuzhiyun sun3x_fdc.fcr = fcr;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun break;
100*4882a593Smuzhiyun case 5: /* FD_DATA */
101*4882a593Smuzhiyun *(sun3x_fdc.data_r) = value;
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun case 7: /* FD_DCR */
104*4882a593Smuzhiyun *(sun3x_fdc.status_r) = value;
105*4882a593Smuzhiyun break;
106*4882a593Smuzhiyun case 4: /* FD_STATUS */
107*4882a593Smuzhiyun *(sun3x_fdc.status_r) = value;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun return;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun
sun3xflop_hardint(int irq,void * dev_id)114*4882a593Smuzhiyun asmlinkage irqreturn_t sun3xflop_hardint(int irq, void *dev_id)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun register unsigned char st;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #undef TRACE_FLPY_INT
119*4882a593Smuzhiyun #define NO_FLOPPY_ASSEMBLER
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun #ifdef TRACE_FLPY_INT
122*4882a593Smuzhiyun static int calls=0;
123*4882a593Smuzhiyun static int bytes=0;
124*4882a593Smuzhiyun static int dma_wait=0;
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun if(!doing_pdma) {
127*4882a593Smuzhiyun floppy_interrupt(irq, dev_id);
128*4882a593Smuzhiyun return IRQ_HANDLED;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun // pr_info("doing pdma\n");// st %x\n", sun_fdc->status_82072);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun #ifdef TRACE_FLPY_INT
134*4882a593Smuzhiyun if(!calls)
135*4882a593Smuzhiyun bytes = virtual_dma_count;
136*4882a593Smuzhiyun #endif
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun register int lcount;
140*4882a593Smuzhiyun register char *lptr;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun for(lcount=virtual_dma_count, lptr=virtual_dma_addr;
143*4882a593Smuzhiyun lcount; lcount--, lptr++) {
144*4882a593Smuzhiyun /* st=fd_inb(virtual_dma_port+4) & 0x80 ; */
145*4882a593Smuzhiyun st = *(sun3x_fdc.status_r);
146*4882a593Smuzhiyun /* if(st != 0xa0) */
147*4882a593Smuzhiyun /* break; */
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun if((st & 0x80) == 0) {
150*4882a593Smuzhiyun virtual_dma_count = lcount;
151*4882a593Smuzhiyun virtual_dma_addr = lptr;
152*4882a593Smuzhiyun return IRQ_HANDLED;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if((st & 0x20) == 0)
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if(virtual_dma_mode)
159*4882a593Smuzhiyun /* fd_outb(*lptr, virtual_dma_port+5); */
160*4882a593Smuzhiyun *(sun3x_fdc.data_r) = *lptr;
161*4882a593Smuzhiyun else
162*4882a593Smuzhiyun /* *lptr = fd_inb(virtual_dma_port+5); */
163*4882a593Smuzhiyun *lptr = *(sun3x_fdc.data_r);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun virtual_dma_count = lcount;
167*4882a593Smuzhiyun virtual_dma_addr = lptr;
168*4882a593Smuzhiyun /* st = fd_inb(virtual_dma_port+4); */
169*4882a593Smuzhiyun st = *(sun3x_fdc.status_r);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun #ifdef TRACE_FLPY_INT
173*4882a593Smuzhiyun calls++;
174*4882a593Smuzhiyun #endif
175*4882a593Smuzhiyun // pr_info("st=%02x\n", st);
176*4882a593Smuzhiyun if(st == 0x20)
177*4882a593Smuzhiyun return IRQ_HANDLED;
178*4882a593Smuzhiyun if(!(st & 0x20)) {
179*4882a593Smuzhiyun virtual_dma_residue += virtual_dma_count;
180*4882a593Smuzhiyun virtual_dma_count=0;
181*4882a593Smuzhiyun doing_pdma = 0;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun #ifdef TRACE_FLPY_INT
184*4882a593Smuzhiyun pr_info("count=%x, residue=%x calls=%d bytes=%x dma_wait=%d\n",
185*4882a593Smuzhiyun virtual_dma_count, virtual_dma_residue, calls, bytes,
186*4882a593Smuzhiyun dma_wait);
187*4882a593Smuzhiyun calls = 0;
188*4882a593Smuzhiyun dma_wait=0;
189*4882a593Smuzhiyun #endif
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun floppy_interrupt(irq, dev_id);
192*4882a593Smuzhiyun return IRQ_HANDLED;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #ifdef TRACE_FLPY_INT
197*4882a593Smuzhiyun if(!virtual_dma_count)
198*4882a593Smuzhiyun dma_wait++;
199*4882a593Smuzhiyun #endif
200*4882a593Smuzhiyun return IRQ_HANDLED;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
sun3xflop_request_irq(void)203*4882a593Smuzhiyun static int sun3xflop_request_irq(void)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun static int once = 0;
206*4882a593Smuzhiyun int error;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if(!once) {
209*4882a593Smuzhiyun once = 1;
210*4882a593Smuzhiyun error = request_irq(FLOPPY_IRQ, sun3xflop_hardint,
211*4882a593Smuzhiyun 0, "floppy", NULL);
212*4882a593Smuzhiyun return ((error == 0) ? 0 : -1);
213*4882a593Smuzhiyun } else return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun static void __init floppy_set_flags(int *ints,int param, int param2);
217*4882a593Smuzhiyun
sun3xflop_init(void)218*4882a593Smuzhiyun static int sun3xflop_init(void)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun if(FLOPPY_IRQ < 0x40)
221*4882a593Smuzhiyun FLOPPY_IRQ = SUN3X_FDC_IRQ;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun sun3x_fdc.status_r = (volatile unsigned char *)SUN3X_FDC;
224*4882a593Smuzhiyun sun3x_fdc.data_r = (volatile unsigned char *)(SUN3X_FDC+1);
225*4882a593Smuzhiyun sun3x_fdc.fcr_r = (volatile unsigned char *)SUN3X_FDC_FCR;
226*4882a593Smuzhiyun sun3x_fdc.fvr_r = (volatile unsigned char *)SUN3X_FDC_FVR;
227*4882a593Smuzhiyun sun3x_fdc.fcr = 0;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* Last minute sanity check... */
230*4882a593Smuzhiyun if(*sun3x_fdc.status_r == 0xff) {
231*4882a593Smuzhiyun return -1;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun *sun3x_fdc.fvr_r = FLOPPY_IRQ;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun *sun3x_fdc.fcr_r = FCR_TC;
237*4882a593Smuzhiyun udelay(10);
238*4882a593Smuzhiyun *sun3x_fdc.fcr_r = 0;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* Success... */
241*4882a593Smuzhiyun floppy_set_flags(NULL, 1, FD_BROKEN_DCL); // I don't know how to detect this.
242*4882a593Smuzhiyun allowed_drive_mask = 0x01;
243*4882a593Smuzhiyun return (int) SUN3X_FDC;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun /* I'm not precisely sure this eject routine works */
sun3x_eject(void)247*4882a593Smuzhiyun static int sun3x_eject(void)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun if(MACH_IS_SUN3X) {
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun sun3x_fdc.fcr |= (FCR_DSEL0 | FCR_EJECT);
252*4882a593Smuzhiyun *(sun3x_fdc.fcr_r) = sun3x_fdc.fcr;
253*4882a593Smuzhiyun udelay(10);
254*4882a593Smuzhiyun sun3x_fdc.fcr &= ~(FCR_DSEL0 | FCR_EJECT);
255*4882a593Smuzhiyun *(sun3x_fdc.fcr_r) = sun3x_fdc.fcr;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun return 0;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun #define fd_eject(drive) sun3x_eject()
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun #endif /* !(__ASM_SUN3X_FLOPPY_H) */
264