1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/include/asm-m68k/raw_io.h
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef _RAW_IO_H
10*4882a593Smuzhiyun #define _RAW_IO_H
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #ifdef __KERNEL__
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <asm/byteorder.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
17*4882a593Smuzhiyun * two accesses to memory, which may be undesirable for some devices.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun #define in_8(addr) \
20*4882a593Smuzhiyun ({ u8 __v = (*(__force volatile u8 *) (unsigned long)(addr)); __v; })
21*4882a593Smuzhiyun #define in_be16(addr) \
22*4882a593Smuzhiyun ({ u16 __v = (*(__force volatile u16 *) (unsigned long)(addr)); __v; })
23*4882a593Smuzhiyun #define in_be32(addr) \
24*4882a593Smuzhiyun ({ u32 __v = (*(__force volatile u32 *) (unsigned long)(addr)); __v; })
25*4882a593Smuzhiyun #define in_le16(addr) \
26*4882a593Smuzhiyun ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (unsigned long)(addr)); __v; })
27*4882a593Smuzhiyun #define in_le32(addr) \
28*4882a593Smuzhiyun ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (unsigned long)(addr)); __v; })
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define out_8(addr,b) (void)((*(__force volatile u8 *) (unsigned long)(addr)) = (b))
31*4882a593Smuzhiyun #define out_be16(addr,w) (void)((*(__force volatile u16 *) (unsigned long)(addr)) = (w))
32*4882a593Smuzhiyun #define out_be32(addr,l) (void)((*(__force volatile u32 *) (unsigned long)(addr)) = (l))
33*4882a593Smuzhiyun #define out_le16(addr,w) (void)((*(__force volatile __le16 *) (unsigned long)(addr)) = cpu_to_le16(w))
34*4882a593Smuzhiyun #define out_le32(addr,l) (void)((*(__force volatile __le32 *) (unsigned long)(addr)) = cpu_to_le32(l))
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define raw_inb in_8
37*4882a593Smuzhiyun #define raw_inw in_be16
38*4882a593Smuzhiyun #define raw_inl in_be32
39*4882a593Smuzhiyun #define __raw_readb in_8
40*4882a593Smuzhiyun #define __raw_readw in_be16
41*4882a593Smuzhiyun #define __raw_readl in_be32
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define raw_outb(val,port) out_8((port),(val))
44*4882a593Smuzhiyun #define raw_outw(val,port) out_be16((port),(val))
45*4882a593Smuzhiyun #define raw_outl(val,port) out_be32((port),(val))
46*4882a593Smuzhiyun #define __raw_writeb(val,addr) out_8((addr),(val))
47*4882a593Smuzhiyun #define __raw_writew(val,addr) out_be16((addr),(val))
48*4882a593Smuzhiyun #define __raw_writel(val,addr) out_be32((addr),(val))
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
52*4882a593Smuzhiyun * network card driver.
53*4882a593Smuzhiyun * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
54*4882a593Smuzhiyun * and hardwires the rest of the ISA addresses for a base address of 0x300.
55*4882a593Smuzhiyun *
56*4882a593Smuzhiyun * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
57*4882a593Smuzhiyun * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
58*4882a593Smuzhiyun * (meaning the bit pattern on A1-A8 can be read back as byte).
59*4882a593Smuzhiyun *
60*4882a593Smuzhiyun * Read and write operations are distinguished by the base address used:
61*4882a593Smuzhiyun * reads are from the ROM A side range, writes are through the B side range
62*4882a593Smuzhiyun * addresses (A side base + 0x10000).
63*4882a593Smuzhiyun *
64*4882a593Smuzhiyun * Reads and writes are byte only.
65*4882a593Smuzhiyun *
66*4882a593Smuzhiyun * 16 bit reads and writes are necessary for the NetUSBee adapter's USB
67*4882a593Smuzhiyun * chipset - 16 bit words are read straight off the ROM port while 16 bit
68*4882a593Smuzhiyun * reads are split into two byte writes. The low byte is latched to the
69*4882a593Smuzhiyun * NetUSBee buffer by a read from the _read_ window (with the data pattern
70*4882a593Smuzhiyun * asserted as A1-A8 address pattern). The high byte is then written to the
71*4882a593Smuzhiyun * write range as usual, completing the write cycle.
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #if defined(CONFIG_ATARI_ROM_ISA)
75*4882a593Smuzhiyun #define rom_in_8(addr) \
76*4882a593Smuzhiyun ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
77*4882a593Smuzhiyun #define rom_in_be16(addr) \
78*4882a593Smuzhiyun ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
79*4882a593Smuzhiyun #define rom_in_le16(addr) \
80*4882a593Smuzhiyun ({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #define rom_out_8(addr, b) \
83*4882a593Smuzhiyun (void)({u8 __maybe_unused __w, __v = (b); u32 _addr = ((u32) (addr)); \
84*4882a593Smuzhiyun __w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
85*4882a593Smuzhiyun #define rom_out_be16(addr, w) \
86*4882a593Smuzhiyun (void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
87*4882a593Smuzhiyun __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
88*4882a593Smuzhiyun __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
89*4882a593Smuzhiyun #define rom_out_le16(addr, w) \
90*4882a593Smuzhiyun (void)({u16 __maybe_unused __w, __v = (w); u32 _addr = ((u32) (addr)); \
91*4882a593Smuzhiyun __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
92*4882a593Smuzhiyun __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #define raw_rom_inb rom_in_8
95*4882a593Smuzhiyun #define raw_rom_inw rom_in_be16
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun #define raw_rom_outb(val, port) rom_out_8((port), (val))
98*4882a593Smuzhiyun #define raw_rom_outw(val, port) rom_out_be16((port), (val))
99*4882a593Smuzhiyun #endif /* CONFIG_ATARI_ROM_ISA */
100*4882a593Smuzhiyun
raw_insb(volatile u8 __iomem * port,u8 * buf,unsigned int len)101*4882a593Smuzhiyun static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun unsigned int i;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun for (i = 0; i < len; i++)
106*4882a593Smuzhiyun *buf++ = in_8(port);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
raw_outsb(volatile u8 __iomem * port,const u8 * buf,unsigned int nr)109*4882a593Smuzhiyun static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
110*4882a593Smuzhiyun unsigned int nr)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun unsigned int tmp;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (nr & 15) {
115*4882a593Smuzhiyun tmp = (nr & 15) - 1;
116*4882a593Smuzhiyun asm volatile (
117*4882a593Smuzhiyun "1: moveb %0@+,%2@; dbra %1,1b"
118*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
119*4882a593Smuzhiyun : "a" (port), "0" (buf),
120*4882a593Smuzhiyun "1" (tmp));
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun if (nr >> 4) {
123*4882a593Smuzhiyun tmp = (nr >> 4) - 1;
124*4882a593Smuzhiyun asm volatile (
125*4882a593Smuzhiyun "1: "
126*4882a593Smuzhiyun "moveb %0@+,%2@; "
127*4882a593Smuzhiyun "moveb %0@+,%2@; "
128*4882a593Smuzhiyun "moveb %0@+,%2@; "
129*4882a593Smuzhiyun "moveb %0@+,%2@; "
130*4882a593Smuzhiyun "moveb %0@+,%2@; "
131*4882a593Smuzhiyun "moveb %0@+,%2@; "
132*4882a593Smuzhiyun "moveb %0@+,%2@; "
133*4882a593Smuzhiyun "moveb %0@+,%2@; "
134*4882a593Smuzhiyun "moveb %0@+,%2@; "
135*4882a593Smuzhiyun "moveb %0@+,%2@; "
136*4882a593Smuzhiyun "moveb %0@+,%2@; "
137*4882a593Smuzhiyun "moveb %0@+,%2@; "
138*4882a593Smuzhiyun "moveb %0@+,%2@; "
139*4882a593Smuzhiyun "moveb %0@+,%2@; "
140*4882a593Smuzhiyun "moveb %0@+,%2@; "
141*4882a593Smuzhiyun "moveb %0@+,%2@; "
142*4882a593Smuzhiyun "dbra %1,1b"
143*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
144*4882a593Smuzhiyun : "a" (port), "0" (buf),
145*4882a593Smuzhiyun "1" (tmp));
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
raw_insw(volatile u16 __iomem * port,u16 * buf,unsigned int nr)149*4882a593Smuzhiyun static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun unsigned int tmp;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (nr & 15) {
154*4882a593Smuzhiyun tmp = (nr & 15) - 1;
155*4882a593Smuzhiyun asm volatile (
156*4882a593Smuzhiyun "1: movew %2@,%0@+; dbra %1,1b"
157*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
158*4882a593Smuzhiyun : "a" (port), "0" (buf),
159*4882a593Smuzhiyun "1" (tmp));
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun if (nr >> 4) {
162*4882a593Smuzhiyun tmp = (nr >> 4) - 1;
163*4882a593Smuzhiyun asm volatile (
164*4882a593Smuzhiyun "1: "
165*4882a593Smuzhiyun "movew %2@,%0@+; "
166*4882a593Smuzhiyun "movew %2@,%0@+; "
167*4882a593Smuzhiyun "movew %2@,%0@+; "
168*4882a593Smuzhiyun "movew %2@,%0@+; "
169*4882a593Smuzhiyun "movew %2@,%0@+; "
170*4882a593Smuzhiyun "movew %2@,%0@+; "
171*4882a593Smuzhiyun "movew %2@,%0@+; "
172*4882a593Smuzhiyun "movew %2@,%0@+; "
173*4882a593Smuzhiyun "movew %2@,%0@+; "
174*4882a593Smuzhiyun "movew %2@,%0@+; "
175*4882a593Smuzhiyun "movew %2@,%0@+; "
176*4882a593Smuzhiyun "movew %2@,%0@+; "
177*4882a593Smuzhiyun "movew %2@,%0@+; "
178*4882a593Smuzhiyun "movew %2@,%0@+; "
179*4882a593Smuzhiyun "movew %2@,%0@+; "
180*4882a593Smuzhiyun "movew %2@,%0@+; "
181*4882a593Smuzhiyun "dbra %1,1b"
182*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
183*4882a593Smuzhiyun : "a" (port), "0" (buf),
184*4882a593Smuzhiyun "1" (tmp));
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
raw_outsw(volatile u16 __iomem * port,const u16 * buf,unsigned int nr)188*4882a593Smuzhiyun static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
189*4882a593Smuzhiyun unsigned int nr)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun unsigned int tmp;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun if (nr & 15) {
194*4882a593Smuzhiyun tmp = (nr & 15) - 1;
195*4882a593Smuzhiyun asm volatile (
196*4882a593Smuzhiyun "1: movew %0@+,%2@; dbra %1,1b"
197*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
198*4882a593Smuzhiyun : "a" (port), "0" (buf),
199*4882a593Smuzhiyun "1" (tmp));
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun if (nr >> 4) {
202*4882a593Smuzhiyun tmp = (nr >> 4) - 1;
203*4882a593Smuzhiyun asm volatile (
204*4882a593Smuzhiyun "1: "
205*4882a593Smuzhiyun "movew %0@+,%2@; "
206*4882a593Smuzhiyun "movew %0@+,%2@; "
207*4882a593Smuzhiyun "movew %0@+,%2@; "
208*4882a593Smuzhiyun "movew %0@+,%2@; "
209*4882a593Smuzhiyun "movew %0@+,%2@; "
210*4882a593Smuzhiyun "movew %0@+,%2@; "
211*4882a593Smuzhiyun "movew %0@+,%2@; "
212*4882a593Smuzhiyun "movew %0@+,%2@; "
213*4882a593Smuzhiyun "movew %0@+,%2@; "
214*4882a593Smuzhiyun "movew %0@+,%2@; "
215*4882a593Smuzhiyun "movew %0@+,%2@; "
216*4882a593Smuzhiyun "movew %0@+,%2@; "
217*4882a593Smuzhiyun "movew %0@+,%2@; "
218*4882a593Smuzhiyun "movew %0@+,%2@; "
219*4882a593Smuzhiyun "movew %0@+,%2@; "
220*4882a593Smuzhiyun "movew %0@+,%2@; "
221*4882a593Smuzhiyun "dbra %1,1b"
222*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
223*4882a593Smuzhiyun : "a" (port), "0" (buf),
224*4882a593Smuzhiyun "1" (tmp));
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
raw_insl(volatile u32 __iomem * port,u32 * buf,unsigned int nr)228*4882a593Smuzhiyun static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun unsigned int tmp;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (nr & 15) {
233*4882a593Smuzhiyun tmp = (nr & 15) - 1;
234*4882a593Smuzhiyun asm volatile (
235*4882a593Smuzhiyun "1: movel %2@,%0@+; dbra %1,1b"
236*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
237*4882a593Smuzhiyun : "a" (port), "0" (buf),
238*4882a593Smuzhiyun "1" (tmp));
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun if (nr >> 4) {
241*4882a593Smuzhiyun tmp = (nr >> 4) - 1;
242*4882a593Smuzhiyun asm volatile (
243*4882a593Smuzhiyun "1: "
244*4882a593Smuzhiyun "movel %2@,%0@+; "
245*4882a593Smuzhiyun "movel %2@,%0@+; "
246*4882a593Smuzhiyun "movel %2@,%0@+; "
247*4882a593Smuzhiyun "movel %2@,%0@+; "
248*4882a593Smuzhiyun "movel %2@,%0@+; "
249*4882a593Smuzhiyun "movel %2@,%0@+; "
250*4882a593Smuzhiyun "movel %2@,%0@+; "
251*4882a593Smuzhiyun "movel %2@,%0@+; "
252*4882a593Smuzhiyun "movel %2@,%0@+; "
253*4882a593Smuzhiyun "movel %2@,%0@+; "
254*4882a593Smuzhiyun "movel %2@,%0@+; "
255*4882a593Smuzhiyun "movel %2@,%0@+; "
256*4882a593Smuzhiyun "movel %2@,%0@+; "
257*4882a593Smuzhiyun "movel %2@,%0@+; "
258*4882a593Smuzhiyun "movel %2@,%0@+; "
259*4882a593Smuzhiyun "movel %2@,%0@+; "
260*4882a593Smuzhiyun "dbra %1,1b"
261*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
262*4882a593Smuzhiyun : "a" (port), "0" (buf),
263*4882a593Smuzhiyun "1" (tmp));
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
raw_outsl(volatile u32 __iomem * port,const u32 * buf,unsigned int nr)267*4882a593Smuzhiyun static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
268*4882a593Smuzhiyun unsigned int nr)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun unsigned int tmp;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun if (nr & 15) {
273*4882a593Smuzhiyun tmp = (nr & 15) - 1;
274*4882a593Smuzhiyun asm volatile (
275*4882a593Smuzhiyun "1: movel %0@+,%2@; dbra %1,1b"
276*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
277*4882a593Smuzhiyun : "a" (port), "0" (buf),
278*4882a593Smuzhiyun "1" (tmp));
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun if (nr >> 4) {
281*4882a593Smuzhiyun tmp = (nr >> 4) - 1;
282*4882a593Smuzhiyun asm volatile (
283*4882a593Smuzhiyun "1: "
284*4882a593Smuzhiyun "movel %0@+,%2@; "
285*4882a593Smuzhiyun "movel %0@+,%2@; "
286*4882a593Smuzhiyun "movel %0@+,%2@; "
287*4882a593Smuzhiyun "movel %0@+,%2@; "
288*4882a593Smuzhiyun "movel %0@+,%2@; "
289*4882a593Smuzhiyun "movel %0@+,%2@; "
290*4882a593Smuzhiyun "movel %0@+,%2@; "
291*4882a593Smuzhiyun "movel %0@+,%2@; "
292*4882a593Smuzhiyun "movel %0@+,%2@; "
293*4882a593Smuzhiyun "movel %0@+,%2@; "
294*4882a593Smuzhiyun "movel %0@+,%2@; "
295*4882a593Smuzhiyun "movel %0@+,%2@; "
296*4882a593Smuzhiyun "movel %0@+,%2@; "
297*4882a593Smuzhiyun "movel %0@+,%2@; "
298*4882a593Smuzhiyun "movel %0@+,%2@; "
299*4882a593Smuzhiyun "movel %0@+,%2@; "
300*4882a593Smuzhiyun "dbra %1,1b"
301*4882a593Smuzhiyun : "=a" (buf), "=d" (tmp)
302*4882a593Smuzhiyun : "a" (port), "0" (buf),
303*4882a593Smuzhiyun "1" (tmp));
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun
raw_insw_swapw(volatile u16 __iomem * port,u16 * buf,unsigned int nr)308*4882a593Smuzhiyun static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
309*4882a593Smuzhiyun unsigned int nr)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun if ((nr) % 8)
312*4882a593Smuzhiyun __asm__ __volatile__
313*4882a593Smuzhiyun ("\tmovel %0,%/a0\n\t"
314*4882a593Smuzhiyun "movel %1,%/a1\n\t"
315*4882a593Smuzhiyun "movel %2,%/d6\n\t"
316*4882a593Smuzhiyun "subql #1,%/d6\n"
317*4882a593Smuzhiyun "1:\tmovew %/a0@,%/d0\n\t"
318*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
319*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
320*4882a593Smuzhiyun "dbra %/d6,1b"
321*4882a593Smuzhiyun :
322*4882a593Smuzhiyun : "g" (port), "g" (buf), "g" (nr)
323*4882a593Smuzhiyun : "d0", "a0", "a1", "d6");
324*4882a593Smuzhiyun else
325*4882a593Smuzhiyun __asm__ __volatile__
326*4882a593Smuzhiyun ("movel %0,%/a0\n\t"
327*4882a593Smuzhiyun "movel %1,%/a1\n\t"
328*4882a593Smuzhiyun "movel %2,%/d6\n\t"
329*4882a593Smuzhiyun "lsrl #3,%/d6\n\t"
330*4882a593Smuzhiyun "subql #1,%/d6\n"
331*4882a593Smuzhiyun "1:\tmovew %/a0@,%/d0\n\t"
332*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
333*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
334*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
335*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
336*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
337*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
338*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
339*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
340*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
341*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
342*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
343*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
344*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
345*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
346*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
347*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
348*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
349*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
350*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
351*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
352*4882a593Smuzhiyun "movew %/a0@,%/d0\n\t"
353*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
354*4882a593Smuzhiyun "movew %/d0,%/a1@+\n\t"
355*4882a593Smuzhiyun "dbra %/d6,1b"
356*4882a593Smuzhiyun :
357*4882a593Smuzhiyun : "g" (port), "g" (buf), "g" (nr)
358*4882a593Smuzhiyun : "d0", "a0", "a1", "d6");
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
raw_outsw_swapw(volatile u16 __iomem * port,const u16 * buf,unsigned int nr)361*4882a593Smuzhiyun static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
362*4882a593Smuzhiyun unsigned int nr)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun if ((nr) % 8)
365*4882a593Smuzhiyun __asm__ __volatile__
366*4882a593Smuzhiyun ("movel %0,%/a0\n\t"
367*4882a593Smuzhiyun "movel %1,%/a1\n\t"
368*4882a593Smuzhiyun "movel %2,%/d6\n\t"
369*4882a593Smuzhiyun "subql #1,%/d6\n"
370*4882a593Smuzhiyun "1:\tmovew %/a1@+,%/d0\n\t"
371*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
372*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
373*4882a593Smuzhiyun "dbra %/d6,1b"
374*4882a593Smuzhiyun :
375*4882a593Smuzhiyun : "g" (port), "g" (buf), "g" (nr)
376*4882a593Smuzhiyun : "d0", "a0", "a1", "d6");
377*4882a593Smuzhiyun else
378*4882a593Smuzhiyun __asm__ __volatile__
379*4882a593Smuzhiyun ("movel %0,%/a0\n\t"
380*4882a593Smuzhiyun "movel %1,%/a1\n\t"
381*4882a593Smuzhiyun "movel %2,%/d6\n\t"
382*4882a593Smuzhiyun "lsrl #3,%/d6\n\t"
383*4882a593Smuzhiyun "subql #1,%/d6\n"
384*4882a593Smuzhiyun "1:\tmovew %/a1@+,%/d0\n\t"
385*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
386*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
387*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
388*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
389*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
390*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
391*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
392*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
393*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
394*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
395*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
396*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
397*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
398*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
399*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
400*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
401*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
402*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
403*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
404*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
405*4882a593Smuzhiyun "movew %/a1@+,%/d0\n\t"
406*4882a593Smuzhiyun "rolw #8,%/d0\n\t"
407*4882a593Smuzhiyun "movew %/d0,%/a0@\n\t"
408*4882a593Smuzhiyun "dbra %/d6,1b"
409*4882a593Smuzhiyun :
410*4882a593Smuzhiyun : "g" (port), "g" (buf), "g" (nr)
411*4882a593Smuzhiyun : "d0", "a0", "a1", "d6");
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun #if defined(CONFIG_ATARI_ROM_ISA)
raw_rom_insb(volatile u8 __iomem * port,u8 * buf,unsigned int len)416*4882a593Smuzhiyun static inline void raw_rom_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun unsigned int i;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun for (i = 0; i < len; i++)
421*4882a593Smuzhiyun *buf++ = rom_in_8(port);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
raw_rom_outsb(volatile u8 __iomem * port,const u8 * buf,unsigned int len)424*4882a593Smuzhiyun static inline void raw_rom_outsb(volatile u8 __iomem *port, const u8 *buf,
425*4882a593Smuzhiyun unsigned int len)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun unsigned int i;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun for (i = 0; i < len; i++)
430*4882a593Smuzhiyun rom_out_8(port, *buf++);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
raw_rom_insw(volatile u16 __iomem * port,u16 * buf,unsigned int nr)433*4882a593Smuzhiyun static inline void raw_rom_insw(volatile u16 __iomem *port, u16 *buf,
434*4882a593Smuzhiyun unsigned int nr)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun unsigned int i;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun for (i = 0; i < nr; i++)
439*4882a593Smuzhiyun *buf++ = rom_in_be16(port);
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
raw_rom_outsw(volatile u16 __iomem * port,const u16 * buf,unsigned int nr)442*4882a593Smuzhiyun static inline void raw_rom_outsw(volatile u16 __iomem *port, const u16 *buf,
443*4882a593Smuzhiyun unsigned int nr)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun unsigned int i;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun for (i = 0; i < nr; i++)
448*4882a593Smuzhiyun rom_out_be16(port, *buf++);
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
raw_rom_insw_swapw(volatile u16 __iomem * port,u16 * buf,unsigned int nr)451*4882a593Smuzhiyun static inline void raw_rom_insw_swapw(volatile u16 __iomem *port, u16 *buf,
452*4882a593Smuzhiyun unsigned int nr)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun unsigned int i;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun for (i = 0; i < nr; i++)
457*4882a593Smuzhiyun *buf++ = rom_in_le16(port);
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
raw_rom_outsw_swapw(volatile u16 __iomem * port,const u16 * buf,unsigned int nr)460*4882a593Smuzhiyun static inline void raw_rom_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
461*4882a593Smuzhiyun unsigned int nr)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun unsigned int i;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun for (i = 0; i < nr; i++)
466*4882a593Smuzhiyun rom_out_le16(port, *buf++);
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun #endif /* CONFIG_ATARI_ROM_ISA */
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun #endif /* __KERNEL__ */
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun #endif /* _RAW_IO_H */
473