1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _KMAP_H
3*4882a593Smuzhiyun #define _KMAP_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #ifdef CONFIG_MMU
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #define ARCH_HAS_IOREMAP_WT
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun /* Values for nocacheflag and cmode */
10*4882a593Smuzhiyun #define IOMAP_FULL_CACHING 0
11*4882a593Smuzhiyun #define IOMAP_NOCACHE_SER 1
12*4882a593Smuzhiyun #define IOMAP_NOCACHE_NONSER 2
13*4882a593Smuzhiyun #define IOMAP_WRITETHROUGH 3
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * These functions exported by arch/m68k/mm/kmap.c.
17*4882a593Smuzhiyun * Only needed on MMU enabled systems.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
20*4882a593Smuzhiyun int cacheflag);
21*4882a593Smuzhiyun #define iounmap iounmap
22*4882a593Smuzhiyun extern void iounmap(void __iomem *addr);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define ioremap ioremap
ioremap(unsigned long physaddr,unsigned long size)25*4882a593Smuzhiyun static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define ioremap_uc ioremap
31*4882a593Smuzhiyun #define ioremap_wt ioremap_wt
ioremap_wt(unsigned long physaddr,unsigned long size)32*4882a593Smuzhiyun static inline void __iomem *ioremap_wt(unsigned long physaddr,
33*4882a593Smuzhiyun unsigned long size)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define memset_io memset_io
memset_io(volatile void __iomem * addr,unsigned char val,int count)39*4882a593Smuzhiyun static inline void memset_io(volatile void __iomem *addr, unsigned char val,
40*4882a593Smuzhiyun int count)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun __builtin_memset((void __force *) addr, val, count);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define memcpy_fromio memcpy_fromio
memcpy_fromio(void * dst,const volatile void __iomem * src,int count)46*4882a593Smuzhiyun static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
47*4882a593Smuzhiyun int count)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun __builtin_memcpy(dst, (void __force *) src, count);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define memcpy_toio memcpy_toio
memcpy_toio(volatile void __iomem * dst,const void * src,int count)53*4882a593Smuzhiyun static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
54*4882a593Smuzhiyun int count)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun __builtin_memcpy((void __force *) dst, src, count);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #endif /* CONFIG_MMU */
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define ioport_map ioport_map
ioport_map(unsigned long port,unsigned int nr)62*4882a593Smuzhiyun static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun return (void __iomem *) port;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define ioport_unmap ioport_unmap
ioport_unmap(void __iomem * p)68*4882a593Smuzhiyun static inline void ioport_unmap(void __iomem *p)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #endif /* _KMAP_H */
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