1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/m68k/hp300/time.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1998 Philip Blundell <philb@gnu.org>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file contains the HP300-specific time handling code.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <asm/ptrace.h>
11*4882a593Smuzhiyun #include <linux/clocksource.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/sched.h>
15*4882a593Smuzhiyun #include <linux/kernel_stat.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <asm/machdep.h>
18*4882a593Smuzhiyun #include <asm/irq.h>
19*4882a593Smuzhiyun #include <asm/io.h>
20*4882a593Smuzhiyun #include <asm/traps.h>
21*4882a593Smuzhiyun #include <asm/blinken.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static u64 hp300_read_clk(struct clocksource *cs);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static struct clocksource hp300_clk = {
26*4882a593Smuzhiyun .name = "timer",
27*4882a593Smuzhiyun .rating = 250,
28*4882a593Smuzhiyun .read = hp300_read_clk,
29*4882a593Smuzhiyun .mask = CLOCKSOURCE_MASK(32),
30*4882a593Smuzhiyun .flags = CLOCK_SOURCE_IS_CONTINUOUS,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static u32 clk_total, clk_offset;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Clock hardware definitions */
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define CLOCKBASE 0xf05f8000
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define CLKCR1 0x1
40*4882a593Smuzhiyun #define CLKCR2 0x3
41*4882a593Smuzhiyun #define CLKCR3 CLKCR1
42*4882a593Smuzhiyun #define CLKSR CLKCR2
43*4882a593Smuzhiyun #define CLKMSB1 0x5
44*4882a593Smuzhiyun #define CLKLSB1 0x7
45*4882a593Smuzhiyun #define CLKMSB2 0x9
46*4882a593Smuzhiyun #define CLKMSB3 0xD
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #define CLKSR_INT1 BIT(0)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* This is for machines which generate the exact clock. */
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define HP300_TIMER_CLOCK_FREQ 250000
53*4882a593Smuzhiyun #define HP300_TIMER_CYCLES (HP300_TIMER_CLOCK_FREQ / HZ)
54*4882a593Smuzhiyun #define INTVAL (HP300_TIMER_CYCLES - 1)
55*4882a593Smuzhiyun
hp300_tick(int irq,void * dev_id)56*4882a593Smuzhiyun static irqreturn_t hp300_tick(int irq, void *dev_id)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun irq_handler_t timer_routine = dev_id;
59*4882a593Smuzhiyun unsigned long flags;
60*4882a593Smuzhiyun unsigned long tmp;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun local_irq_save(flags);
63*4882a593Smuzhiyun in_8(CLOCKBASE + CLKSR);
64*4882a593Smuzhiyun asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
65*4882a593Smuzhiyun clk_total += INTVAL;
66*4882a593Smuzhiyun clk_offset = 0;
67*4882a593Smuzhiyun timer_routine(0, NULL);
68*4882a593Smuzhiyun local_irq_restore(flags);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* Turn off the network and SCSI leds */
71*4882a593Smuzhiyun blinken_leds(0, 0xe0);
72*4882a593Smuzhiyun return IRQ_HANDLED;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
hp300_read_clk(struct clocksource * cs)75*4882a593Smuzhiyun static u64 hp300_read_clk(struct clocksource *cs)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun unsigned long flags;
78*4882a593Smuzhiyun unsigned char lsb, msb, msb_new;
79*4882a593Smuzhiyun u32 ticks;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun local_irq_save(flags);
82*4882a593Smuzhiyun /* Read current timer 1 value */
83*4882a593Smuzhiyun msb = in_8(CLOCKBASE + CLKMSB1);
84*4882a593Smuzhiyun again:
85*4882a593Smuzhiyun if ((in_8(CLOCKBASE + CLKSR) & CLKSR_INT1) && msb > 0)
86*4882a593Smuzhiyun clk_offset = INTVAL;
87*4882a593Smuzhiyun lsb = in_8(CLOCKBASE + CLKLSB1);
88*4882a593Smuzhiyun msb_new = in_8(CLOCKBASE + CLKMSB1);
89*4882a593Smuzhiyun if (msb_new != msb) {
90*4882a593Smuzhiyun msb = msb_new;
91*4882a593Smuzhiyun goto again;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun ticks = INTVAL - ((msb << 8) | lsb);
95*4882a593Smuzhiyun ticks += clk_offset + clk_total;
96*4882a593Smuzhiyun local_irq_restore(flags);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return ticks;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
hp300_sched_init(irq_handler_t vector)101*4882a593Smuzhiyun void __init hp300_sched_init(irq_handler_t vector)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
104*4882a593Smuzhiyun out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector))
109*4882a593Smuzhiyun pr_err("Couldn't register timer interrupt\n");
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
112*4882a593Smuzhiyun out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun clocksource_register_hz(&hp300_clk, HP300_TIMER_CLOCK_FREQ);
115*4882a593Smuzhiyun }
116