1*4882a593Smuzhiyun| 2*4882a593Smuzhiyun| x_fline.sa 3.3 1/10/91 3*4882a593Smuzhiyun| 4*4882a593Smuzhiyun| fpsp_fline --- FPSP handler for fline exception 5*4882a593Smuzhiyun| 6*4882a593Smuzhiyun| First determine if the exception is one of the unimplemented 7*4882a593Smuzhiyun| floating point instructions. If so, let fpsp_unimp handle it. 8*4882a593Smuzhiyun| Next, determine if the instruction is an fmovecr with a non-zero 9*4882a593Smuzhiyun| <ea> field. If so, handle here and return. Otherwise, it 10*4882a593Smuzhiyun| must be a real F-line exception. 11*4882a593Smuzhiyun| 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun| Copyright (C) Motorola, Inc. 1990 14*4882a593Smuzhiyun| All Rights Reserved 15*4882a593Smuzhiyun| 16*4882a593Smuzhiyun| For details on the license for this file, please see the 17*4882a593Smuzhiyun| file, README, in this same directory. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunX_FLINE: |idnt 2,1 | Motorola 040 Floating Point Software Package 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun |section 8 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun#include "fpsp.h" 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun |xref real_fline 26*4882a593Smuzhiyun |xref fpsp_unimp 27*4882a593Smuzhiyun |xref uni_2 28*4882a593Smuzhiyun |xref mem_read 29*4882a593Smuzhiyun |xref fpsp_fmt_error 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun .global fpsp_fline 32*4882a593Smuzhiyunfpsp_fline: 33*4882a593Smuzhiyun| 34*4882a593Smuzhiyun| check for unimplemented vector first. Use EXC_VEC-4 because 35*4882a593Smuzhiyun| the equate is valid only after a 'link a6' has pushed one more 36*4882a593Smuzhiyun| long onto the stack. 37*4882a593Smuzhiyun| 38*4882a593Smuzhiyun cmpw #UNIMP_VEC,EXC_VEC-4(%a7) 39*4882a593Smuzhiyun beql fpsp_unimp 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun| 42*4882a593Smuzhiyun| fmovecr with non-zero <ea> handling here 43*4882a593Smuzhiyun| 44*4882a593Smuzhiyun subl #4,%a7 |4 accounts for 2-word difference 45*4882a593Smuzhiyun| ;between six word frame (unimp) and 46*4882a593Smuzhiyun| ;four word frame 47*4882a593Smuzhiyun link %a6,#-LOCAL_SIZE 48*4882a593Smuzhiyun fsave -(%a7) 49*4882a593Smuzhiyun moveml %d0-%d1/%a0-%a1,USER_DA(%a6) 50*4882a593Smuzhiyun moveal EXC_PC+4(%a6),%a0 |get address of fline instruction 51*4882a593Smuzhiyun leal L_SCR1(%a6),%a1 |use L_SCR1 as scratch 52*4882a593Smuzhiyun movel #4,%d0 53*4882a593Smuzhiyun addl #4,%a6 |to offset the sub.l #4,a7 above so that 54*4882a593Smuzhiyun| ;a6 can point correctly to the stack frame 55*4882a593Smuzhiyun| ;before branching to mem_read 56*4882a593Smuzhiyun bsrl mem_read 57*4882a593Smuzhiyun subl #4,%a6 58*4882a593Smuzhiyun movel L_SCR1(%a6),%d0 |d0 contains the fline and command word 59*4882a593Smuzhiyun bfextu %d0{#4:#3},%d1 |extract coprocessor id 60*4882a593Smuzhiyun cmpib #1,%d1 |check if cpid=1 61*4882a593Smuzhiyun bne not_mvcr |exit if not 62*4882a593Smuzhiyun bfextu %d0{#16:#6},%d1 63*4882a593Smuzhiyun cmpib #0x17,%d1 |check if it is an FMOVECR encoding 64*4882a593Smuzhiyun bne not_mvcr 65*4882a593Smuzhiyun| ;if an FMOVECR instruction, fix stack 66*4882a593Smuzhiyun| ;and go to FPSP_UNIMP 67*4882a593Smuzhiyunfix_stack: 68*4882a593Smuzhiyun cmpib #VER_40,(%a7) |test for orig unimp frame 69*4882a593Smuzhiyun bnes ck_rev 70*4882a593Smuzhiyun subl #UNIMP_40_SIZE-4,%a7 |emulate an orig fsave 71*4882a593Smuzhiyun moveb #VER_40,(%a7) 72*4882a593Smuzhiyun moveb #UNIMP_40_SIZE-4,1(%a7) 73*4882a593Smuzhiyun clrw 2(%a7) 74*4882a593Smuzhiyun bras fix_con 75*4882a593Smuzhiyunck_rev: 76*4882a593Smuzhiyun cmpib #VER_41,(%a7) |test for rev unimp frame 77*4882a593Smuzhiyun bnel fpsp_fmt_error |if not $40 or $41, exit with error 78*4882a593Smuzhiyun subl #UNIMP_41_SIZE-4,%a7 |emulate a rev fsave 79*4882a593Smuzhiyun moveb #VER_41,(%a7) 80*4882a593Smuzhiyun moveb #UNIMP_41_SIZE-4,1(%a7) 81*4882a593Smuzhiyun clrw 2(%a7) 82*4882a593Smuzhiyunfix_con: 83*4882a593Smuzhiyun movew EXC_SR+4(%a6),EXC_SR(%a6) |move stacked sr to new position 84*4882a593Smuzhiyun movel EXC_PC+4(%a6),EXC_PC(%a6) |move stacked pc to new position 85*4882a593Smuzhiyun fmovel EXC_PC(%a6),%FPIAR |point FPIAR to fline inst 86*4882a593Smuzhiyun movel #4,%d1 87*4882a593Smuzhiyun addl %d1,EXC_PC(%a6) |increment stacked pc value to next inst 88*4882a593Smuzhiyun movew #0x202c,EXC_VEC(%a6) |reformat vector to unimp 89*4882a593Smuzhiyun clrl EXC_EA(%a6) |clear the EXC_EA field 90*4882a593Smuzhiyun movew %d0,CMDREG1B(%a6) |move the lower word into CMDREG1B 91*4882a593Smuzhiyun clrl E_BYTE(%a6) 92*4882a593Smuzhiyun bsetb #UFLAG,T_BYTE(%a6) 93*4882a593Smuzhiyun moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers 94*4882a593Smuzhiyun bral uni_2 95*4882a593Smuzhiyun 96*4882a593Smuzhiyunnot_mvcr: 97*4882a593Smuzhiyun moveml USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers 98*4882a593Smuzhiyun frestore (%a7)+ 99*4882a593Smuzhiyun unlk %a6 100*4882a593Smuzhiyun addl #4,%a7 101*4882a593Smuzhiyun bral real_fline 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun |end 104