1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
4*4882a593Smuzhiyun * Derived from fixup.c of i386 tree.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/pci.h>
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/vgaarb.h>
10*4882a593Smuzhiyun #include <linux/screen_info.h>
11*4882a593Smuzhiyun #include <asm/uv/uv.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun * Fixup to mark boot BIOS video selected by BIOS before it changes
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * From information provided by "Jon Smirl" <jonsmirl@gmail.com>
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * The standard boot ROM sequence for an x86 machine uses the BIOS
19*4882a593Smuzhiyun * to select an initial video card for boot display. This boot video
20*4882a593Smuzhiyun * card will have its BIOS copied to 0xC0000 in system RAM.
21*4882a593Smuzhiyun * IORESOURCE_ROM_SHADOW is used to associate the boot video
22*4882a593Smuzhiyun * card with this copy. On laptops this copy has to be used since
23*4882a593Smuzhiyun * the main ROM may be compressed or combined with another image.
24*4882a593Smuzhiyun * See pci_map_rom() for use of this flag. Before marking the device
25*4882a593Smuzhiyun * with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set
26*4882a593Smuzhiyun * by either arch code or vga-arbitration; if so only apply the fixup to this
27*4882a593Smuzhiyun * already-determined primary video card.
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun
pci_fixup_video(struct pci_dev * pdev)30*4882a593Smuzhiyun static void pci_fixup_video(struct pci_dev *pdev)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun struct pci_dev *bridge;
33*4882a593Smuzhiyun struct pci_bus *bus;
34*4882a593Smuzhiyun u16 config;
35*4882a593Smuzhiyun struct resource *res;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (is_uv_system())
38*4882a593Smuzhiyun return;
39*4882a593Smuzhiyun /* Maybe, this machine supports legacy memory map. */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Is VGA routed to us? */
42*4882a593Smuzhiyun bus = pdev->bus;
43*4882a593Smuzhiyun while (bus) {
44*4882a593Smuzhiyun bridge = bus->self;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun * From information provided by
48*4882a593Smuzhiyun * "David Miller" <davem@davemloft.net>
49*4882a593Smuzhiyun * The bridge control register is valid for PCI header
50*4882a593Smuzhiyun * type BRIDGE, or CARDBUS. Host to PCI controllers use
51*4882a593Smuzhiyun * PCI header type NORMAL.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun if (bridge && (pci_is_bridge(bridge))) {
54*4882a593Smuzhiyun pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
55*4882a593Smuzhiyun &config);
56*4882a593Smuzhiyun if (!(config & PCI_BRIDGE_CTL_VGA))
57*4882a593Smuzhiyun return;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun bus = bus->parent;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun if (!vga_default_device() || pdev == vga_default_device()) {
62*4882a593Smuzhiyun pci_read_config_word(pdev, PCI_COMMAND, &config);
63*4882a593Smuzhiyun if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
64*4882a593Smuzhiyun res = &pdev->resource[PCI_ROM_RESOURCE];
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun pci_disable_rom(pdev);
67*4882a593Smuzhiyun if (res->parent)
68*4882a593Smuzhiyun release_resource(res);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun res->start = 0xC0000;
71*4882a593Smuzhiyun res->end = res->start + 0x20000 - 1;
72*4882a593Smuzhiyun res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |
73*4882a593Smuzhiyun IORESOURCE_PCI_FIXED;
74*4882a593Smuzhiyun dev_info(&pdev->dev, "Video device with shadowed ROM at %pR\n",
75*4882a593Smuzhiyun res);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
80*4882a593Smuzhiyun PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
81