1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2002,2003 Intel Corp. 4*4882a593Smuzhiyun * Jun Nakajima <jun.nakajima@intel.com> 5*4882a593Smuzhiyun * Suresh Siddha <suresh.b.siddha@intel.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ASM_IA64_IA64REGS_H 9*4882a593Smuzhiyun #define _ASM_IA64_IA64REGS_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Register Names for getreg() and setreg(). 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The "magic" numbers happen to match the values used by the Intel compiler's 15*4882a593Smuzhiyun * getreg()/setreg() intrinsics. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Special Registers */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define _IA64_REG_IP 1016 /* getreg only */ 21*4882a593Smuzhiyun #define _IA64_REG_PSR 1019 22*4882a593Smuzhiyun #define _IA64_REG_PSR_L 1019 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* General Integer Registers */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define _IA64_REG_GP 1025 /* R1 */ 27*4882a593Smuzhiyun #define _IA64_REG_R8 1032 /* R8 */ 28*4882a593Smuzhiyun #define _IA64_REG_R9 1033 /* R9 */ 29*4882a593Smuzhiyun #define _IA64_REG_SP 1036 /* R12 */ 30*4882a593Smuzhiyun #define _IA64_REG_TP 1037 /* R13 */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Application Registers */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define _IA64_REG_AR_KR0 3072 35*4882a593Smuzhiyun #define _IA64_REG_AR_KR1 3073 36*4882a593Smuzhiyun #define _IA64_REG_AR_KR2 3074 37*4882a593Smuzhiyun #define _IA64_REG_AR_KR3 3075 38*4882a593Smuzhiyun #define _IA64_REG_AR_KR4 3076 39*4882a593Smuzhiyun #define _IA64_REG_AR_KR5 3077 40*4882a593Smuzhiyun #define _IA64_REG_AR_KR6 3078 41*4882a593Smuzhiyun #define _IA64_REG_AR_KR7 3079 42*4882a593Smuzhiyun #define _IA64_REG_AR_RSC 3088 43*4882a593Smuzhiyun #define _IA64_REG_AR_BSP 3089 44*4882a593Smuzhiyun #define _IA64_REG_AR_BSPSTORE 3090 45*4882a593Smuzhiyun #define _IA64_REG_AR_RNAT 3091 46*4882a593Smuzhiyun #define _IA64_REG_AR_FCR 3093 47*4882a593Smuzhiyun #define _IA64_REG_AR_EFLAG 3096 48*4882a593Smuzhiyun #define _IA64_REG_AR_CSD 3097 49*4882a593Smuzhiyun #define _IA64_REG_AR_SSD 3098 50*4882a593Smuzhiyun #define _IA64_REG_AR_CFLAG 3099 51*4882a593Smuzhiyun #define _IA64_REG_AR_FSR 3100 52*4882a593Smuzhiyun #define _IA64_REG_AR_FIR 3101 53*4882a593Smuzhiyun #define _IA64_REG_AR_FDR 3102 54*4882a593Smuzhiyun #define _IA64_REG_AR_CCV 3104 55*4882a593Smuzhiyun #define _IA64_REG_AR_UNAT 3108 56*4882a593Smuzhiyun #define _IA64_REG_AR_FPSR 3112 57*4882a593Smuzhiyun #define _IA64_REG_AR_ITC 3116 58*4882a593Smuzhiyun #define _IA64_REG_AR_PFS 3136 59*4882a593Smuzhiyun #define _IA64_REG_AR_LC 3137 60*4882a593Smuzhiyun #define _IA64_REG_AR_EC 3138 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* Control Registers */ 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define _IA64_REG_CR_DCR 4096 65*4882a593Smuzhiyun #define _IA64_REG_CR_ITM 4097 66*4882a593Smuzhiyun #define _IA64_REG_CR_IVA 4098 67*4882a593Smuzhiyun #define _IA64_REG_CR_PTA 4104 68*4882a593Smuzhiyun #define _IA64_REG_CR_IPSR 4112 69*4882a593Smuzhiyun #define _IA64_REG_CR_ISR 4113 70*4882a593Smuzhiyun #define _IA64_REG_CR_IIP 4115 71*4882a593Smuzhiyun #define _IA64_REG_CR_IFA 4116 72*4882a593Smuzhiyun #define _IA64_REG_CR_ITIR 4117 73*4882a593Smuzhiyun #define _IA64_REG_CR_IIPA 4118 74*4882a593Smuzhiyun #define _IA64_REG_CR_IFS 4119 75*4882a593Smuzhiyun #define _IA64_REG_CR_IIM 4120 76*4882a593Smuzhiyun #define _IA64_REG_CR_IHA 4121 77*4882a593Smuzhiyun #define _IA64_REG_CR_LID 4160 78*4882a593Smuzhiyun #define _IA64_REG_CR_IVR 4161 /* getreg only */ 79*4882a593Smuzhiyun #define _IA64_REG_CR_TPR 4162 80*4882a593Smuzhiyun #define _IA64_REG_CR_EOI 4163 81*4882a593Smuzhiyun #define _IA64_REG_CR_IRR0 4164 /* getreg only */ 82*4882a593Smuzhiyun #define _IA64_REG_CR_IRR1 4165 /* getreg only */ 83*4882a593Smuzhiyun #define _IA64_REG_CR_IRR2 4166 /* getreg only */ 84*4882a593Smuzhiyun #define _IA64_REG_CR_IRR3 4167 /* getreg only */ 85*4882a593Smuzhiyun #define _IA64_REG_CR_ITV 4168 86*4882a593Smuzhiyun #define _IA64_REG_CR_PMV 4169 87*4882a593Smuzhiyun #define _IA64_REG_CR_CMCV 4170 88*4882a593Smuzhiyun #define _IA64_REG_CR_LRR0 4176 89*4882a593Smuzhiyun #define _IA64_REG_CR_LRR1 4177 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* Indirect Registers for getindreg() and setindreg() */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define _IA64_REG_INDR_CPUID 9000 /* getindreg only */ 94*4882a593Smuzhiyun #define _IA64_REG_INDR_DBR 9001 95*4882a593Smuzhiyun #define _IA64_REG_INDR_IBR 9002 96*4882a593Smuzhiyun #define _IA64_REG_INDR_PKR 9003 97*4882a593Smuzhiyun #define _IA64_REG_INDR_PMC 9004 98*4882a593Smuzhiyun #define _IA64_REG_INDR_PMD 9005 99*4882a593Smuzhiyun #define _IA64_REG_INDR_RR 9006 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #endif /* _ASM_IA64_IA64REGS_H */ 102