1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef _ASM_IA64_FPU_H 3*4882a593Smuzhiyun #define _ASM_IA64_FPU_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co 7*4882a593Smuzhiyun * David Mosberger-Tang <davidm@hpl.hp.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* floating point status register: */ 13*4882a593Smuzhiyun #define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */ 14*4882a593Smuzhiyun #define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */ 15*4882a593Smuzhiyun #define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */ 16*4882a593Smuzhiyun #define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */ 17*4882a593Smuzhiyun #define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */ 18*4882a593Smuzhiyun #define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */ 19*4882a593Smuzhiyun #define FPSR_S0(x) ((x) << 6) 20*4882a593Smuzhiyun #define FPSR_S1(x) ((x) << 19) 21*4882a593Smuzhiyun #define FPSR_S2(x) (__IA64_UL(x) << 32) 22*4882a593Smuzhiyun #define FPSR_S3(x) (__IA64_UL(x) << 45) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* floating-point status field controls: */ 25*4882a593Smuzhiyun #define FPSF_FTZ (1 << 0) /* flush-to-zero */ 26*4882a593Smuzhiyun #define FPSF_WRE (1 << 1) /* widest-range exponent */ 27*4882a593Smuzhiyun #define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */ 28*4882a593Smuzhiyun #define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */ 29*4882a593Smuzhiyun #define FPSF_TD (1 << 6) /* trap disabled */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* floating-point status field flags: */ 32*4882a593Smuzhiyun #define FPSF_V (1 << 7) /* invalid operation flag */ 33*4882a593Smuzhiyun #define FPSF_D (1 << 8) /* denormal/unnormal operand flag */ 34*4882a593Smuzhiyun #define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */ 35*4882a593Smuzhiyun #define FPSF_O (1 << 10) /* overflow (IEEE) flag */ 36*4882a593Smuzhiyun #define FPSF_U (1 << 11) /* underflow (IEEE) flag */ 37*4882a593Smuzhiyun #define FPSF_I (1 << 12) /* inexact (IEEE) flag) */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* floating-point rounding control: */ 40*4882a593Smuzhiyun #define FPRC_NEAREST 0x0 41*4882a593Smuzhiyun #define FPRC_NEGINF 0x1 42*4882a593Smuzhiyun #define FPRC_POSINF 0x2 43*4882a593Smuzhiyun #define FPRC_TRUNC 0x3 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST)) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* This default value is the same as HP-UX uses. Don't change it 48*4882a593Smuzhiyun without a very good reason. */ 49*4882a593Smuzhiyun #define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \ 50*4882a593Smuzhiyun | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \ 51*4882a593Smuzhiyun | FPSR_S0 (FPSF_DEFAULT) \ 52*4882a593Smuzhiyun | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \ 53*4882a593Smuzhiyun | FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \ 54*4882a593Smuzhiyun | FPSR_S3 (FPSF_DEFAULT | FPSF_TD)) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun # ifndef __ASSEMBLY__ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct ia64_fpreg { 59*4882a593Smuzhiyun union { 60*4882a593Smuzhiyun unsigned long bits[2]; 61*4882a593Smuzhiyun long double __dummy; /* force 16-byte alignment */ 62*4882a593Smuzhiyun } u; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun # endif /* __ASSEMBLY__ */ 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #endif /* _ASM_IA64_FPU_H */ 68