xref: /OK3568_Linux_fs/kernel/arch/ia64/include/asm/pci.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _ASM_IA64_PCI_H
3*4882a593Smuzhiyun #define _ASM_IA64_PCI_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/mm.h>
6*4882a593Smuzhiyun #include <linux/slab.h>
7*4882a593Smuzhiyun #include <linux/spinlock.h>
8*4882a593Smuzhiyun #include <linux/string.h>
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun #include <linux/scatterlist.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <asm/hw_irq.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun struct pci_vector_struct {
16*4882a593Smuzhiyun 	__u16 segment;	/* PCI Segment number */
17*4882a593Smuzhiyun 	__u16 bus;	/* PCI Bus number */
18*4882a593Smuzhiyun 	__u32 pci_id;	/* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
19*4882a593Smuzhiyun 	__u8 pin;	/* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
20*4882a593Smuzhiyun 	__u32 irq;	/* IRQ assigned */
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun  * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
25*4882a593Smuzhiyun  * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
26*4882a593Smuzhiyun  * loader.
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun #define pcibios_assign_all_busses()     0
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define PCIBIOS_MIN_IO		0x1000
31*4882a593Smuzhiyun #define PCIBIOS_MIN_MEM		0x10000000
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define HAVE_PCI_MMAP
34*4882a593Smuzhiyun #define ARCH_GENERIC_PCI_MMAP_RESOURCE
35*4882a593Smuzhiyun #define arch_can_pci_mmap_wc()	1
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define HAVE_PCI_LEGACY
38*4882a593Smuzhiyun extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
39*4882a593Smuzhiyun 				      struct vm_area_struct *vma,
40*4882a593Smuzhiyun 				      enum pci_mmap_state mmap_state);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun char *pci_get_legacy_mem(struct pci_bus *bus);
43*4882a593Smuzhiyun int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
44*4882a593Smuzhiyun int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun struct pci_controller {
47*4882a593Smuzhiyun 	struct acpi_device *companion;
48*4882a593Smuzhiyun 	void *iommu;
49*4882a593Smuzhiyun 	int segment;
50*4882a593Smuzhiyun 	int node;		/* nearest node with memory or NUMA_NO_NODE for global allocation */
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	void *platform_data;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
57*4882a593Smuzhiyun #define pci_domain_nr(busdev)    (PCI_CONTROLLER(busdev)->segment)
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun extern struct pci_ops pci_root_ops;
60*4882a593Smuzhiyun 
pci_proc_domain(struct pci_bus * bus)61*4882a593Smuzhiyun static inline int pci_proc_domain(struct pci_bus *bus)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	return (pci_domain_nr(bus) != 0);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
pci_get_legacy_ide_irq(struct pci_dev * dev,int channel)67*4882a593Smuzhiyun static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #endif /* _ASM_IA64_PCI_H */
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