1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 3*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 4*4882a593Smuzhiyun * for more details. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file contains NUMA specific prototypes and definitions. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * 2002/08/05 Erich Focht <efocht@ess.nec.de> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef _ASM_IA64_NUMA_H 12*4882a593Smuzhiyun #define _ASM_IA64_NUMA_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifdef CONFIG_NUMA 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/cache.h> 18*4882a593Smuzhiyun #include <linux/cpumask.h> 19*4882a593Smuzhiyun #include <linux/numa.h> 20*4882a593Smuzhiyun #include <linux/smp.h> 21*4882a593Smuzhiyun #include <linux/threads.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #include <asm/mmzone.h> 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned; 26*4882a593Smuzhiyun extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; 27*4882a593Smuzhiyun extern pg_data_t *pgdat_list[MAX_NUMNODES]; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* Stuff below this line could be architecture independent */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun extern int num_node_memblks; /* total number of memory chunks */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* 34*4882a593Smuzhiyun * List of node memory chunks. Filled when parsing SRAT table to 35*4882a593Smuzhiyun * obtain information about memory nodes. 36*4882a593Smuzhiyun */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun struct node_memblk_s { 39*4882a593Smuzhiyun unsigned long start_paddr; 40*4882a593Smuzhiyun unsigned long size; 41*4882a593Smuzhiyun int nid; /* which logical node contains this chunk? */ 42*4882a593Smuzhiyun int bank; /* which mem bank on this node */ 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct node_cpuid_s { 46*4882a593Smuzhiyun u16 phys_id; /* id << 8 | eid */ 47*4882a593Smuzhiyun int nid; /* logical node containing this CPU */ 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS]; 51*4882a593Smuzhiyun extern struct node_cpuid_s node_cpuid[NR_CPUS]; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* 54*4882a593Smuzhiyun * ACPI 2.0 SLIT (System Locality Information Table) 55*4882a593Smuzhiyun * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf 56*4882a593Smuzhiyun * 57*4882a593Smuzhiyun * This is a matrix with "distances" between nodes, they should be 58*4882a593Smuzhiyun * proportional to the memory access latency ratios. 59*4882a593Smuzhiyun */ 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; 62*4882a593Smuzhiyun #define slit_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)]) 63*4882a593Smuzhiyun extern int __node_distance(int from, int to); 64*4882a593Smuzhiyun #define node_distance(from,to) __node_distance(from, to) 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun extern int paddr_to_nid(unsigned long paddr); 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define local_nodeid (cpu_to_node_map[smp_processor_id()]) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define numa_off 0 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun extern void map_cpu_to_node(int cpu, int nid); 73*4882a593Smuzhiyun extern void unmap_cpu_from_node(int cpu, int nid); 74*4882a593Smuzhiyun extern void numa_clear_node(int cpu); 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #else /* !CONFIG_NUMA */ 77*4882a593Smuzhiyun #define map_cpu_to_node(cpu, nid) do{}while(0) 78*4882a593Smuzhiyun #define unmap_cpu_from_node(cpu, nid) do{}while(0) 79*4882a593Smuzhiyun #define paddr_to_nid(addr) 0 80*4882a593Smuzhiyun #define numa_clear_node(cpu) do { } while (0) 81*4882a593Smuzhiyun #endif /* CONFIG_NUMA */ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #endif /* _ASM_IA64_NUMA_H */ 84