1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _ASM_IA64_DELAY_H 3*4882a593Smuzhiyun #define _ASM_IA64_DELAY_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * Delay routines using a pre-computed "cycles/usec" value. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 1998, 1999 Hewlett-Packard Co 9*4882a593Smuzhiyun * David Mosberger-Tang <davidm@hpl.hp.com> 10*4882a593Smuzhiyun * Copyright (C) 1999 VA Linux Systems 11*4882a593Smuzhiyun * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> 12*4882a593Smuzhiyun * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com> 13*4882a593Smuzhiyun * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include <linux/kernel.h> 17*4882a593Smuzhiyun #include <linux/sched.h> 18*4882a593Smuzhiyun #include <linux/compiler.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <asm/intrinsics.h> 21*4882a593Smuzhiyun #include <asm/processor.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun static __inline__ void ia64_set_itm(unsigned long val)24*4882a593Smuzhiyunia64_set_itm (unsigned long val) 25*4882a593Smuzhiyun { 26*4882a593Smuzhiyun ia64_setreg(_IA64_REG_CR_ITM, val); 27*4882a593Smuzhiyun ia64_srlz_d(); 28*4882a593Smuzhiyun } 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun static __inline__ unsigned long ia64_get_itm(void)31*4882a593Smuzhiyunia64_get_itm (void) 32*4882a593Smuzhiyun { 33*4882a593Smuzhiyun unsigned long result; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun result = ia64_getreg(_IA64_REG_CR_ITM); 36*4882a593Smuzhiyun ia64_srlz_d(); 37*4882a593Smuzhiyun return result; 38*4882a593Smuzhiyun } 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun static __inline__ void ia64_set_itv(unsigned long val)41*4882a593Smuzhiyunia64_set_itv (unsigned long val) 42*4882a593Smuzhiyun { 43*4882a593Smuzhiyun ia64_setreg(_IA64_REG_CR_ITV, val); 44*4882a593Smuzhiyun ia64_srlz_d(); 45*4882a593Smuzhiyun } 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun static __inline__ unsigned long ia64_get_itv(void)48*4882a593Smuzhiyunia64_get_itv (void) 49*4882a593Smuzhiyun { 50*4882a593Smuzhiyun return ia64_getreg(_IA64_REG_CR_ITV); 51*4882a593Smuzhiyun } 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun static __inline__ void ia64_set_itc(unsigned long val)54*4882a593Smuzhiyunia64_set_itc (unsigned long val) 55*4882a593Smuzhiyun { 56*4882a593Smuzhiyun ia64_setreg(_IA64_REG_AR_ITC, val); 57*4882a593Smuzhiyun ia64_srlz_d(); 58*4882a593Smuzhiyun } 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun static __inline__ unsigned long ia64_get_itc(void)61*4882a593Smuzhiyunia64_get_itc (void) 62*4882a593Smuzhiyun { 63*4882a593Smuzhiyun unsigned long result; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun result = ia64_getreg(_IA64_REG_AR_ITC); 66*4882a593Smuzhiyun ia64_barrier(); 67*4882a593Smuzhiyun #ifdef CONFIG_ITANIUM 68*4882a593Smuzhiyun while (unlikely((__s32) result == -1)) { 69*4882a593Smuzhiyun result = ia64_getreg(_IA64_REG_AR_ITC); 70*4882a593Smuzhiyun ia64_barrier(); 71*4882a593Smuzhiyun } 72*4882a593Smuzhiyun #endif 73*4882a593Smuzhiyun return result; 74*4882a593Smuzhiyun } 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun extern void ia64_delay_loop (unsigned long loops); 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun static __inline__ void __delay(unsigned long loops)79*4882a593Smuzhiyun__delay (unsigned long loops) 80*4882a593Smuzhiyun { 81*4882a593Smuzhiyun if (unlikely(loops < 1)) 82*4882a593Smuzhiyun return; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun ia64_delay_loop (loops - 1); 85*4882a593Smuzhiyun } 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun extern void udelay (unsigned long usecs); 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #endif /* _ASM_IA64_DELAY_H */ 90