1*4882a593Smuzhiyun;;; SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun;;; memcpy.S 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <asm/linkage.h> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#if defined(CONFIG_CPU_H8300H) 7*4882a593Smuzhiyun .h8300h 8*4882a593Smuzhiyun#endif 9*4882a593Smuzhiyun#if defined(CONFIG_CPU_H8S) 10*4882a593Smuzhiyun .h8300s 11*4882a593Smuzhiyun#endif 12*4882a593Smuzhiyun .text 13*4882a593Smuzhiyun.global memcpy 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun;;; void *memcpy(void *to, void *from, size_t n) 16*4882a593Smuzhiyunmemcpy: 17*4882a593Smuzhiyun mov.l er2,er2 18*4882a593Smuzhiyun bne 1f 19*4882a593Smuzhiyun rts 20*4882a593Smuzhiyun1: 21*4882a593Smuzhiyun ;; address check 22*4882a593Smuzhiyun bld #0,r0l 23*4882a593Smuzhiyun bxor #0,r1l 24*4882a593Smuzhiyun bcs 4f 25*4882a593Smuzhiyun mov.l er4,@-sp 26*4882a593Smuzhiyun mov.l er0,@-sp 27*4882a593Smuzhiyun btst #0,r0l 28*4882a593Smuzhiyun beq 1f 29*4882a593Smuzhiyun ;; (aligned even) odd address 30*4882a593Smuzhiyun mov.b @er1,r3l 31*4882a593Smuzhiyun mov.b r3l,@er0 32*4882a593Smuzhiyun adds #1,er1 33*4882a593Smuzhiyun adds #1,er0 34*4882a593Smuzhiyun dec.l #1,er2 35*4882a593Smuzhiyun beq 3f 36*4882a593Smuzhiyun1: 37*4882a593Smuzhiyun ;; n < sizeof(unsigned long) check 38*4882a593Smuzhiyun sub.l er4,er4 39*4882a593Smuzhiyun adds #4,er4 ; loop count check value 40*4882a593Smuzhiyun cmp.l er4,er2 41*4882a593Smuzhiyun blo 2f 42*4882a593Smuzhiyun ;; unsigned long copy 43*4882a593Smuzhiyun1: 44*4882a593Smuzhiyun mov.l @er1,er3 45*4882a593Smuzhiyun mov.l er3,@er0 46*4882a593Smuzhiyun adds #4,er0 47*4882a593Smuzhiyun adds #4,er1 48*4882a593Smuzhiyun subs #4,er2 49*4882a593Smuzhiyun cmp.l er4,er2 50*4882a593Smuzhiyun bcc 1b 51*4882a593Smuzhiyun ;; rest 52*4882a593Smuzhiyun2: 53*4882a593Smuzhiyun mov.l er2,er2 54*4882a593Smuzhiyun beq 3f 55*4882a593Smuzhiyun1: 56*4882a593Smuzhiyun mov.b @er1,r3l 57*4882a593Smuzhiyun mov.b r3l,@er0 58*4882a593Smuzhiyun adds #1,er1 59*4882a593Smuzhiyun adds #1,er0 60*4882a593Smuzhiyun dec.l #1,er2 61*4882a593Smuzhiyun bne 1b 62*4882a593Smuzhiyun3: 63*4882a593Smuzhiyun mov.l @sp+,er0 64*4882a593Smuzhiyun mov.l @sp+,er4 65*4882a593Smuzhiyun rts 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun ;; odd <- even / even <- odd 68*4882a593Smuzhiyun4: 69*4882a593Smuzhiyun mov.l er4,er3 70*4882a593Smuzhiyun mov.l er2,er4 71*4882a593Smuzhiyun mov.l er5,er2 72*4882a593Smuzhiyun mov.l er1,er5 73*4882a593Smuzhiyun mov.l er6,er1 74*4882a593Smuzhiyun mov.l er0,er6 75*4882a593Smuzhiyun1: 76*4882a593Smuzhiyun eepmov.w 77*4882a593Smuzhiyun mov.w r4,r4 78*4882a593Smuzhiyun bne 1b 79*4882a593Smuzhiyun dec.w #1,e4 80*4882a593Smuzhiyun bpl 1b 81*4882a593Smuzhiyun mov.l er1,er6 82*4882a593Smuzhiyun mov.l er2,er5 83*4882a593Smuzhiyun mov.l er3,er4 84*4882a593Smuzhiyun rts 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun .end 87