1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef __ABI_REG_OPS_H 5*4882a593Smuzhiyun #define __ABI_REG_OPS_H 6*4882a593Smuzhiyun #include <asm/reg_ops.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define cprcr(reg) \ 9*4882a593Smuzhiyun ({ \ 10*4882a593Smuzhiyun unsigned int tmp; \ 11*4882a593Smuzhiyun asm volatile("cprcr %0, "reg"\n":"=b"(tmp)); \ 12*4882a593Smuzhiyun tmp; \ 13*4882a593Smuzhiyun }) 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define cpwcr(reg, val) \ 16*4882a593Smuzhiyun ({ \ 17*4882a593Smuzhiyun asm volatile("cpwcr %0, "reg"\n"::"b"(val)); \ 18*4882a593Smuzhiyun }) 19*4882a593Smuzhiyun mfcr_hint(void)20*4882a593Smuzhiyunstatic inline unsigned int mfcr_hint(void) 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun return mfcr("cr30"); 23*4882a593Smuzhiyun } 24*4882a593Smuzhiyun mfcr_ccr2(void)25*4882a593Smuzhiyunstatic inline unsigned int mfcr_ccr2(void) { return 0; } 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif /* __ABI_REG_OPS_H */ 28