1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #ifndef __ASM_CSKY_CKMMUV1_H
5*4882a593Smuzhiyun #define __ASM_CSKY_CKMMUV1_H
6*4882a593Smuzhiyun #include <abi/reg_ops.h>
7*4882a593Smuzhiyun
read_mmu_index(void)8*4882a593Smuzhiyun static inline int read_mmu_index(void)
9*4882a593Smuzhiyun {
10*4882a593Smuzhiyun return cprcr("cpcr0");
11*4882a593Smuzhiyun }
12*4882a593Smuzhiyun
write_mmu_index(int value)13*4882a593Smuzhiyun static inline void write_mmu_index(int value)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun cpwcr("cpcr0", value);
16*4882a593Smuzhiyun }
17*4882a593Smuzhiyun
read_mmu_entrylo0(void)18*4882a593Smuzhiyun static inline int read_mmu_entrylo0(void)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun return cprcr("cpcr2") << 6;
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
read_mmu_entrylo1(void)23*4882a593Smuzhiyun static inline int read_mmu_entrylo1(void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun return cprcr("cpcr3") << 6;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
write_mmu_pagemask(int value)28*4882a593Smuzhiyun static inline void write_mmu_pagemask(int value)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun cpwcr("cpcr6", value);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
read_mmu_entryhi(void)33*4882a593Smuzhiyun static inline int read_mmu_entryhi(void)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun return cprcr("cpcr4");
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
write_mmu_entryhi(int value)38*4882a593Smuzhiyun static inline void write_mmu_entryhi(int value)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun cpwcr("cpcr4", value);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
read_mmu_msa0(void)43*4882a593Smuzhiyun static inline unsigned long read_mmu_msa0(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return cprcr("cpcr30");
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
write_mmu_msa0(unsigned long value)48*4882a593Smuzhiyun static inline void write_mmu_msa0(unsigned long value)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun cpwcr("cpcr30", value);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
read_mmu_msa1(void)53*4882a593Smuzhiyun static inline unsigned long read_mmu_msa1(void)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun return cprcr("cpcr31");
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
write_mmu_msa1(unsigned long value)58*4882a593Smuzhiyun static inline void write_mmu_msa1(unsigned long value)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun cpwcr("cpcr31", value);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * TLB operations.
65*4882a593Smuzhiyun */
tlb_probe(void)66*4882a593Smuzhiyun static inline void tlb_probe(void)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun cpwcr("cpcr8", 0x80000000);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
tlb_read(void)71*4882a593Smuzhiyun static inline void tlb_read(void)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun cpwcr("cpcr8", 0x40000000);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
tlb_invalid_all(void)76*4882a593Smuzhiyun static inline void tlb_invalid_all(void)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun cpwcr("cpcr8", 0x04000000);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun
local_tlb_invalid_all(void)82*4882a593Smuzhiyun static inline void local_tlb_invalid_all(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun tlb_invalid_all();
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
tlb_invalid_indexed(void)87*4882a593Smuzhiyun static inline void tlb_invalid_indexed(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun cpwcr("cpcr8", 0x02000000);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
setup_pgd(unsigned long pgd,bool kernel)92*4882a593Smuzhiyun static inline void setup_pgd(unsigned long pgd, bool kernel)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun cpwcr("cpcr29", pgd | BIT(0));
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
get_pgd(void)97*4882a593Smuzhiyun static inline unsigned long get_pgd(void)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return cprcr("cpcr29") & ~BIT(0);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun #endif /* __ASM_CSKY_CKMMUV1_H */
102