1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Port on Texas Instruments TMS320C6x architecture 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated 6*4882a593Smuzhiyun * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef _ASM_C6X_PGTABLE_H 9*4882a593Smuzhiyun #define _ASM_C6X_PGTABLE_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <asm-generic/pgtable-nopud.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/setup.h> 14*4882a593Smuzhiyun #include <asm/page.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * All 32bit addresses are effectively valid for vmalloc... 18*4882a593Smuzhiyun * Sort of meaningless for non-VM targets. 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun #define VMALLOC_START 0 21*4882a593Smuzhiyun #define VMALLOC_END 0xffffffff 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define pgd_present(pgd) (1) 24*4882a593Smuzhiyun #define pgd_none(pgd) (0) 25*4882a593Smuzhiyun #define pgd_bad(pgd) (0) 26*4882a593Smuzhiyun #define pgd_clear(pgdp) 27*4882a593Smuzhiyun #define kern_addr_valid(addr) (1) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define pmd_none(x) (!pmd_val(x)) 30*4882a593Smuzhiyun #define pmd_present(x) (pmd_val(x)) 31*4882a593Smuzhiyun #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 32*4882a593Smuzhiyun #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ 35*4882a593Smuzhiyun #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ 36*4882a593Smuzhiyun #define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */ 37*4882a593Smuzhiyun #define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */ 38*4882a593Smuzhiyun #define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */ 39*4882a593Smuzhiyun #define pgprot_noncached(prot) (prot) 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun extern void paging_init(void); 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define __swp_type(x) (0) 44*4882a593Smuzhiyun #define __swp_offset(x) (0) 45*4882a593Smuzhiyun #define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) 46*4882a593Smuzhiyun #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 47*4882a593Smuzhiyun #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define set_pte(pteptr, pteval) (*(pteptr) = pteval) 50*4882a593Smuzhiyun #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * ZERO_PAGE is a global shared page that is always zero: used 54*4882a593Smuzhiyun * for zero-mapped memory areas etc.. 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) 57*4882a593Smuzhiyun extern unsigned long empty_zero_page; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define swapper_pg_dir ((pgd_t *) 0) 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* 62*4882a593Smuzhiyun * c6x is !MMU, so define the simpliest implementation 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun #define pgprot_writecombine pgprot_noncached 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #endif /* _ASM_C6X_PGTABLE_H */ 67