1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Port on Texas Instruments TMS320C6x architecture 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated 6*4882a593Smuzhiyun * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef _ASM_C6X_ELF_H 9*4882a593Smuzhiyun #define _ASM_C6X_ELF_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * ELF register definitions.. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun #include <asm/ptrace.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun typedef unsigned long elf_greg_t; 17*4882a593Smuzhiyun typedef unsigned long elf_fpreg_t; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define ELF_NGREG 58 20*4882a593Smuzhiyun #define ELF_NFPREG 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 23*4882a593Smuzhiyun typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* 26*4882a593Smuzhiyun * This is used to ensure we don't load something for the wrong architecture. 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun #define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define elf_check_fdpic(x) (1) 31*4882a593Smuzhiyun #define elf_check_const_displacement(x) (0) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \ 34*4882a593Smuzhiyun do { \ 35*4882a593Smuzhiyun _regs->b4 = (_exec_map); \ 36*4882a593Smuzhiyun _regs->a6 = (_interp_map); \ 37*4882a593Smuzhiyun _regs->b6 = (_dynamic_addr); \ 38*4882a593Smuzhiyun } while (0) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define ELF_FDPIC_CORE_EFLAGS 0 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define ELF_CORE_COPY_FPREGS(...) 0 /* No FPU regs to copy */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* 45*4882a593Smuzhiyun * These are used to set parameters in the core dumps. 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun #ifdef __LITTLE_ENDIAN__ 48*4882a593Smuzhiyun #define ELF_DATA ELFDATA2LSB 49*4882a593Smuzhiyun #else 50*4882a593Smuzhiyun #define ELF_DATA ELFDATA2MSB 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define ELF_CLASS ELFCLASS32 54*4882a593Smuzhiyun #define ELF_ARCH EM_TI_C6000 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* Nothing for now. Need to setup DP... */ 57*4882a593Smuzhiyun #define ELF_PLAT_INIT(_r) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define USE_ELF_CORE_DUMP 60*4882a593Smuzhiyun #define ELF_EXEC_PAGESIZE 4096 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define ELF_CORE_COPY_REGS(_dest, _regs) \ 63*4882a593Smuzhiyun memcpy((char *) &_dest, (char *) _regs, \ 64*4882a593Smuzhiyun sizeof(struct pt_regs)); 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* This yields a mask that user programs can use to figure out what 67*4882a593Smuzhiyun instruction set this cpu supports. */ 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define ELF_HWCAP (0) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* This yields a string that ld.so will use to load implementation 72*4882a593Smuzhiyun specific libraries for optimization. This is more specific in 73*4882a593Smuzhiyun intent than poking at uname or /proc/cpuinfo. */ 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define ELF_PLATFORM (NULL) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* C6X specific section types */ 78*4882a593Smuzhiyun #define SHT_C6000_UNWIND 0x70000001 79*4882a593Smuzhiyun #define SHT_C6000_PREEMPTMAP 0x70000002 80*4882a593Smuzhiyun #define SHT_C6000_ATTRIBUTES 0x70000003 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* C6X specific DT_ tags */ 83*4882a593Smuzhiyun #define DT_C6000_DSBT_BASE 0x70000000 84*4882a593Smuzhiyun #define DT_C6000_DSBT_SIZE 0x70000001 85*4882a593Smuzhiyun #define DT_C6000_PREEMPTMAP 0x70000002 86*4882a593Smuzhiyun #define DT_C6000_DSBT_INDEX 0x70000003 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* C6X specific relocs */ 89*4882a593Smuzhiyun #define R_C6000_NONE 0 90*4882a593Smuzhiyun #define R_C6000_ABS32 1 91*4882a593Smuzhiyun #define R_C6000_ABS16 2 92*4882a593Smuzhiyun #define R_C6000_ABS8 3 93*4882a593Smuzhiyun #define R_C6000_PCR_S21 4 94*4882a593Smuzhiyun #define R_C6000_PCR_S12 5 95*4882a593Smuzhiyun #define R_C6000_PCR_S10 6 96*4882a593Smuzhiyun #define R_C6000_PCR_S7 7 97*4882a593Smuzhiyun #define R_C6000_ABS_S16 8 98*4882a593Smuzhiyun #define R_C6000_ABS_L16 9 99*4882a593Smuzhiyun #define R_C6000_ABS_H16 10 100*4882a593Smuzhiyun #define R_C6000_SBR_U15_B 11 101*4882a593Smuzhiyun #define R_C6000_SBR_U15_H 12 102*4882a593Smuzhiyun #define R_C6000_SBR_U15_W 13 103*4882a593Smuzhiyun #define R_C6000_SBR_S16 14 104*4882a593Smuzhiyun #define R_C6000_SBR_L16_B 15 105*4882a593Smuzhiyun #define R_C6000_SBR_L16_H 16 106*4882a593Smuzhiyun #define R_C6000_SBR_L16_W 17 107*4882a593Smuzhiyun #define R_C6000_SBR_H16_B 18 108*4882a593Smuzhiyun #define R_C6000_SBR_H16_H 19 109*4882a593Smuzhiyun #define R_C6000_SBR_H16_W 20 110*4882a593Smuzhiyun #define R_C6000_SBR_GOT_U15_W 21 111*4882a593Smuzhiyun #define R_C6000_SBR_GOT_L16_W 22 112*4882a593Smuzhiyun #define R_C6000_SBR_GOT_H16_W 23 113*4882a593Smuzhiyun #define R_C6000_DSBT_INDEX 24 114*4882a593Smuzhiyun #define R_C6000_PREL31 25 115*4882a593Smuzhiyun #define R_C6000_COPY 26 116*4882a593Smuzhiyun #define R_C6000_ALIGN 253 117*4882a593Smuzhiyun #define R_C6000_FPHEAD 254 118*4882a593Smuzhiyun #define R_C6000_NOCMP 255 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #endif /*_ASM_C6X_ELF_H */ 121