1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * arch/c6x/boot/dts/evmc6678.dts 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * EVMC6678 Evaluation Platform For TMS320C6678 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments Incorporated 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Author: Ken Cox <jkc@redhat.com> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/dts-v1/; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/include/ "tms320c6678.dtsi" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun model = "Advantech EVMC6678"; 18*4882a593Smuzhiyun compatible = "advantech,evmc6678"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun bootargs = "root=/dev/nfs ip=dhcp rw"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun memory { 25*4882a593Smuzhiyun device_type = "memory"; 26*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun soc { 30*4882a593Smuzhiyun megamod_pic: interrupt-controller@1800000 { 31*4882a593Smuzhiyun interrupts = < 12 13 14 15 >; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun timer8: timer@2280000 { 35*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 36*4882a593Smuzhiyun interrupts = < 66 >; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun timer9: timer@2290000 { 40*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 41*4882a593Smuzhiyun interrupts = < 68 >; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun timer10: timer@22A0000 { 45*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 46*4882a593Smuzhiyun interrupts = < 70 >; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun timer11: timer@22B0000 { 50*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 51*4882a593Smuzhiyun interrupts = < 72 >; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun timer12: timer@22C0000 { 55*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 56*4882a593Smuzhiyun interrupts = < 74 >; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun timer13: timer@22D0000 { 60*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 61*4882a593Smuzhiyun interrupts = < 76 >; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun timer14: timer@22E0000 { 65*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 66*4882a593Smuzhiyun interrupts = < 78 >; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun timer15: timer@22F0000 { 70*4882a593Smuzhiyun interrupt-parent = <&megamod_pic>; 71*4882a593Smuzhiyun interrupts = < 80 >; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun clock-controller@2310000 { 75*4882a593Smuzhiyun clock-frequency = <100000000>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79