1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2015 - ARM Ltd 4*4882a593Smuzhiyun * Author: Marc Zyngier <marc.zyngier@arm.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <hyp/debug-sr.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/compiler.h> 10*4882a593Smuzhiyun #include <linux/kvm_host.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/debug-monitors.h> 13*4882a593Smuzhiyun #include <asm/kvm_asm.h> 14*4882a593Smuzhiyun #include <asm/kvm_hyp.h> 15*4882a593Smuzhiyun #include <asm/kvm_mmu.h> 16*4882a593Smuzhiyun __debug_save_spe(u64 * pmscr_el1)17*4882a593Smuzhiyunstatic void __debug_save_spe(u64 *pmscr_el1) 18*4882a593Smuzhiyun { 19*4882a593Smuzhiyun u64 reg; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Clear pmscr in case of early return */ 22*4882a593Smuzhiyun *pmscr_el1 = 0; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * At this point, we know that this CPU implements 26*4882a593Smuzhiyun * SPE and is available to the host. 27*4882a593Smuzhiyun * Check if the host is actually using it ? 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun reg = read_sysreg_s(SYS_PMBLIMITR_EL1); 30*4882a593Smuzhiyun if (!(reg & BIT(SYS_PMBLIMITR_EL1_E_SHIFT))) 31*4882a593Smuzhiyun return; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Yes; save the control register and disable data generation */ 34*4882a593Smuzhiyun *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1); 35*4882a593Smuzhiyun write_sysreg_s(0, SYS_PMSCR_EL1); 36*4882a593Smuzhiyun isb(); 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* Now drain all buffered data to memory */ 39*4882a593Smuzhiyun psb_csync(); 40*4882a593Smuzhiyun dsb(nsh); 41*4882a593Smuzhiyun } 42*4882a593Smuzhiyun __debug_restore_spe(u64 pmscr_el1)43*4882a593Smuzhiyunstatic void __debug_restore_spe(u64 pmscr_el1) 44*4882a593Smuzhiyun { 45*4882a593Smuzhiyun if (!pmscr_el1) 46*4882a593Smuzhiyun return; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* The host page table is installed, but not yet synchronised */ 49*4882a593Smuzhiyun isb(); 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Re-enable data generation */ 52*4882a593Smuzhiyun write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1); 53*4882a593Smuzhiyun } 54*4882a593Smuzhiyun __debug_save_trace(u64 * trfcr_el1)55*4882a593Smuzhiyunstatic void __debug_save_trace(u64 *trfcr_el1) 56*4882a593Smuzhiyun { 57*4882a593Smuzhiyun *trfcr_el1 = 0; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Check if the TRBE is enabled */ 60*4882a593Smuzhiyun if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_ENABLE)) 61*4882a593Smuzhiyun return; 62*4882a593Smuzhiyun /* 63*4882a593Smuzhiyun * Prohibit trace generation while we are in guest. 64*4882a593Smuzhiyun * Since access to TRFCR_EL1 is trapped, the guest can't 65*4882a593Smuzhiyun * modify the filtering set by the host. 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun *trfcr_el1 = read_sysreg_s(SYS_TRFCR_EL1); 68*4882a593Smuzhiyun write_sysreg_s(0, SYS_TRFCR_EL1); 69*4882a593Smuzhiyun isb(); 70*4882a593Smuzhiyun /* Drain the trace buffer to memory */ 71*4882a593Smuzhiyun tsb_csync(); 72*4882a593Smuzhiyun dsb(nsh); 73*4882a593Smuzhiyun } 74*4882a593Smuzhiyun __debug_restore_trace(u64 trfcr_el1)75*4882a593Smuzhiyunstatic void __debug_restore_trace(u64 trfcr_el1) 76*4882a593Smuzhiyun { 77*4882a593Smuzhiyun if (!trfcr_el1) 78*4882a593Smuzhiyun return; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* Restore trace filter controls */ 81*4882a593Smuzhiyun write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1); 82*4882a593Smuzhiyun } 83*4882a593Smuzhiyun __debug_save_host_buffers_nvhe(struct kvm_vcpu * vcpu)84*4882a593Smuzhiyunvoid __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) 85*4882a593Smuzhiyun { 86*4882a593Smuzhiyun /* Disable and flush SPE data generation */ 87*4882a593Smuzhiyun if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_SPE) 88*4882a593Smuzhiyun __debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1); 89*4882a593Smuzhiyun /* Disable and flush Self-Hosted Trace generation */ 90*4882a593Smuzhiyun if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_TRBE) 91*4882a593Smuzhiyun __debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1); 92*4882a593Smuzhiyun } 93*4882a593Smuzhiyun __debug_switch_to_guest(struct kvm_vcpu * vcpu)94*4882a593Smuzhiyunvoid __debug_switch_to_guest(struct kvm_vcpu *vcpu) 95*4882a593Smuzhiyun { 96*4882a593Smuzhiyun __debug_switch_to_guest_common(vcpu); 97*4882a593Smuzhiyun } 98*4882a593Smuzhiyun __debug_restore_host_buffers_nvhe(struct kvm_vcpu * vcpu)99*4882a593Smuzhiyunvoid __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu) 100*4882a593Smuzhiyun { 101*4882a593Smuzhiyun if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_SPE) 102*4882a593Smuzhiyun __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1); 103*4882a593Smuzhiyun if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_TRBE) 104*4882a593Smuzhiyun __debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1); 105*4882a593Smuzhiyun } 106*4882a593Smuzhiyun __debug_switch_to_host(struct kvm_vcpu * vcpu)107*4882a593Smuzhiyunvoid __debug_switch_to_host(struct kvm_vcpu *vcpu) 108*4882a593Smuzhiyun { 109*4882a593Smuzhiyun __debug_switch_to_host_common(vcpu); 110*4882a593Smuzhiyun } 111*4882a593Smuzhiyun __kvm_get_mdcr_el2(void)112*4882a593Smuzhiyunu32 __kvm_get_mdcr_el2(void) 113*4882a593Smuzhiyun { 114*4882a593Smuzhiyun return read_sysreg(mdcr_el2); 115*4882a593Smuzhiyun } 116