1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2020 ARM Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __ASM_MTE_DEF_H 6*4882a593Smuzhiyun #define __ASM_MTE_DEF_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define MTE_GRANULE_SIZE UL(16) 9*4882a593Smuzhiyun #define MTE_GRANULE_MASK (~(MTE_GRANULE_SIZE - 1)) 10*4882a593Smuzhiyun #define MTE_TAG_SHIFT 56 11*4882a593Smuzhiyun #define MTE_TAG_SIZE 4 12*4882a593Smuzhiyun #define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define __MTE_PREAMBLE ARM64_ASM_PREAMBLE ".arch_extension memtag\n" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #endif /* __ASM_MTE_DEF_H */ 17