1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_LSE_H 3*4882a593Smuzhiyun #define __ASM_LSE_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <asm/atomic_ll_sc.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #if defined(CONFIG_ARM64_LSE_ATOMICS) && !defined(BUILD_FIPS140_KO) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define __LSE_PREAMBLE ".arch_extension lse\n" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/compiler_types.h> 12*4882a593Smuzhiyun #include <linux/export.h> 13*4882a593Smuzhiyun #include <linux/jump_label.h> 14*4882a593Smuzhiyun #include <linux/stringify.h> 15*4882a593Smuzhiyun #include <asm/alternative.h> 16*4882a593Smuzhiyun #include <asm/atomic_lse.h> 17*4882a593Smuzhiyun #include <asm/cpucaps.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS]; 20*4882a593Smuzhiyun extern struct static_key_false arm64_const_caps_ready; 21*4882a593Smuzhiyun system_uses_lse_atomics(void)22*4882a593Smuzhiyunstatic inline bool system_uses_lse_atomics(void) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun return (static_branch_likely(&arm64_const_caps_ready)) && 25*4882a593Smuzhiyun static_branch_likely(&cpu_hwcap_keys[ARM64_HAS_LSE_ATOMICS]); 26*4882a593Smuzhiyun } 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define __lse_ll_sc_body(op, ...) \ 29*4882a593Smuzhiyun ({ \ 30*4882a593Smuzhiyun system_uses_lse_atomics() ? \ 31*4882a593Smuzhiyun __lse_##op(__VA_ARGS__) : \ 32*4882a593Smuzhiyun __ll_sc_##op(__VA_ARGS__); \ 33*4882a593Smuzhiyun }) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* In-line patching at runtime */ 36*4882a593Smuzhiyun #define ARM64_LSE_ATOMIC_INSN(llsc, lse) \ 37*4882a593Smuzhiyun ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #else /* CONFIG_ARM64_LSE_ATOMICS */ 40*4882a593Smuzhiyun system_uses_lse_atomics(void)41*4882a593Smuzhiyunstatic inline bool system_uses_lse_atomics(void) { return false; } 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define __lse_ll_sc_body(op, ...) __ll_sc_##op(__VA_ARGS__) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define ARM64_LSE_ATOMIC_INSN(llsc, lse) llsc 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif /* CONFIG_ARM64_LSE_ATOMICS */ 48*4882a593Smuzhiyun #endif /* __ASM_LSE_H */ 49