1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2017 ARM Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #ifndef __ASM_DAIFFLAGS_H
6*4882a593Smuzhiyun #define __ASM_DAIFFLAGS_H
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/irqflags.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <asm/arch_gicv3.h>
11*4882a593Smuzhiyun #include <asm/barrier.h>
12*4882a593Smuzhiyun #include <asm/cpufeature.h>
13*4882a593Smuzhiyun #include <asm/ptrace.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define DAIF_PROCCTX 0
16*4882a593Smuzhiyun #define DAIF_PROCCTX_NOIRQ PSR_I_BIT
17*4882a593Smuzhiyun #define DAIF_ERRCTX (PSR_I_BIT | PSR_A_BIT)
18*4882a593Smuzhiyun #define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /* mask/save/unmask/restore all exceptions, including interrupts. */
local_daif_mask(void)22*4882a593Smuzhiyun static inline void local_daif_mask(void)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun WARN_ON(system_has_prio_mask_debugging() &&
25*4882a593Smuzhiyun (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
26*4882a593Smuzhiyun GIC_PRIO_PSR_I_SET)));
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun asm volatile(
29*4882a593Smuzhiyun "msr daifset, #0xf // local_daif_mask\n"
30*4882a593Smuzhiyun :
31*4882a593Smuzhiyun :
32*4882a593Smuzhiyun : "memory");
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* Don't really care for a dsb here, we don't intend to enable IRQs */
35*4882a593Smuzhiyun if (system_uses_irq_prio_masking())
36*4882a593Smuzhiyun gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun trace_hardirqs_off();
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
local_daif_save_flags(void)41*4882a593Smuzhiyun static inline unsigned long local_daif_save_flags(void)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun unsigned long flags;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun flags = read_sysreg(daif);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (system_uses_irq_prio_masking()) {
48*4882a593Smuzhiyun /* If IRQs are masked with PMR, reflect it in the flags */
49*4882a593Smuzhiyun if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON)
50*4882a593Smuzhiyun flags |= PSR_I_BIT;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return flags;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
local_daif_save(void)56*4882a593Smuzhiyun static inline unsigned long local_daif_save(void)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun unsigned long flags;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun flags = local_daif_save_flags();
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun local_daif_mask();
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return flags;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
local_daif_restore(unsigned long flags)67*4882a593Smuzhiyun static inline void local_daif_restore(unsigned long flags)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun bool irq_disabled = flags & PSR_I_BIT;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun WARN_ON(system_has_prio_mask_debugging() &&
72*4882a593Smuzhiyun !(read_sysreg(daif) & PSR_I_BIT));
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if (!irq_disabled) {
75*4882a593Smuzhiyun trace_hardirqs_on();
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (system_uses_irq_prio_masking()) {
78*4882a593Smuzhiyun gic_write_pmr(GIC_PRIO_IRQON);
79*4882a593Smuzhiyun pmr_sync();
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun } else if (system_uses_irq_prio_masking()) {
82*4882a593Smuzhiyun u64 pmr;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (!(flags & PSR_A_BIT)) {
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * If interrupts are disabled but we can take
87*4882a593Smuzhiyun * asynchronous errors, we can take NMIs
88*4882a593Smuzhiyun */
89*4882a593Smuzhiyun flags &= ~PSR_I_BIT;
90*4882a593Smuzhiyun pmr = GIC_PRIO_IRQOFF;
91*4882a593Smuzhiyun } else {
92*4882a593Smuzhiyun pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * There has been concern that the write to daif
97*4882a593Smuzhiyun * might be reordered before this write to PMR.
98*4882a593Smuzhiyun * From the ARM ARM DDI 0487D.a, section D1.7.1
99*4882a593Smuzhiyun * "Accessing PSTATE fields":
100*4882a593Smuzhiyun * Writes to the PSTATE fields have side-effects on
101*4882a593Smuzhiyun * various aspects of the PE operation. All of these
102*4882a593Smuzhiyun * side-effects are guaranteed:
103*4882a593Smuzhiyun * - Not to be visible to earlier instructions in
104*4882a593Smuzhiyun * the execution stream.
105*4882a593Smuzhiyun * - To be visible to later instructions in the
106*4882a593Smuzhiyun * execution stream
107*4882a593Smuzhiyun *
108*4882a593Smuzhiyun * Also, writes to PMR are self-synchronizing, so no
109*4882a593Smuzhiyun * interrupts with a lower priority than PMR is signaled
110*4882a593Smuzhiyun * to the PE after the write.
111*4882a593Smuzhiyun *
112*4882a593Smuzhiyun * So we don't need additional synchronization here.
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun gic_write_pmr(pmr);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun write_sysreg(flags, daif);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (irq_disabled)
120*4882a593Smuzhiyun trace_hardirqs_off();
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /*
124*4882a593Smuzhiyun * Called by synchronous exception handlers to restore the DAIF bits that were
125*4882a593Smuzhiyun * modified by taking an exception.
126*4882a593Smuzhiyun */
local_daif_inherit(struct pt_regs * regs)127*4882a593Smuzhiyun static inline void local_daif_inherit(struct pt_regs *regs)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun unsigned long flags = regs->pstate & DAIF_MASK;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (interrupts_enabled(regs))
132*4882a593Smuzhiyun trace_hardirqs_on();
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (system_uses_irq_prio_masking())
135*4882a593Smuzhiyun gic_write_pmr(regs->pmr_save);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /*
138*4882a593Smuzhiyun * We can't use local_daif_restore(regs->pstate) here as
139*4882a593Smuzhiyun * system_has_prio_mask_debugging() won't restore the I bit if it can
140*4882a593Smuzhiyun * use the pmr instead.
141*4882a593Smuzhiyun */
142*4882a593Smuzhiyun write_sysreg(flags, daif);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun #endif
145