1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2014 ARM Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __ASM_CPU_H 6*4882a593Smuzhiyun #define __ASM_CPU_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <linux/cpu.h> 9*4882a593Smuzhiyun #include <linux/init.h> 10*4882a593Smuzhiyun #include <linux/percpu.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * Records attributes of an individual CPU. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun struct cpuinfo_32bit { 16*4882a593Smuzhiyun u32 reg_id_dfr0; 17*4882a593Smuzhiyun u32 reg_id_dfr1; 18*4882a593Smuzhiyun u32 reg_id_isar0; 19*4882a593Smuzhiyun u32 reg_id_isar1; 20*4882a593Smuzhiyun u32 reg_id_isar2; 21*4882a593Smuzhiyun u32 reg_id_isar3; 22*4882a593Smuzhiyun u32 reg_id_isar4; 23*4882a593Smuzhiyun u32 reg_id_isar5; 24*4882a593Smuzhiyun u32 reg_id_isar6; 25*4882a593Smuzhiyun u32 reg_id_mmfr0; 26*4882a593Smuzhiyun u32 reg_id_mmfr1; 27*4882a593Smuzhiyun u32 reg_id_mmfr2; 28*4882a593Smuzhiyun u32 reg_id_mmfr3; 29*4882a593Smuzhiyun u32 reg_id_mmfr4; 30*4882a593Smuzhiyun u32 reg_id_mmfr5; 31*4882a593Smuzhiyun u32 reg_id_pfr0; 32*4882a593Smuzhiyun u32 reg_id_pfr1; 33*4882a593Smuzhiyun u32 reg_id_pfr2; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun u32 reg_mvfr0; 36*4882a593Smuzhiyun u32 reg_mvfr1; 37*4882a593Smuzhiyun u32 reg_mvfr2; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun struct cpuinfo_arm64 { 41*4882a593Smuzhiyun struct cpu cpu; 42*4882a593Smuzhiyun struct kobject kobj; 43*4882a593Smuzhiyun u32 reg_ctr; 44*4882a593Smuzhiyun u32 reg_cntfrq; 45*4882a593Smuzhiyun u32 reg_dczid; 46*4882a593Smuzhiyun u32 reg_midr; 47*4882a593Smuzhiyun u32 reg_revidr; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun u64 reg_id_aa64dfr0; 50*4882a593Smuzhiyun u64 reg_id_aa64dfr1; 51*4882a593Smuzhiyun u64 reg_id_aa64isar0; 52*4882a593Smuzhiyun u64 reg_id_aa64isar1; 53*4882a593Smuzhiyun u64 reg_id_aa64isar2; 54*4882a593Smuzhiyun u64 reg_id_aa64mmfr0; 55*4882a593Smuzhiyun u64 reg_id_aa64mmfr1; 56*4882a593Smuzhiyun u64 reg_id_aa64mmfr2; 57*4882a593Smuzhiyun u64 reg_id_aa64pfr0; 58*4882a593Smuzhiyun u64 reg_id_aa64pfr1; 59*4882a593Smuzhiyun u64 reg_id_aa64zfr0; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun struct cpuinfo_32bit aarch32; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */ 64*4882a593Smuzhiyun u64 reg_zcr; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data); 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun void cpuinfo_store_cpu(void); 70*4882a593Smuzhiyun void __init cpuinfo_store_boot_cpu(void); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun void __init init_cpu_features(struct cpuinfo_arm64 *info); 73*4882a593Smuzhiyun void update_cpu_features(int cpu, struct cpuinfo_arm64 *info, 74*4882a593Smuzhiyun struct cpuinfo_arm64 *boot); 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #endif /* __ASM_CPU_H */ 77