1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * dts file for Xilinx ZynqMP ZC1232 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2017 - 2019, Xilinx, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Michal Simek <michal.simek@xilinx.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun#include "zynqmp.dtsi" 13*4882a593Smuzhiyun#include "zynqmp-clk-ccf.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "ZynqMP ZC1232 RevA"; 17*4882a593Smuzhiyun compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun aliases { 20*4882a593Smuzhiyun serial0 = &uart0; 21*4882a593Smuzhiyun serial1 = &dcc; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun chosen { 25*4882a593Smuzhiyun bootargs = "earlycon"; 26*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun memory@0 { 30*4882a593Smuzhiyun device_type = "memory"; 31*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun}; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&dcc { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&sata { 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun /* SATA OOB timing settings */ 42*4882a593Smuzhiyun ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 43*4882a593Smuzhiyun ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 44*4882a593Smuzhiyun ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 45*4882a593Smuzhiyun ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 46*4882a593Smuzhiyun ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 47*4882a593Smuzhiyun ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 48*4882a593Smuzhiyun ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 49*4882a593Smuzhiyun ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&uart0 { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun}; 55