1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h" 8*4882a593Smuzhiyun#include "rk3588s.dtsi" 9*4882a593Smuzhiyun#include "rk3588s-evb.dtsi" 10*4882a593Smuzhiyun#include "rk3588-rk806-single.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun combophy_avdd0v85: combophy-avdd0v85 { 14*4882a593Smuzhiyun compatible = "regulator-fixed"; 15*4882a593Smuzhiyun regulator-name = "combophy_avdd0v85"; 16*4882a593Smuzhiyun regulator-boot-on; 17*4882a593Smuzhiyun regulator-always-on; 18*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 19*4882a593Smuzhiyun regulator-max-microvolt = <850000>; 20*4882a593Smuzhiyun vin-supply = <&vdd_0v85_s0>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun combophy_avdd1v8: combophy-avdd1v8 { 24*4882a593Smuzhiyun compatible = "regulator-fixed"; 25*4882a593Smuzhiyun regulator-name = "combophy_avdd1v8"; 26*4882a593Smuzhiyun regulator-boot-on; 27*4882a593Smuzhiyun regulator-always-on; 28*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 29*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 30*4882a593Smuzhiyun vin-supply = <&avcc_1v8_s0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun es7202_sound_micarray: es7202-sound-micarray { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun compatible = "simple-audio-card"; 36*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 37*4882a593Smuzhiyun simple-audio-card,name = "rockchip,sound-micarray"; 38*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 39*4882a593Smuzhiyun simple-audio-card,dai-link@0 { 40*4882a593Smuzhiyun format = "pdm"; 41*4882a593Smuzhiyun cpu { 42*4882a593Smuzhiyun sound-dai = <&pdm0>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun codec { 45*4882a593Smuzhiyun sound-dai = <&es7202>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun es8388_sound: es8388-sound { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun compatible = "rockchip,multicodecs-card"; 53*4882a593Smuzhiyun rockchip,card-name = "rockchip-es8388"; 54*4882a593Smuzhiyun hp-det-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 55*4882a593Smuzhiyun io-channels = <&saradc 3>; 56*4882a593Smuzhiyun io-channel-names = "adc-detect"; 57*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 58*4882a593Smuzhiyun poll-interval = <100>; 59*4882a593Smuzhiyun spk-con-gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 60*4882a593Smuzhiyun hp-con-gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun rockchip,format = "i2s"; 62*4882a593Smuzhiyun rockchip,mclk-fs = <256>; 63*4882a593Smuzhiyun rockchip,cpu = <&i2s0_8ch>; 64*4882a593Smuzhiyun rockchip,codec = <&es8388>; 65*4882a593Smuzhiyun rockchip,audio-routing = 66*4882a593Smuzhiyun "Headphone", "LOUT1", 67*4882a593Smuzhiyun "Headphone", "ROUT1", 68*4882a593Smuzhiyun "Speaker", "LOUT2", 69*4882a593Smuzhiyun "Speaker", "ROUT2", 70*4882a593Smuzhiyun "Headphone", "Headphone Power", 71*4882a593Smuzhiyun "Headphone", "Headphone Power", 72*4882a593Smuzhiyun "Speaker", "Speaker Power", 73*4882a593Smuzhiyun "Speaker", "Speaker Power", 74*4882a593Smuzhiyun "LINPUT1", "Main Mic", 75*4882a593Smuzhiyun "LINPUT2", "Main Mic", 76*4882a593Smuzhiyun "RINPUT1", "Headset Mic", 77*4882a593Smuzhiyun "RINPUT2", "Headset Mic"; 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&hp_det>; 80*4882a593Smuzhiyun play-pause-key { 81*4882a593Smuzhiyun label = "playpause"; 82*4882a593Smuzhiyun linux,code = <KEY_PLAYPAUSE>; 83*4882a593Smuzhiyun press-threshold-microvolt = <2000>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun fan: pwm-fan { 88*4882a593Smuzhiyun compatible = "pwm-fan"; 89*4882a593Smuzhiyun #cooling-cells = <2>; 90*4882a593Smuzhiyun pwms = <&pwm11 0 50000 0>; 91*4882a593Smuzhiyun cooling-levels = <0 50 100 150 200 255>; 92*4882a593Smuzhiyun rockchip,temp-trips = < 93*4882a593Smuzhiyun 50000 1 94*4882a593Smuzhiyun 55000 2 95*4882a593Smuzhiyun 60000 3 96*4882a593Smuzhiyun 65000 4 97*4882a593Smuzhiyun 70000 5 98*4882a593Smuzhiyun >; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun panel-edp { 102*4882a593Smuzhiyun compatible = "simple-panel"; 103*4882a593Smuzhiyun backlight = <&backlight>; 104*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd_edp>; 105*4882a593Smuzhiyun prepare-delay-ms = <120>; 106*4882a593Smuzhiyun enable-delay-ms = <120>; 107*4882a593Smuzhiyun unprepare-delay-ms = <120>; 108*4882a593Smuzhiyun disable-delay-ms = <120>; 109*4882a593Smuzhiyun width-mm = <129>; 110*4882a593Smuzhiyun height-mm = <171>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun panel-timing { 113*4882a593Smuzhiyun clock-frequency = <200000000>; 114*4882a593Smuzhiyun hactive = <1536>; 115*4882a593Smuzhiyun vactive = <2048>; 116*4882a593Smuzhiyun hfront-porch = <12>; 117*4882a593Smuzhiyun hsync-len = <16>; 118*4882a593Smuzhiyun hback-porch = <48>; 119*4882a593Smuzhiyun vfront-porch = <8>; 120*4882a593Smuzhiyun vsync-len = <4>; 121*4882a593Smuzhiyun vback-porch = <8>; 122*4882a593Smuzhiyun hsync-active = <0>; 123*4882a593Smuzhiyun vsync-active = <0>; 124*4882a593Smuzhiyun de-active = <0>; 125*4882a593Smuzhiyun pixelclk-active = <0>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun port { 129*4882a593Smuzhiyun panel_in_edp: endpoint { 130*4882a593Smuzhiyun remote-endpoint = <&edp_out_panel>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun vbus5v0_typec: vbus5v0-typec { 136*4882a593Smuzhiyun compatible = "regulator-fixed"; 137*4882a593Smuzhiyun regulator-name = "vbus5v0_typec"; 138*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 139*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 140*4882a593Smuzhiyun enable-active-high; 141*4882a593Smuzhiyun gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; 142*4882a593Smuzhiyun vin-supply = <&vcc5v0_usb>; 143*4882a593Smuzhiyun pinctrl-names = "default"; 144*4882a593Smuzhiyun pinctrl-0 = <&typec5v_pwren>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { 148*4882a593Smuzhiyun compatible = "regulator-fixed"; 149*4882a593Smuzhiyun regulator-name = "vcc_1v1_nldo_s3"; 150*4882a593Smuzhiyun regulator-always-on; 151*4882a593Smuzhiyun regulator-boot-on; 152*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 153*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 154*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun vcc3v3_lcd_edp: vcc3v3-lcd-edp { 158*4882a593Smuzhiyun compatible = "regulator-fixed"; 159*4882a593Smuzhiyun regulator-name = "vcc3v3_lcd_edp"; 160*4882a593Smuzhiyun gpio = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>; 161*4882a593Smuzhiyun enable-active-high; 162*4882a593Smuzhiyun regulator-boot-on; 163*4882a593Smuzhiyun vin-supply = <&vcc_3v3_s3>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun vcc3v3_pcie20: vcc3v3-pcie20 { 167*4882a593Smuzhiyun compatible = "regulator-fixed"; 168*4882a593Smuzhiyun regulator-name = "vcc3v3_pcie20"; 169*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 170*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 171*4882a593Smuzhiyun enable-active-high; 172*4882a593Smuzhiyun gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 173*4882a593Smuzhiyun startup-delay-us = <5000>; 174*4882a593Smuzhiyun vin-supply = <&vcc12v_dcin>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { 178*4882a593Smuzhiyun compatible = "regulator-fixed"; 179*4882a593Smuzhiyun gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 180*4882a593Smuzhiyun pinctrl-names = "default"; 181*4882a593Smuzhiyun pinctrl-0 = <&sd_s0_pwr>; 182*4882a593Smuzhiyun regulator-name = "vcc_3v3_sd_s0"; 183*4882a593Smuzhiyun enable-active-high; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host { 187*4882a593Smuzhiyun compatible = "regulator-fixed"; 188*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 189*4882a593Smuzhiyun regulator-boot-on; 190*4882a593Smuzhiyun regulator-always-on; 191*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 193*4882a593Smuzhiyun enable-active-high; 194*4882a593Smuzhiyun gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; 195*4882a593Smuzhiyun vin-supply = <&vcc5v0_usb>; 196*4882a593Smuzhiyun pinctrl-names = "default"; 197*4882a593Smuzhiyun pinctrl-0 = <&vcc5v0_host_en>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun wireless_bluetooth: wireless-bluetooth { 201*4882a593Smuzhiyun compatible = "bluetooth-platdata"; 202*4882a593Smuzhiyun clocks = <&hym8563>; 203*4882a593Smuzhiyun clock-names = "ext_clock"; 204*4882a593Smuzhiyun uart_rts_gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; 205*4882a593Smuzhiyun pinctrl-names = "default", "rts_gpio"; 206*4882a593Smuzhiyun pinctrl-0 = <&uart8m1_rtsn>, <&bt_gpio>; 207*4882a593Smuzhiyun pinctrl-1 = <&uart8_gpios>; 208*4882a593Smuzhiyun BT,reset_gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 209*4882a593Smuzhiyun BT,wake_gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; 210*4882a593Smuzhiyun BT,wake_host_irq = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; 211*4882a593Smuzhiyun status = "okay"; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun wireless_wlan: wireless-wlan { 215*4882a593Smuzhiyun compatible = "wlan-platdata"; 216*4882a593Smuzhiyun wifi_chip_type = "ap6275p"; 217*4882a593Smuzhiyun pinctrl-names = "default"; 218*4882a593Smuzhiyun pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>; 219*4882a593Smuzhiyun WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 220*4882a593Smuzhiyun WIFI,poweren_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 221*4882a593Smuzhiyun status = "okay"; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun}; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun&backlight { 226*4882a593Smuzhiyun pwms = <&pwm12 0 25000 0>; 227*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd_edp>; 228*4882a593Smuzhiyun status = "okay"; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&combphy0_ps { 232*4882a593Smuzhiyun status = "okay"; 233*4882a593Smuzhiyun}; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun&dp0 { 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun}; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun&dp0_in_vp1 { 240*4882a593Smuzhiyun status = "okay"; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&dp0_sound{ 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&edp0 { 248*4882a593Smuzhiyun force-hpd; 249*4882a593Smuzhiyun status = "okay"; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun ports { 252*4882a593Smuzhiyun port@1 { 253*4882a593Smuzhiyun reg = <1>; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun edp_out_panel: endpoint { 256*4882a593Smuzhiyun remote-endpoint = <&panel_in_edp>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun&edp0_in_vp2 { 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun&hdptxphy0 { 267*4882a593Smuzhiyun /* Single Vdiff Training Table for power reduction (optional) */ 268*4882a593Smuzhiyun training-table = /bits/ 8 < 269*4882a593Smuzhiyun /* voltage swing 0, pre-emphasis 0->3 */ 270*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 271*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 272*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 273*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 274*4882a593Smuzhiyun /* voltage swing 1, pre-emphasis 0->2 */ 275*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 276*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 277*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 278*4882a593Smuzhiyun /* voltage swing 2, pre-emphasis 0->1 */ 279*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 280*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 281*4882a593Smuzhiyun /* voltage swing 3, pre-emphasis 0 */ 282*4882a593Smuzhiyun 0x0d 0x00 0x00 0x00 0x00 0x00 283*4882a593Smuzhiyun >; 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun}; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun&i2c0 { 288*4882a593Smuzhiyun status = "okay"; 289*4882a593Smuzhiyun pinctrl-names = "default"; 290*4882a593Smuzhiyun pinctrl-0 = <&i2c0m2_xfer>; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { 293*4882a593Smuzhiyun compatible = "rockchip,rk8602"; 294*4882a593Smuzhiyun reg = <0x42>; 295*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 296*4882a593Smuzhiyun regulator-compatible = "rk860x-reg"; 297*4882a593Smuzhiyun regulator-name = "vdd_cpu_big0_s0"; 298*4882a593Smuzhiyun regulator-min-microvolt = <550000>; 299*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 300*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 301*4882a593Smuzhiyun rockchip,suspend-voltage-selector = <1>; 302*4882a593Smuzhiyun regulator-boot-on; 303*4882a593Smuzhiyun regulator-always-on; 304*4882a593Smuzhiyun regulator-state-mem { 305*4882a593Smuzhiyun regulator-off-in-suspend; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { 310*4882a593Smuzhiyun compatible = "rockchip,rk8603"; 311*4882a593Smuzhiyun reg = <0x43>; 312*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 313*4882a593Smuzhiyun regulator-compatible = "rk860x-reg"; 314*4882a593Smuzhiyun regulator-name = "vdd_cpu_big1_s0"; 315*4882a593Smuzhiyun regulator-min-microvolt = <550000>; 316*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 317*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 318*4882a593Smuzhiyun rockchip,suspend-voltage-selector = <1>; 319*4882a593Smuzhiyun regulator-boot-on; 320*4882a593Smuzhiyun regulator-always-on; 321*4882a593Smuzhiyun regulator-state-mem { 322*4882a593Smuzhiyun regulator-off-in-suspend; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun}; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun&i2c2 { 328*4882a593Smuzhiyun status = "okay"; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { 331*4882a593Smuzhiyun compatible = "rockchip,rk8602"; 332*4882a593Smuzhiyun reg = <0x42>; 333*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 334*4882a593Smuzhiyun regulator-compatible = "rk860x-reg"; 335*4882a593Smuzhiyun regulator-name = "vdd_npu_s0"; 336*4882a593Smuzhiyun regulator-min-microvolt = <550000>; 337*4882a593Smuzhiyun regulator-max-microvolt = <950000>; 338*4882a593Smuzhiyun regulator-ramp-delay = <2300>; 339*4882a593Smuzhiyun rockchip,suspend-voltage-selector = <1>; 340*4882a593Smuzhiyun regulator-boot-on; 341*4882a593Smuzhiyun regulator-always-on; 342*4882a593Smuzhiyun regulator-state-mem { 343*4882a593Smuzhiyun regulator-off-in-suspend; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun}; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun&i2c3 { 349*4882a593Smuzhiyun status = "okay"; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun es8388: es8388@11 { 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun #sound-dai-cells = <0>; 354*4882a593Smuzhiyun compatible = "everest,es8388", "everest,es8323"; 355*4882a593Smuzhiyun reg = <0x11>; 356*4882a593Smuzhiyun clocks = <&mclkout_i2s0>; 357*4882a593Smuzhiyun clock-names = "mclk"; 358*4882a593Smuzhiyun assigned-clocks = <&mclkout_i2s0>; 359*4882a593Smuzhiyun assigned-clock-rates = <12288000>; 360*4882a593Smuzhiyun pinctrl-names = "default"; 361*4882a593Smuzhiyun pinctrl-0 = <&i2s0_mclk>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun es7202: es7202@32 { 365*4882a593Smuzhiyun status = "okay"; 366*4882a593Smuzhiyun #sound-dai-cells = <0>; 367*4882a593Smuzhiyun compatible = "ES7202_PDM_ADC_1"; 368*4882a593Smuzhiyun power-supply = <&vcc_1v8_s0>; /* only 1v8 or 3v3, default is 3v3 */ 369*4882a593Smuzhiyun reg = <0x32>; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun}; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun&i2c4 { 374*4882a593Smuzhiyun pinctrl-names = "default"; 375*4882a593Smuzhiyun pinctrl-0 = <&i2c4m3_xfer>; 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun gsl3673@40 { 379*4882a593Smuzhiyun compatible = "GSL,GSL3673"; 380*4882a593Smuzhiyun reg = <0x40>; 381*4882a593Smuzhiyun screen_max_x = <1536>; 382*4882a593Smuzhiyun screen_max_y = <2048>; 383*4882a593Smuzhiyun irq_gpio_number = <&gpio1 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 384*4882a593Smuzhiyun rst_gpio_number = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun}; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun&i2c5 { 389*4882a593Smuzhiyun status = "okay"; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun ls_stk3332: light@47 { 392*4882a593Smuzhiyun compatible = "ls_stk3332"; 393*4882a593Smuzhiyun status = "disabled"; 394*4882a593Smuzhiyun reg = <0x47>; 395*4882a593Smuzhiyun type = <SENSOR_TYPE_LIGHT>; 396*4882a593Smuzhiyun irq_enable = <0>; 397*4882a593Smuzhiyun als_threshold_high = <100>; 398*4882a593Smuzhiyun als_threshold_low = <10>; 399*4882a593Smuzhiyun als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */ 400*4882a593Smuzhiyun poll_delay_ms = <100>; 401*4882a593Smuzhiyun }; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun ps_stk3332: proximity@47 { 404*4882a593Smuzhiyun compatible = "ps_stk3332"; 405*4882a593Smuzhiyun status = "disabled"; 406*4882a593Smuzhiyun reg = <0x47>; 407*4882a593Smuzhiyun type = <SENSOR_TYPE_PROXIMITY>; 408*4882a593Smuzhiyun //pinctrl-names = "default"; 409*4882a593Smuzhiyun //pinctrl-0 = <&gpio3_c6>; 410*4882a593Smuzhiyun //irq-gpio = <&gpio3 RK_PC6 IRQ_TYPE_LEVEL_LOW>; 411*4882a593Smuzhiyun //irq_enable = <1>; 412*4882a593Smuzhiyun ps_threshold_high = <0x200>; 413*4882a593Smuzhiyun ps_threshold_low = <0x100>; 414*4882a593Smuzhiyun ps_ctrl_gain = <3>; /* 0:x1 1:x2 2:x5 3:x8 */ 415*4882a593Smuzhiyun ps_led_current = <4>; /* 0:3.125mA 1:6.25mA 2:12.5mA 3:25mA 4:50mA 5:100mA*/ 416*4882a593Smuzhiyun poll_delay_ms = <100>; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun mpu6500_acc: mpu_acc@68 { 420*4882a593Smuzhiyun compatible = "mpu6500_acc"; 421*4882a593Smuzhiyun reg = <0x68>; 422*4882a593Smuzhiyun irq-gpio = <&gpio3 RK_PB4 IRQ_TYPE_EDGE_RISING>; 423*4882a593Smuzhiyun irq_enable = <0>; 424*4882a593Smuzhiyun poll_delay_ms = <30>; 425*4882a593Smuzhiyun type = <SENSOR_TYPE_ACCEL>; 426*4882a593Smuzhiyun layout = <5>; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun mpu6500_gyro: mpu_gyro@68 { 430*4882a593Smuzhiyun compatible = "mpu6500_gyro"; 431*4882a593Smuzhiyun reg = <0x68>; 432*4882a593Smuzhiyun poll_delay_ms = <30>; 433*4882a593Smuzhiyun type = <SENSOR_TYPE_GYROSCOPE>; 434*4882a593Smuzhiyun layout = <5>; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun}; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun&i2c8 { 439*4882a593Smuzhiyun status = "okay"; 440*4882a593Smuzhiyun pinctrl-names = "default"; 441*4882a593Smuzhiyun pinctrl-0 = <&i2c8m2_xfer>; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun usbc0: fusb302@22 { 444*4882a593Smuzhiyun compatible = "fcs,fusb302"; 445*4882a593Smuzhiyun reg = <0x22>; 446*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 447*4882a593Smuzhiyun interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; 448*4882a593Smuzhiyun pinctrl-names = "default"; 449*4882a593Smuzhiyun pinctrl-0 = <&usbc0_int>; 450*4882a593Smuzhiyun vbus-supply = <&vbus5v0_typec>; 451*4882a593Smuzhiyun status = "okay"; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun ports { 454*4882a593Smuzhiyun #address-cells = <1>; 455*4882a593Smuzhiyun #size-cells = <0>; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun port@0 { 458*4882a593Smuzhiyun reg = <0>; 459*4882a593Smuzhiyun usbc0_role_sw: endpoint@0 { 460*4882a593Smuzhiyun remote-endpoint = <&dwc3_0_role_switch>; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun usb_con: connector { 466*4882a593Smuzhiyun compatible = "usb-c-connector"; 467*4882a593Smuzhiyun label = "USB-C"; 468*4882a593Smuzhiyun data-role = "dual"; 469*4882a593Smuzhiyun power-role = "dual"; 470*4882a593Smuzhiyun try-power-role = "sink"; 471*4882a593Smuzhiyun op-sink-microwatt = <1000000>; 472*4882a593Smuzhiyun sink-pdos = 473*4882a593Smuzhiyun <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>; 474*4882a593Smuzhiyun source-pdos = 475*4882a593Smuzhiyun <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun altmodes { 478*4882a593Smuzhiyun #address-cells = <1>; 479*4882a593Smuzhiyun #size-cells = <0>; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun altmode@0 { 482*4882a593Smuzhiyun reg = <0>; 483*4882a593Smuzhiyun svid = <0xff01>; 484*4882a593Smuzhiyun vdo = <0xffffffff>; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun ports { 489*4882a593Smuzhiyun #address-cells = <1>; 490*4882a593Smuzhiyun #size-cells = <0>; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun port@0 { 493*4882a593Smuzhiyun reg = <0>; 494*4882a593Smuzhiyun usbc0_orien_sw: endpoint { 495*4882a593Smuzhiyun remote-endpoint = <&usbdp_phy0_orientation_switch>; 496*4882a593Smuzhiyun }; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun port@1 { 500*4882a593Smuzhiyun reg = <1>; 501*4882a593Smuzhiyun dp_altmode_mux: endpoint { 502*4882a593Smuzhiyun remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun }; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun }; 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun hym8563: hym8563@51 { 510*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 511*4882a593Smuzhiyun reg = <0x51>; 512*4882a593Smuzhiyun #clock-cells = <0>; 513*4882a593Smuzhiyun clock-frequency = <32768>; 514*4882a593Smuzhiyun clock-output-names = "hym8563"; 515*4882a593Smuzhiyun pinctrl-names = "default"; 516*4882a593Smuzhiyun pinctrl-0 = <&hym8563_int>; 517*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 518*4882a593Smuzhiyun interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 519*4882a593Smuzhiyun wakeup-source; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun}; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun&pcie2x1l1 { 524*4882a593Smuzhiyun reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 525*4882a593Smuzhiyun vpcie3v3-supply = <&vcc3v3_pcie20>; 526*4882a593Smuzhiyun status = "okay"; 527*4882a593Smuzhiyun}; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun&pcie2x1l2 { 530*4882a593Smuzhiyun reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>; 531*4882a593Smuzhiyun rockchip,skip-scan-in-resume; 532*4882a593Smuzhiyun status = "okay"; 533*4882a593Smuzhiyun}; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun&pdm0 { 536*4882a593Smuzhiyun status = "okay"; 537*4882a593Smuzhiyun}; 538*4882a593Smuzhiyun 539*4882a593Smuzhiyun&pinctrl { 540*4882a593Smuzhiyun headphone { 541*4882a593Smuzhiyun hp_det: hp-det { 542*4882a593Smuzhiyun rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun hym8563 { 547*4882a593Smuzhiyun hym8563_int: hym8563-int { 548*4882a593Smuzhiyun rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 549*4882a593Smuzhiyun }; 550*4882a593Smuzhiyun }; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun lcd { 553*4882a593Smuzhiyun lcd_rst_gpio: lcd-rst-gpio { 554*4882a593Smuzhiyun rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun sdmmc { 559*4882a593Smuzhiyun sd_s0_pwr: sd-s0-pwr { 560*4882a593Smuzhiyun rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun }; 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun sensor { 565*4882a593Smuzhiyun mpu6500_irq_gpio: mpu6500_irq_gpio { 566*4882a593Smuzhiyun rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 567*4882a593Smuzhiyun }; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun usb { 571*4882a593Smuzhiyun vcc5v0_host_en: vcc5v0-host-en { 572*4882a593Smuzhiyun rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun usb-typec { 577*4882a593Smuzhiyun usbc0_int: usbc0-int { 578*4882a593Smuzhiyun rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 579*4882a593Smuzhiyun }; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun typec5v_pwren: typec5v-pwren { 582*4882a593Smuzhiyun rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun }; 585*4882a593Smuzhiyun 586*4882a593Smuzhiyun wireless-bluetooth { 587*4882a593Smuzhiyun uart8_gpios: uart8-gpios { 588*4882a593Smuzhiyun rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 589*4882a593Smuzhiyun }; 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun bt_gpio: bt-gpio { 592*4882a593Smuzhiyun rockchip,pins = 593*4882a593Smuzhiyun <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, 594*4882a593Smuzhiyun <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, 595*4882a593Smuzhiyun <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 596*4882a593Smuzhiyun }; 597*4882a593Smuzhiyun }; 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun wireless-wlan { 600*4882a593Smuzhiyun wifi_host_wake_irq: wifi-host-wake-irq { 601*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 602*4882a593Smuzhiyun }; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun wifi_poweren_gpio: wifi-poweren-gpio { 605*4882a593Smuzhiyun rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 606*4882a593Smuzhiyun }; 607*4882a593Smuzhiyun }; 608*4882a593Smuzhiyun}; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun&pwm3 { 611*4882a593Smuzhiyun compatible = "rockchip,remotectl-pwm"; 612*4882a593Smuzhiyun remote_pwm_id = <3>; 613*4882a593Smuzhiyun handle_cpu_id = <1>; 614*4882a593Smuzhiyun remote_support_psci = <0>; 615*4882a593Smuzhiyun status = "okay"; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun ir_key1 { 618*4882a593Smuzhiyun rockchip,usercode = <0x4040>; 619*4882a593Smuzhiyun rockchip,key_table = 620*4882a593Smuzhiyun <0xf2 KEY_REPLY>, 621*4882a593Smuzhiyun <0xba KEY_BACK>, 622*4882a593Smuzhiyun <0xf4 KEY_UP>, 623*4882a593Smuzhiyun <0xf1 KEY_DOWN>, 624*4882a593Smuzhiyun <0xef KEY_LEFT>, 625*4882a593Smuzhiyun <0xee KEY_RIGHT>, 626*4882a593Smuzhiyun <0xbd KEY_HOME>, 627*4882a593Smuzhiyun <0xea KEY_VOLUMEUP>, 628*4882a593Smuzhiyun <0xe3 KEY_VOLUMEDOWN>, 629*4882a593Smuzhiyun <0xe2 KEY_SEARCH>, 630*4882a593Smuzhiyun <0xb2 KEY_POWER>, 631*4882a593Smuzhiyun <0xbc KEY_MUTE>, 632*4882a593Smuzhiyun <0xec KEY_MENU>, 633*4882a593Smuzhiyun <0xbf 0x190>, 634*4882a593Smuzhiyun <0xe0 0x191>, 635*4882a593Smuzhiyun <0xe1 0x192>, 636*4882a593Smuzhiyun <0xe9 183>, 637*4882a593Smuzhiyun <0xe6 248>, 638*4882a593Smuzhiyun <0xe8 185>, 639*4882a593Smuzhiyun <0xe7 186>, 640*4882a593Smuzhiyun <0xf0 388>, 641*4882a593Smuzhiyun <0xbe 0x175>; 642*4882a593Smuzhiyun }; 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun ir_key2 { 645*4882a593Smuzhiyun rockchip,usercode = <0xff00>; 646*4882a593Smuzhiyun rockchip,key_table = 647*4882a593Smuzhiyun <0xf9 KEY_HOME>, 648*4882a593Smuzhiyun <0xbf KEY_BACK>, 649*4882a593Smuzhiyun <0xfb KEY_MENU>, 650*4882a593Smuzhiyun <0xaa KEY_REPLY>, 651*4882a593Smuzhiyun <0xb9 KEY_UP>, 652*4882a593Smuzhiyun <0xe9 KEY_DOWN>, 653*4882a593Smuzhiyun <0xb8 KEY_LEFT>, 654*4882a593Smuzhiyun <0xea KEY_RIGHT>, 655*4882a593Smuzhiyun <0xeb KEY_VOLUMEDOWN>, 656*4882a593Smuzhiyun <0xef KEY_VOLUMEUP>, 657*4882a593Smuzhiyun <0xf7 KEY_MUTE>, 658*4882a593Smuzhiyun <0xe7 KEY_POWER>, 659*4882a593Smuzhiyun <0xfc KEY_POWER>, 660*4882a593Smuzhiyun <0xa9 KEY_VOLUMEDOWN>, 661*4882a593Smuzhiyun <0xa8 KEY_PLAYPAUSE>, 662*4882a593Smuzhiyun <0xe0 KEY_VOLUMEDOWN>, 663*4882a593Smuzhiyun <0xa5 KEY_VOLUMEDOWN>, 664*4882a593Smuzhiyun <0xab 183>, 665*4882a593Smuzhiyun <0xb7 388>, 666*4882a593Smuzhiyun <0xe8 388>, 667*4882a593Smuzhiyun <0xf8 184>, 668*4882a593Smuzhiyun <0xaf 185>, 669*4882a593Smuzhiyun <0xed KEY_VOLUMEDOWN>, 670*4882a593Smuzhiyun <0xee 186>, 671*4882a593Smuzhiyun <0xb3 KEY_VOLUMEDOWN>, 672*4882a593Smuzhiyun <0xf1 KEY_VOLUMEDOWN>, 673*4882a593Smuzhiyun <0xf2 KEY_VOLUMEDOWN>, 674*4882a593Smuzhiyun <0xf3 KEY_SEARCH>, 675*4882a593Smuzhiyun <0xb4 KEY_VOLUMEDOWN>, 676*4882a593Smuzhiyun <0xa4 KEY_SETUP>, 677*4882a593Smuzhiyun <0xbe KEY_SEARCH>; 678*4882a593Smuzhiyun }; 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun ir_key3 { 681*4882a593Smuzhiyun rockchip,usercode = <0x1dcc>; 682*4882a593Smuzhiyun rockchip,key_table = 683*4882a593Smuzhiyun <0xee KEY_REPLY>, 684*4882a593Smuzhiyun <0xf0 KEY_BACK>, 685*4882a593Smuzhiyun <0xf8 KEY_UP>, 686*4882a593Smuzhiyun <0xbb KEY_DOWN>, 687*4882a593Smuzhiyun <0xef KEY_LEFT>, 688*4882a593Smuzhiyun <0xed KEY_RIGHT>, 689*4882a593Smuzhiyun <0xfc KEY_HOME>, 690*4882a593Smuzhiyun <0xf1 KEY_VOLUMEUP>, 691*4882a593Smuzhiyun <0xfd KEY_VOLUMEDOWN>, 692*4882a593Smuzhiyun <0xb7 KEY_SEARCH>, 693*4882a593Smuzhiyun <0xff KEY_POWER>, 694*4882a593Smuzhiyun <0xf3 KEY_MUTE>, 695*4882a593Smuzhiyun <0xbf KEY_MENU>, 696*4882a593Smuzhiyun <0xf9 0x191>, 697*4882a593Smuzhiyun <0xf5 0x192>, 698*4882a593Smuzhiyun <0xb3 388>, 699*4882a593Smuzhiyun <0xbe KEY_1>, 700*4882a593Smuzhiyun <0xba KEY_2>, 701*4882a593Smuzhiyun <0xb2 KEY_3>, 702*4882a593Smuzhiyun <0xbd KEY_4>, 703*4882a593Smuzhiyun <0xf9 KEY_5>, 704*4882a593Smuzhiyun <0xb1 KEY_6>, 705*4882a593Smuzhiyun <0xfc KEY_7>, 706*4882a593Smuzhiyun <0xf8 KEY_8>, 707*4882a593Smuzhiyun <0xb0 KEY_9>, 708*4882a593Smuzhiyun <0xb6 KEY_0>, 709*4882a593Smuzhiyun <0xb5 KEY_BACKSPACE>; 710*4882a593Smuzhiyun }; 711*4882a593Smuzhiyun}; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun&pwm11 { 714*4882a593Smuzhiyun pinctrl-0 = <&pwm11m1_pins>; 715*4882a593Smuzhiyun status = "okay"; 716*4882a593Smuzhiyun}; 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun&pwm12 { 719*4882a593Smuzhiyun pinctrl-0 = <&pwm12m1_pins>; 720*4882a593Smuzhiyun status = "okay"; 721*4882a593Smuzhiyun}; 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun&route_edp0 { 724*4882a593Smuzhiyun connect = <&vp2_out_edp0>; 725*4882a593Smuzhiyun status = "okay"; 726*4882a593Smuzhiyun}; 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun&sdmmc { 729*4882a593Smuzhiyun status = "okay"; 730*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3_sd_s0>; 731*4882a593Smuzhiyun}; 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun&spdif_tx1 { 734*4882a593Smuzhiyun status = "disabled"; 735*4882a593Smuzhiyun pinctrl-names = "default"; 736*4882a593Smuzhiyun pinctrl-0 = <&spdif1m1_tx>; 737*4882a593Smuzhiyun}; 738*4882a593Smuzhiyun 739*4882a593Smuzhiyun&spdif_tx1_dc { 740*4882a593Smuzhiyun status = "okay"; 741*4882a593Smuzhiyun}; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun&spdif_tx1_sound { 744*4882a593Smuzhiyun status = "okay"; 745*4882a593Smuzhiyun}; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun&spdif_tx2 { 748*4882a593Smuzhiyun status = "okay"; 749*4882a593Smuzhiyun}; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun&u2phy0_otg { 752*4882a593Smuzhiyun rockchip,typec-vbus-det; 753*4882a593Smuzhiyun}; 754*4882a593Smuzhiyun 755*4882a593Smuzhiyun&u2phy2_host { 756*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 757*4882a593Smuzhiyun}; 758*4882a593Smuzhiyun 759*4882a593Smuzhiyun&u2phy3_host { 760*4882a593Smuzhiyun phy-supply = <&vcc5v0_host>; 761*4882a593Smuzhiyun}; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun&uart8 { 764*4882a593Smuzhiyun status = "okay"; 765*4882a593Smuzhiyun pinctrl-names = "default"; 766*4882a593Smuzhiyun pinctrl-0 = <&uart8m1_xfer &uart8m1_ctsn>; 767*4882a593Smuzhiyun}; 768*4882a593Smuzhiyun 769*4882a593Smuzhiyun&usbdp_phy0 { 770*4882a593Smuzhiyun orientation-switch; 771*4882a593Smuzhiyun svid = <0xff01>; 772*4882a593Smuzhiyun sbu1-dc-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 773*4882a593Smuzhiyun sbu2-dc-gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>; 774*4882a593Smuzhiyun 775*4882a593Smuzhiyun port { 776*4882a593Smuzhiyun #address-cells = <1>; 777*4882a593Smuzhiyun #size-cells = <0>; 778*4882a593Smuzhiyun usbdp_phy0_orientation_switch: endpoint@0 { 779*4882a593Smuzhiyun reg = <0>; 780*4882a593Smuzhiyun remote-endpoint = <&usbc0_orien_sw>; 781*4882a593Smuzhiyun }; 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun usbdp_phy0_dp_altmode_mux: endpoint@1 { 784*4882a593Smuzhiyun reg = <1>; 785*4882a593Smuzhiyun remote-endpoint = <&dp_altmode_mux>; 786*4882a593Smuzhiyun }; 787*4882a593Smuzhiyun }; 788*4882a593Smuzhiyun}; 789*4882a593Smuzhiyun 790*4882a593Smuzhiyun&usbdrd_dwc3_0 { 791*4882a593Smuzhiyun usb-role-switch; 792*4882a593Smuzhiyun port { 793*4882a593Smuzhiyun #address-cells = <1>; 794*4882a593Smuzhiyun #size-cells = <0>; 795*4882a593Smuzhiyun dwc3_0_role_switch: endpoint@0 { 796*4882a593Smuzhiyun reg = <0>; 797*4882a593Smuzhiyun remote-endpoint = <&usbc0_role_sw>; 798*4882a593Smuzhiyun }; 799*4882a593Smuzhiyun }; 800*4882a593Smuzhiyun}; 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun&usbhost3_0 { 803*4882a593Smuzhiyun status = "disabled"; 804*4882a593Smuzhiyun}; 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun&usbhost_dwc3_0 { 807*4882a593Smuzhiyun status = "disabled"; 808*4882a593Smuzhiyun}; 809*4882a593Smuzhiyun 810*4882a593Smuzhiyun/* vp0 & vp3 are not used on this board */ 811*4882a593Smuzhiyun&vp0 { 812*4882a593Smuzhiyun /delete-property/ rockchip,plane-mask; 813*4882a593Smuzhiyun /delete-property/ rockchip,primary-plane; 814*4882a593Smuzhiyun}; 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun&vp1 { 817*4882a593Smuzhiyun rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 818*4882a593Smuzhiyun 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; 819*4882a593Smuzhiyun rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>; 820*4882a593Smuzhiyun}; 821*4882a593Smuzhiyun 822*4882a593Smuzhiyun&vp2 { 823*4882a593Smuzhiyun rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2 | 824*4882a593Smuzhiyun 1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; 825*4882a593Smuzhiyun rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>; 826*4882a593Smuzhiyun}; 827*4882a593Smuzhiyun 828*4882a593Smuzhiyun&vp3 { 829*4882a593Smuzhiyun /delete-property/ rockchip,plane-mask; 830*4882a593Smuzhiyun /delete-property/ rockchip,primary-plane; 831*4882a593Smuzhiyun}; 832