1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h" 8*4882a593Smuzhiyun#include "rk3588s.dtsi" 9*4882a593Smuzhiyun#include "rk3588s-evb.dtsi" 10*4882a593Smuzhiyun#include "rk3588s-rk806-dual.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun combophy_avdd0v85: combophy-avdd0v85 { 14*4882a593Smuzhiyun compatible = "regulator-fixed"; 15*4882a593Smuzhiyun regulator-name = "combophy_avdd0v85"; 16*4882a593Smuzhiyun regulator-boot-on; 17*4882a593Smuzhiyun regulator-always-on; 18*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 19*4882a593Smuzhiyun regulator-max-microvolt = <850000>; 20*4882a593Smuzhiyun vin-supply = <&vdd_0v85_s0>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun combophy_avdd1v8: combophy-avdd1v8 { 24*4882a593Smuzhiyun compatible = "regulator-fixed"; 25*4882a593Smuzhiyun regulator-name = "combophy_avdd1v8"; 26*4882a593Smuzhiyun regulator-boot-on; 27*4882a593Smuzhiyun regulator-always-on; 28*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 29*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 30*4882a593Smuzhiyun vin-supply = <&avcc_1v8_s0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun fan: pwm-fan { 34*4882a593Smuzhiyun compatible = "pwm-fan"; 35*4882a593Smuzhiyun #cooling-cells = <2>; 36*4882a593Smuzhiyun pwms = <&pwm7 0 50000 0>; 37*4882a593Smuzhiyun cooling-levels = <0 50 100 150 200 255>; 38*4882a593Smuzhiyun rockchip,temp-trips = < 39*4882a593Smuzhiyun 50000 1 40*4882a593Smuzhiyun 55000 2 41*4882a593Smuzhiyun 60000 3 42*4882a593Smuzhiyun 65000 4 43*4882a593Smuzhiyun 70000 5 44*4882a593Smuzhiyun >; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun vcc3v3_lcd_n: vcc3v3-lcd0-n { 48*4882a593Smuzhiyun compatible = "regulator-fixed"; 49*4882a593Smuzhiyun regulator-name = "vcc3v3_lcd0_n"; 50*4882a593Smuzhiyun regulator-boot-on; 51*4882a593Smuzhiyun enable-active-high; 52*4882a593Smuzhiyun gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; 53*4882a593Smuzhiyun vin-supply = <&vcc_1v8_s0>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun vcc3v3_pcie20: vcc3v3-pcie20 { 57*4882a593Smuzhiyun compatible = "regulator-fixed"; 58*4882a593Smuzhiyun regulator-name = "vcc3v3_pcie20"; 59*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 60*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 61*4882a593Smuzhiyun enable-active-high; 62*4882a593Smuzhiyun gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 63*4882a593Smuzhiyun startup-delay-us = <5000>; 64*4882a593Smuzhiyun vin-supply = <&vcc12v_dcin>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun vbus5v0_typec: vbus5v0-typec { 68*4882a593Smuzhiyun compatible = "regulator-fixed"; 69*4882a593Smuzhiyun regulator-name = "vbus5v0_typec"; 70*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 71*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 72*4882a593Smuzhiyun enable-active-high; 73*4882a593Smuzhiyun gpio = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 74*4882a593Smuzhiyun vin-supply = <&vcc5v0_usb>; 75*4882a593Smuzhiyun pinctrl-names = "default"; 76*4882a593Smuzhiyun pinctrl-0 = <&typec5v_pwren>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun&combphy0_ps { 81*4882a593Smuzhiyun status = "okay"; 82*4882a593Smuzhiyun}; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun&dp0 { 85*4882a593Smuzhiyun status = "okay"; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&dp0_in_vp2 { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun}; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun/* 93*4882a593Smuzhiyun * mipi_dcphy0 needs to be enabled 94*4882a593Smuzhiyun * when dsi0 is enabled 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun&dsi0 { 97*4882a593Smuzhiyun status = "disabled"; 98*4882a593Smuzhiyun}; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun&dsi0_in_vp2 { 101*4882a593Smuzhiyun status = "disabled"; 102*4882a593Smuzhiyun}; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun&dsi0_in_vp3 { 105*4882a593Smuzhiyun status = "okay"; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun/* 109*4882a593Smuzhiyun * mipi_dcphy1 needs to be enabled 110*4882a593Smuzhiyun * when dsi1 is enabled 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun&dsi1 { 113*4882a593Smuzhiyun status = "disabled"; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&dsi1_in_vp2 { 117*4882a593Smuzhiyun status = "disabled"; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&dsi1_in_vp3 { 121*4882a593Smuzhiyun status = "disabled"; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&i2c2 { 125*4882a593Smuzhiyun status = "okay"; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun hym8563: hym8563@51 { 128*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 129*4882a593Smuzhiyun reg = <0x51>; 130*4882a593Smuzhiyun #clock-cells = <0>; 131*4882a593Smuzhiyun clock-frequency = <32768>; 132*4882a593Smuzhiyun clock-output-names = "hym8563"; 133*4882a593Smuzhiyun pinctrl-names = "default"; 134*4882a593Smuzhiyun pinctrl-0 = <&hym8563_int>; 135*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 136*4882a593Smuzhiyun interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 137*4882a593Smuzhiyun wakeup-source; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun&i2c4 { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun pinctrl-names = "default"; 144*4882a593Smuzhiyun pinctrl-0 = <&i2c4m3_xfer>; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun gt1x: gt1x@14 { 147*4882a593Smuzhiyun compatible = "goodix,gt1x"; 148*4882a593Smuzhiyun reg = <0x14>; 149*4882a593Smuzhiyun pinctrl-names = "default"; 150*4882a593Smuzhiyun pinctrl-0 = <&touch_gpio>; 151*4882a593Smuzhiyun goodix,rst-gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 152*4882a593Smuzhiyun goodix,irq-gpio = <&gpio1 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 153*4882a593Smuzhiyun power-supply = <&vcc3v3_lcd_n>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&i2c8 { 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun pinctrl-names = "default"; 160*4882a593Smuzhiyun pinctrl-0 = <&i2c8m2_xfer>; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun usbc0: fusb302@22 { 163*4882a593Smuzhiyun compatible = "fcs,fusb302"; 164*4882a593Smuzhiyun reg = <0x22>; 165*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 166*4882a593Smuzhiyun interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 167*4882a593Smuzhiyun pinctrl-names = "default"; 168*4882a593Smuzhiyun pinctrl-0 = <&usbc0_int>; 169*4882a593Smuzhiyun vbus-supply = <&vbus5v0_typec>; 170*4882a593Smuzhiyun status = "okay"; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun ports { 173*4882a593Smuzhiyun #address-cells = <1>; 174*4882a593Smuzhiyun #size-cells = <0>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun port@0 { 177*4882a593Smuzhiyun reg = <0>; 178*4882a593Smuzhiyun usbc0_role_sw: endpoint@0 { 179*4882a593Smuzhiyun remote-endpoint = <&dwc3_0_role_switch>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun usb_con: connector { 185*4882a593Smuzhiyun compatible = "usb-c-connector"; 186*4882a593Smuzhiyun label = "USB-C"; 187*4882a593Smuzhiyun data-role = "dual"; 188*4882a593Smuzhiyun power-role = "dual"; 189*4882a593Smuzhiyun try-power-role = "sink"; 190*4882a593Smuzhiyun op-sink-microwatt = <1000000>; 191*4882a593Smuzhiyun sink-pdos = 192*4882a593Smuzhiyun <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>; 193*4882a593Smuzhiyun source-pdos = 194*4882a593Smuzhiyun <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun altmodes { 197*4882a593Smuzhiyun #address-cells = <1>; 198*4882a593Smuzhiyun #size-cells = <0>; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun altmode@0 { 201*4882a593Smuzhiyun reg = <0>; 202*4882a593Smuzhiyun svid = <0xff01>; 203*4882a593Smuzhiyun vdo = <0xffffffff>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun ports { 208*4882a593Smuzhiyun #address-cells = <1>; 209*4882a593Smuzhiyun #size-cells = <0>; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun port@0 { 212*4882a593Smuzhiyun reg = <0>; 213*4882a593Smuzhiyun usbc0_orien_sw: endpoint { 214*4882a593Smuzhiyun remote-endpoint = <&usbdp_phy0_orientation_switch>; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun port@1 { 219*4882a593Smuzhiyun reg = <1>; 220*4882a593Smuzhiyun dp_altmode_mux: endpoint { 221*4882a593Smuzhiyun remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&mipi_dcphy0 { 230*4882a593Smuzhiyun status = "disabled"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&mipi_dcphy1 { 234*4882a593Smuzhiyun status = "disabled"; 235*4882a593Smuzhiyun}; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun&pcie2x1l2 { 238*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 239*4882a593Smuzhiyun vpcie3v3-supply = <&vcc3v3_pcie20>; 240*4882a593Smuzhiyun status = "okay"; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&pinctrl { 244*4882a593Smuzhiyun hym8563 { 245*4882a593Smuzhiyun hym8563_int: hym8563-int { 246*4882a593Smuzhiyun rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun touch { 251*4882a593Smuzhiyun touch_gpio: touch-gpio { 252*4882a593Smuzhiyun rockchip,pins = 253*4882a593Smuzhiyun <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 254*4882a593Smuzhiyun <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun usb-typec { 259*4882a593Smuzhiyun usbc0_int: usbc0-int { 260*4882a593Smuzhiyun rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun typec5v_pwren: typec5v-pwren { 264*4882a593Smuzhiyun rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&pwm11 { 270*4882a593Smuzhiyun status = "okay"; 271*4882a593Smuzhiyun}; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun&route_dsi0 { 274*4882a593Smuzhiyun status = "okay"; 275*4882a593Smuzhiyun connect = <&vp3_out_dsi0>; 276*4882a593Smuzhiyun}; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun&route_dsi1 { 279*4882a593Smuzhiyun status = "disabled"; 280*4882a593Smuzhiyun connect = <&vp3_out_dsi1>; 281*4882a593Smuzhiyun}; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun&sdmmc { 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3_sd_s0>; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&sata2 { 289*4882a593Smuzhiyun status = "okay"; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&u2phy0_otg { 293*4882a593Smuzhiyun rockchip,typec-vbus-det; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&u2phy2 { 297*4882a593Smuzhiyun status = "disabled"; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun&u2phy3 { 301*4882a593Smuzhiyun status = "disabled"; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&u2phy2_host { 305*4882a593Smuzhiyun status = "disabled"; 306*4882a593Smuzhiyun}; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun&u2phy3_host { 309*4882a593Smuzhiyun status = "disabled"; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&usb_host0_ehci { 313*4882a593Smuzhiyun status = "disabled"; 314*4882a593Smuzhiyun}; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun&usb_host0_ohci { 317*4882a593Smuzhiyun status = "disabled"; 318*4882a593Smuzhiyun}; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun&usb_host1_ehci { 321*4882a593Smuzhiyun status = "disabled"; 322*4882a593Smuzhiyun}; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun&usb_host1_ohci { 325*4882a593Smuzhiyun status = "disabled"; 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun&usbdp_phy0 { 329*4882a593Smuzhiyun orientation-switch; 330*4882a593Smuzhiyun svid = <0xff01>; 331*4882a593Smuzhiyun sbu1-dc-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 332*4882a593Smuzhiyun sbu2-dc-gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun port { 335*4882a593Smuzhiyun #address-cells = <1>; 336*4882a593Smuzhiyun #size-cells = <0>; 337*4882a593Smuzhiyun usbdp_phy0_orientation_switch: endpoint@0 { 338*4882a593Smuzhiyun reg = <0>; 339*4882a593Smuzhiyun remote-endpoint = <&usbc0_orien_sw>; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun usbdp_phy0_dp_altmode_mux: endpoint@1 { 343*4882a593Smuzhiyun reg = <1>; 344*4882a593Smuzhiyun remote-endpoint = <&dp_altmode_mux>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun}; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun&usbdrd_dwc3_0 { 350*4882a593Smuzhiyun usb-role-switch; 351*4882a593Smuzhiyun port { 352*4882a593Smuzhiyun #address-cells = <1>; 353*4882a593Smuzhiyun #size-cells = <0>; 354*4882a593Smuzhiyun dwc3_0_role_switch: endpoint@0 { 355*4882a593Smuzhiyun reg = <0>; 356*4882a593Smuzhiyun remote-endpoint = <&usbc0_role_sw>; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun}; 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun&usbhost3_0 { 362*4882a593Smuzhiyun status = "disabled"; 363*4882a593Smuzhiyun}; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun&usbhost_dwc3_0 { 366*4882a593Smuzhiyun status = "disabled"; 367*4882a593Smuzhiyun}; 368