1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include <dt-bindings/input/rk-input.h> 11#include <dt-bindings/display/drm_mipi_dsi.h> 12#include <dt-bindings/display/rockchip_vop.h> 13#include <dt-bindings/sensor-dev.h> 14 15/ { 16 adc_keys: adc-keys { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 1>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1800000>; 21 poll-interval = <100>; 22 23 vol-up-key { 24 label = "volume up"; 25 linux,code = <KEY_VOLUMEUP>; 26 press-threshold-microvolt = <17821>; //17000 27 }; 28 29 vol-down-key { 30 label = "volume down"; 31 linux,code = <KEY_VOLUMEDOWN>; 32 press-threshold-microvolt = <415384>;//417000 33 }; 34 35 menu-key { 36 label = "menu"; 37 linux,code = <KEY_MENU>; 38 press-threshold-microvolt = <728574>;//890000 39 }; 40 41 }; 42 backlight: backlight { 43 compatible = "pwm-backlight"; 44 brightness-levels = < 45 0 20 20 21 21 22 22 23 46 23 24 24 25 25 26 26 27 47 27 28 28 29 29 30 30 31 48 31 32 32 33 33 34 34 35 49 35 36 36 37 37 38 38 39 50 40 41 42 43 44 45 46 47 51 48 49 50 51 52 53 54 55 52 56 57 58 59 60 61 62 63 53 64 65 66 67 68 69 70 71 54 72 73 74 75 76 77 78 79 55 80 81 82 83 84 85 86 87 56 88 89 90 91 92 93 94 95 57 96 97 98 99 100 101 102 103 58 104 105 106 107 108 109 110 111 59 112 113 114 115 116 117 118 119 60 120 121 122 123 124 125 126 127 61 128 129 130 131 132 133 134 135 62 136 137 138 139 140 141 142 143 63 144 145 146 147 148 149 150 151 64 152 153 154 155 156 157 158 159 65 160 161 162 163 164 165 166 167 66 168 169 170 171 172 173 174 175 67 176 177 178 179 180 181 182 183 68 184 185 186 187 188 189 190 191 69 192 193 194 195 196 197 198 199 70 200 201 202 203 204 205 206 207 71 208 209 210 211 212 213 214 215 72 216 217 218 219 220 221 222 223 73 224 225 226 227 228 229 230 231 74 232 233 234 235 236 237 238 239 75 240 241 242 243 244 245 246 247 76 248 249 250 251 252 253 254 255 77 >; 78 default-brightness-level = <200>; 79 }; 80 81 test-power { 82 status = "okay"; 83 }; 84 85 vcc12v_dcin: vcc12v-dcin { 86 compatible = "regulator-fixed"; 87 regulator-name = "vcc12v_dcin"; 88 regulator-always-on; 89 regulator-boot-on; 90 regulator-min-microvolt = <12000000>; 91 regulator-max-microvolt = <12000000>; 92 }; 93 94 vcc5v0_sys: vcc5v0-sys { 95 compatible = "regulator-fixed"; 96 regulator-name = "vcc5v0_sys"; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <5000000>; 100 regulator-max-microvolt = <5000000>; 101 vin-supply = <&vcc12v_dcin>; 102 }; 103 104 vcc5v0_usbdcin: vcc5v0-usbdcin { 105 compatible = "regulator-fixed"; 106 regulator-name = "vcc5v0_usbdcin"; 107 regulator-always-on; 108 regulator-boot-on; 109 regulator-min-microvolt = <5000000>; 110 regulator-max-microvolt = <5000000>; 111 vin-supply = <&vcc12v_dcin>; 112 }; 113 114 vcc5v0_usb: vcc5v0-usb { 115 compatible = "regulator-fixed"; 116 regulator-name = "vcc5v0_usb"; 117 regulator-always-on; 118 regulator-boot-on; 119 regulator-min-microvolt = <5000000>; 120 regulator-max-microvolt = <5000000>; 121 vin-supply = <&vcc5v0_usbdcin>; 122 }; 123}; 124 125&av1d_mmu { 126 status = "okay"; 127}; 128 129&cpu_l0 { 130 cpu-supply = <&vdd_cpu_lit_s0>; 131 mem-supply = <&vdd_cpu_lit_mem_s0>; 132}; 133 134&cpu_b0 { 135 cpu-supply = <&vdd_cpu_big0_s0>; 136 mem-supply = <&vdd_cpu_big0_mem_s0>; 137}; 138 139&cpu_b2 { 140 cpu-supply = <&vdd_cpu_big1_s0>; 141 mem-supply = <&vdd_cpu_big1_mem_s0>; 142}; 143 144&gpu { 145 mali-supply = <&vdd_gpu_s0>; 146 mem-supply = <&vdd_gpu_mem_s0>; 147 status = "okay"; 148}; 149 150&i2s0_8ch { 151 status = "okay"; 152 pinctrl-0 = <&i2s0_lrck 153 &i2s0_sclk 154 &i2s0_sdi0 155 &i2s0_sdo0>; 156}; 157 158&iep { 159 status = "okay"; 160}; 161 162&iep_mmu { 163 status = "okay"; 164}; 165 166&jpegd { 167 status = "okay"; 168}; 169 170&jpegd_mmu { 171 status = "okay"; 172}; 173 174&jpege_ccu { 175 status = "okay"; 176}; 177 178&jpege0 { 179 status = "okay"; 180}; 181 182&jpege0_mmu { 183 status = "okay"; 184}; 185 186&jpege1 { 187 status = "okay"; 188}; 189 190&jpege1_mmu { 191 status = "okay"; 192}; 193 194&jpege2 { 195 status = "okay"; 196}; 197 198&jpege2_mmu { 199 status = "okay"; 200}; 201 202&jpege3 { 203 status = "okay"; 204}; 205 206&jpege3_mmu { 207 status = "okay"; 208}; 209 210&mpp_srv { 211 status = "okay"; 212}; 213 214&rga3_core0 { 215 status = "okay"; 216}; 217 218&rga3_0_mmu { 219 status = "okay"; 220}; 221 222&rga3_core1 { 223 status = "okay"; 224}; 225 226&rga3_1_mmu { 227 status = "okay"; 228}; 229 230&rga2 { 231 status = "okay"; 232}; 233 234&rknpu { 235 rknpu-supply = <&vdd_npu_s0>; 236 mem-supply = <&vdd_npu_mem_s0>; 237 status = "okay"; 238}; 239 240&rknpu_mmu { 241 status = "okay"; 242}; 243 244&rkvdec_ccu { 245 status = "okay"; 246}; 247 248&rkvdec0 { 249 status = "okay"; 250}; 251 252&rkvdec0_mmu { 253 status = "okay"; 254}; 255 256&rkvdec1 { 257 status = "okay"; 258}; 259 260&rkvdec1_mmu { 261 status = "okay"; 262}; 263 264&rkvenc_ccu { 265 status = "okay"; 266}; 267 268&rkvenc0 { 269 status = "okay"; 270}; 271 272&rkvenc0_mmu { 273 status = "okay"; 274}; 275 276&rkvenc1 { 277 status = "okay"; 278}; 279 280&rkvenc1_mmu { 281 status = "okay"; 282}; 283 284&rockchip_suspend { 285 status = "okay"; 286 rockchip,sleep-debug-en = <1>; 287}; 288 289&saradc { 290 status = "okay"; 291 vref-supply = <&vcc_1v8_s0>; 292}; 293 294&sdhci { 295 bus-width = <8>; 296 no-sdio; 297 no-sd; 298 non-removable; 299 max-frequency = <200000000>; 300 mmc-hs400-1_8v; 301 mmc-hs400-enhanced-strobe; 302 status = "okay"; 303}; 304 305&sdmmc { 306 max-frequency = <150000000>; 307 no-sdio; 308 no-mmc; 309 bus-width = <4>; 310 cap-mmc-highspeed; 311 cap-sd-highspeed; 312 disable-wp; 313 sd-uhs-sdr104; 314 vqmmc-supply = <&vccio_sd_s0>; 315 status = "disabled"; 316}; 317 318&tsadc { 319 status = "okay"; 320}; 321 322&u2phy0 { 323 status = "okay"; 324}; 325 326&u2phy1 { 327 status = "okay"; 328}; 329 330&u2phy2 { 331 status = "okay"; 332}; 333 334&u2phy3 { 335 status = "okay"; 336}; 337 338&u2phy0_otg { 339 status = "okay"; 340}; 341 342&u2phy1_otg { 343 status = "okay"; 344}; 345 346&u2phy2_host { 347 status = "okay"; 348}; 349 350&u2phy3_host { 351 status = "okay"; 352}; 353 354&usb_host0_ehci { 355 status = "okay"; 356}; 357 358&usb_host0_ohci { 359 status = "okay"; 360}; 361 362&usb_host1_ehci { 363 status = "okay"; 364}; 365 366&usb_host1_ohci { 367 status = "okay"; 368}; 369 370&usbdp_phy0 { 371 status = "okay"; 372}; 373 374&usbdp_phy0_dp { 375 status = "okay"; 376}; 377 378&usbdp_phy0_u3 { 379 status = "okay"; 380}; 381 382&usbdp_phy1 { 383 status = "okay"; 384}; 385 386&usbdp_phy1_dp { 387 status = "okay"; 388}; 389 390&usbdp_phy1_u3 { 391 status = "okay"; 392}; 393 394&usbdrd3_0 { 395 status = "okay"; 396}; 397 398&usbdrd_dwc3_0 { 399 dr_mode = "otg"; 400 status = "okay"; 401}; 402 403&usbhost3_0 { 404 status = "okay"; 405}; 406 407&usbhost_dwc3_0 { 408 status = "okay"; 409}; 410 411&usbdrd3_1 { 412 status = "okay"; 413}; 414 415&usbdrd_dwc3_1 { 416 status = "okay"; 417}; 418 419&vdpu { 420 status = "okay"; 421}; 422 423&vdpu_mmu { 424 status = "okay"; 425}; 426 427&vepu { 428 status = "okay"; 429}; 430 431&vop { 432 status = "okay"; 433}; 434 435&vop_mmu { 436 status = "okay"; 437}; 438 439/* vp0 & vp1 splice for 8K output */ 440&vp0 { 441 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; 442 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>; 443}; 444 445&vp1 { 446 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; 447 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>; 448}; 449 450&vp2 { 451 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; 452 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>; 453}; 454 455&vp3 { 456 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; 457 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>; 458}; 459