xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-vehicle-v20.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
8*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
10*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h>
11*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
12*4882a593Smuzhiyun#include <dt-bindings/display/rockchip_vop.h>
13*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	adc_keys: adc-keys {
17*4882a593Smuzhiyun		compatible = "adc-keys";
18*4882a593Smuzhiyun		io-channels = <&saradc 1>;
19*4882a593Smuzhiyun		io-channel-names = "buttons";
20*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
21*4882a593Smuzhiyun		poll-interval = <100>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		vol-up-key {
24*4882a593Smuzhiyun			label = "volume up";
25*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
26*4882a593Smuzhiyun			press-threshold-microvolt = <17821>; //17000
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		vol-down-key {
30*4882a593Smuzhiyun			label = "volume down";
31*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
32*4882a593Smuzhiyun			press-threshold-microvolt = <415384>;//417000
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		menu-key {
36*4882a593Smuzhiyun			label = "menu";
37*4882a593Smuzhiyun			linux,code = <KEY_MENU>;
38*4882a593Smuzhiyun			press-threshold-microvolt = <728574>;//890000
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun	backlight: backlight {
43*4882a593Smuzhiyun		compatible = "pwm-backlight";
44*4882a593Smuzhiyun		brightness-levels = <
45*4882a593Smuzhiyun				0  20  20  21  21  22  22  23
46*4882a593Smuzhiyun				23  24  24  25  25  26  26  27
47*4882a593Smuzhiyun				27  28  28  29  29  30  30  31
48*4882a593Smuzhiyun				31  32  32  33  33  34  34  35
49*4882a593Smuzhiyun				35  36  36  37  37  38  38  39
50*4882a593Smuzhiyun				40  41  42  43  44  45  46  47
51*4882a593Smuzhiyun				48  49  50  51  52  53  54  55
52*4882a593Smuzhiyun				56  57  58  59  60  61  62  63
53*4882a593Smuzhiyun				64  65  66  67  68  69  70  71
54*4882a593Smuzhiyun				72  73  74  75  76  77  78  79
55*4882a593Smuzhiyun				80  81  82  83  84  85  86  87
56*4882a593Smuzhiyun				88  89  90  91  92  93  94  95
57*4882a593Smuzhiyun				96  97  98  99 100 101 102 103
58*4882a593Smuzhiyun				104 105 106 107 108 109 110 111
59*4882a593Smuzhiyun				112 113 114 115 116 117 118 119
60*4882a593Smuzhiyun				120 121 122 123 124 125 126 127
61*4882a593Smuzhiyun				128 129 130 131 132 133 134 135
62*4882a593Smuzhiyun				136 137 138 139 140 141 142 143
63*4882a593Smuzhiyun				144 145 146 147 148 149 150 151
64*4882a593Smuzhiyun				152 153 154 155 156 157 158 159
65*4882a593Smuzhiyun				160 161 162 163 164 165 166 167
66*4882a593Smuzhiyun				168 169 170 171 172 173 174 175
67*4882a593Smuzhiyun				176 177 178 179 180 181 182 183
68*4882a593Smuzhiyun				184 185 186 187 188 189 190 191
69*4882a593Smuzhiyun				192 193 194 195 196 197 198 199
70*4882a593Smuzhiyun				200 201 202 203 204 205 206 207
71*4882a593Smuzhiyun				208 209 210 211 212 213 214 215
72*4882a593Smuzhiyun				216 217 218 219 220 221 222 223
73*4882a593Smuzhiyun				224 225 226 227 228 229 230 231
74*4882a593Smuzhiyun				232 233 234 235 236 237 238 239
75*4882a593Smuzhiyun				240 241 242 243 244 245 246 247
76*4882a593Smuzhiyun				248 249 250 251 252 253 254 255
77*4882a593Smuzhiyun		>;
78*4882a593Smuzhiyun		default-brightness-level = <200>;
79*4882a593Smuzhiyun	};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	test-power {
82*4882a593Smuzhiyun		status = "okay";
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	vcc12v_dcin: vcc12v-dcin {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		regulator-name = "vcc12v_dcin";
88*4882a593Smuzhiyun		regulator-always-on;
89*4882a593Smuzhiyun		regulator-boot-on;
90*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
91*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	vcc5v0_sys: vcc5v0-sys {
95*4882a593Smuzhiyun		compatible = "regulator-fixed";
96*4882a593Smuzhiyun		regulator-name = "vcc5v0_sys";
97*4882a593Smuzhiyun		regulator-always-on;
98*4882a593Smuzhiyun		regulator-boot-on;
99*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
100*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
101*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	vcc5v0_usbdcin: vcc5v0-usbdcin {
105*4882a593Smuzhiyun		compatible = "regulator-fixed";
106*4882a593Smuzhiyun		regulator-name = "vcc5v0_usbdcin";
107*4882a593Smuzhiyun		regulator-always-on;
108*4882a593Smuzhiyun		regulator-boot-on;
109*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
110*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
111*4882a593Smuzhiyun		vin-supply = <&vcc12v_dcin>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	vcc5v0_usb: vcc5v0-usb {
115*4882a593Smuzhiyun		compatible = "regulator-fixed";
116*4882a593Smuzhiyun		regulator-name = "vcc5v0_usb";
117*4882a593Smuzhiyun		regulator-always-on;
118*4882a593Smuzhiyun		regulator-boot-on;
119*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
120*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
121*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usbdcin>;
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&av1d_mmu {
126*4882a593Smuzhiyun	status = "okay";
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun&cpu_l0 {
130*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_lit_s0>;
131*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_lit_mem_s0>;
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&cpu_b0 {
135*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_big0_s0>;
136*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_big0_mem_s0>;
137*4882a593Smuzhiyun};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun&cpu_b2 {
140*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu_big1_s0>;
141*4882a593Smuzhiyun	mem-supply = <&vdd_cpu_big1_mem_s0>;
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&gpu {
145*4882a593Smuzhiyun	mali-supply = <&vdd_gpu_s0>;
146*4882a593Smuzhiyun	mem-supply = <&vdd_gpu_mem_s0>;
147*4882a593Smuzhiyun	status = "okay";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&i2s0_8ch {
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun	pinctrl-0 = <&i2s0_lrck
153*4882a593Smuzhiyun		     &i2s0_sclk
154*4882a593Smuzhiyun		     &i2s0_sdi0
155*4882a593Smuzhiyun		     &i2s0_sdo0>;
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun&iep {
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&iep_mmu {
163*4882a593Smuzhiyun	status = "okay";
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&jpegd {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun&jpegd_mmu {
171*4882a593Smuzhiyun	status = "okay";
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&jpege_ccu {
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun&jpege0 {
179*4882a593Smuzhiyun	status = "okay";
180*4882a593Smuzhiyun};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun&jpege0_mmu {
183*4882a593Smuzhiyun	status = "okay";
184*4882a593Smuzhiyun};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun&jpege1 {
187*4882a593Smuzhiyun	status = "okay";
188*4882a593Smuzhiyun};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun&jpege1_mmu {
191*4882a593Smuzhiyun	status = "okay";
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&jpege2 {
195*4882a593Smuzhiyun	status = "okay";
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&jpege2_mmu {
199*4882a593Smuzhiyun	status = "okay";
200*4882a593Smuzhiyun};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun&jpege3 {
203*4882a593Smuzhiyun	status = "okay";
204*4882a593Smuzhiyun};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun&jpege3_mmu {
207*4882a593Smuzhiyun	status = "okay";
208*4882a593Smuzhiyun};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun&mpp_srv {
211*4882a593Smuzhiyun	status = "okay";
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun&rga3_core0 {
215*4882a593Smuzhiyun	status = "okay";
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&rga3_0_mmu {
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&rga3_core1 {
223*4882a593Smuzhiyun	status = "okay";
224*4882a593Smuzhiyun};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun&rga3_1_mmu {
227*4882a593Smuzhiyun	status = "okay";
228*4882a593Smuzhiyun};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun&rga2 {
231*4882a593Smuzhiyun	status = "okay";
232*4882a593Smuzhiyun};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun&rknpu {
235*4882a593Smuzhiyun	rknpu-supply = <&vdd_npu_s0>;
236*4882a593Smuzhiyun	mem-supply = <&vdd_npu_mem_s0>;
237*4882a593Smuzhiyun	status = "okay";
238*4882a593Smuzhiyun};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun&rknpu_mmu {
241*4882a593Smuzhiyun	status = "okay";
242*4882a593Smuzhiyun};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun&rkvdec_ccu {
245*4882a593Smuzhiyun	status = "okay";
246*4882a593Smuzhiyun};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun&rkvdec0 {
249*4882a593Smuzhiyun	status = "okay";
250*4882a593Smuzhiyun};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun&rkvdec0_mmu {
253*4882a593Smuzhiyun	status = "okay";
254*4882a593Smuzhiyun};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun&rkvdec1 {
257*4882a593Smuzhiyun	status = "okay";
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&rkvdec1_mmu {
261*4882a593Smuzhiyun	status = "okay";
262*4882a593Smuzhiyun};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun&rkvenc_ccu {
265*4882a593Smuzhiyun	status = "okay";
266*4882a593Smuzhiyun};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun&rkvenc0 {
269*4882a593Smuzhiyun	status = "okay";
270*4882a593Smuzhiyun};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun&rkvenc0_mmu {
273*4882a593Smuzhiyun	status = "okay";
274*4882a593Smuzhiyun};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun&rkvenc1 {
277*4882a593Smuzhiyun	status = "okay";
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&rkvenc1_mmu {
281*4882a593Smuzhiyun	status = "okay";
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&rockchip_suspend {
285*4882a593Smuzhiyun	status = "okay";
286*4882a593Smuzhiyun	rockchip,sleep-debug-en = <1>;
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&saradc {
290*4882a593Smuzhiyun	status = "okay";
291*4882a593Smuzhiyun	vref-supply = <&vcc_1v8_s0>;
292*4882a593Smuzhiyun};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun&sdhci {
295*4882a593Smuzhiyun	bus-width = <8>;
296*4882a593Smuzhiyun	no-sdio;
297*4882a593Smuzhiyun	no-sd;
298*4882a593Smuzhiyun	non-removable;
299*4882a593Smuzhiyun	max-frequency = <200000000>;
300*4882a593Smuzhiyun	mmc-hs400-1_8v;
301*4882a593Smuzhiyun	mmc-hs400-enhanced-strobe;
302*4882a593Smuzhiyun	status = "okay";
303*4882a593Smuzhiyun};
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun&sdmmc {
306*4882a593Smuzhiyun	max-frequency = <150000000>;
307*4882a593Smuzhiyun	no-sdio;
308*4882a593Smuzhiyun	no-mmc;
309*4882a593Smuzhiyun	bus-width = <4>;
310*4882a593Smuzhiyun	cap-mmc-highspeed;
311*4882a593Smuzhiyun	cap-sd-highspeed;
312*4882a593Smuzhiyun	disable-wp;
313*4882a593Smuzhiyun	sd-uhs-sdr104;
314*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd_s0>;
315*4882a593Smuzhiyun	status = "disabled";
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&tsadc {
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun&u2phy0 {
323*4882a593Smuzhiyun	status = "okay";
324*4882a593Smuzhiyun};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun&u2phy1 {
327*4882a593Smuzhiyun	status = "okay";
328*4882a593Smuzhiyun};
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun&u2phy2 {
331*4882a593Smuzhiyun	status = "okay";
332*4882a593Smuzhiyun};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun&u2phy3 {
335*4882a593Smuzhiyun	status = "okay";
336*4882a593Smuzhiyun};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun&u2phy0_otg {
339*4882a593Smuzhiyun	status = "okay";
340*4882a593Smuzhiyun};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun&u2phy1_otg {
343*4882a593Smuzhiyun	status = "okay";
344*4882a593Smuzhiyun};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun&u2phy2_host {
347*4882a593Smuzhiyun	status = "okay";
348*4882a593Smuzhiyun};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun&u2phy3_host {
351*4882a593Smuzhiyun	status = "okay";
352*4882a593Smuzhiyun};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun&usb_host0_ehci {
355*4882a593Smuzhiyun	status = "okay";
356*4882a593Smuzhiyun};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun&usb_host0_ohci {
359*4882a593Smuzhiyun	status = "okay";
360*4882a593Smuzhiyun};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun&usb_host1_ehci {
363*4882a593Smuzhiyun	status = "okay";
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&usb_host1_ohci {
367*4882a593Smuzhiyun	status = "okay";
368*4882a593Smuzhiyun};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun&usbdp_phy0 {
371*4882a593Smuzhiyun	status = "okay";
372*4882a593Smuzhiyun};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun&usbdp_phy0_dp {
375*4882a593Smuzhiyun	status = "okay";
376*4882a593Smuzhiyun};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun&usbdp_phy0_u3 {
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&usbdp_phy1 {
383*4882a593Smuzhiyun	status = "okay";
384*4882a593Smuzhiyun};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun&usbdp_phy1_dp {
387*4882a593Smuzhiyun	status = "okay";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&usbdp_phy1_u3 {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&usbdrd3_0 {
395*4882a593Smuzhiyun	status = "okay";
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&usbdrd_dwc3_0 {
399*4882a593Smuzhiyun	dr_mode = "otg";
400*4882a593Smuzhiyun	status = "okay";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&usbhost3_0 {
404*4882a593Smuzhiyun	status = "okay";
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&usbhost_dwc3_0 {
408*4882a593Smuzhiyun	status = "okay";
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&usbdrd3_1 {
412*4882a593Smuzhiyun	status = "okay";
413*4882a593Smuzhiyun};
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun&usbdrd_dwc3_1 {
416*4882a593Smuzhiyun	status = "okay";
417*4882a593Smuzhiyun};
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun&vdpu {
420*4882a593Smuzhiyun	status = "okay";
421*4882a593Smuzhiyun};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun&vdpu_mmu {
424*4882a593Smuzhiyun	status = "okay";
425*4882a593Smuzhiyun};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun&vepu {
428*4882a593Smuzhiyun	status = "okay";
429*4882a593Smuzhiyun};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun&vop {
432*4882a593Smuzhiyun	status = "okay";
433*4882a593Smuzhiyun};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun&vop_mmu {
436*4882a593Smuzhiyun	status = "okay";
437*4882a593Smuzhiyun};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun/* vp0 & vp1 splice for 8K output */
440*4882a593Smuzhiyun&vp0 {
441*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
442*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
443*4882a593Smuzhiyun};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun&vp1 {
446*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
447*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&vp2 {
451*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
452*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
453*4882a593Smuzhiyun};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun&vp3 {
456*4882a593Smuzhiyun	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
457*4882a593Smuzhiyun	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
458*4882a593Smuzhiyun};
459