1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun&csi2_dphy0_hw { 7*4882a593Smuzhiyun status = "okay"; 8*4882a593Smuzhiyun}; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&csi2_dphy0 { 11*4882a593Smuzhiyun status = "okay"; 12*4882a593Smuzhiyun ports { 13*4882a593Smuzhiyun #address-cells = <1>; 14*4882a593Smuzhiyun #size-cells = <0>; 15*4882a593Smuzhiyun port@0 { 16*4882a593Smuzhiyun reg = <0>; 17*4882a593Smuzhiyun #address-cells = <1>; 18*4882a593Smuzhiyun #size-cells = <0>; 19*4882a593Smuzhiyun mipi_in_ucam0: endpoint@1 { 20*4882a593Smuzhiyun reg = <1>; 21*4882a593Smuzhiyun remote-endpoint = <&ucam_out0>; 22*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun port@1 { 26*4882a593Smuzhiyun reg = <1>; 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun csidphy0_out: endpoint@0 { 30*4882a593Smuzhiyun reg = <0>; 31*4882a593Smuzhiyun remote-endpoint = <&mipi2_csi2_input>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun}; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun&i2c3 { 38*4882a593Smuzhiyun status = "okay"; 39*4882a593Smuzhiyun dw9714: dw9714@c { 40*4882a593Smuzhiyun compatible = "silicon touch,dw9714"; 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun reg = <0x0c>; 43*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 44*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 45*4882a593Smuzhiyun rockchip,vcm-start-current = <20>; 46*4882a593Smuzhiyun rockchip,vcm-rated-current = <120>; 47*4882a593Smuzhiyun rockchip,vcm-step-mode = <13>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun imx258_eeprom: imx258_eeprom@50 { 51*4882a593Smuzhiyun compatible = "otp,imx258_eeprom"; 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun reg = <0x50>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun imx258: imx258@10 { 57*4882a593Smuzhiyun compatible = "sony,imx258"; 58*4882a593Smuzhiyun reg = <0x10>; 59*4882a593Smuzhiyun clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; 60*4882a593Smuzhiyun clock-names = "xvclk"; 61*4882a593Smuzhiyun pinctrl-names = "default"; 62*4882a593Smuzhiyun pinctrl-0 = <&mipim0_camera3_clk>; 63*4882a593Smuzhiyun power-domains = <&power RK3588_PD_VI>; 64*4882a593Smuzhiyun avdd-supply = <&vcc_mipicsi0>; 65*4882a593Smuzhiyun pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; 66*4882a593Smuzhiyun reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; 67*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 68*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 69*4882a593Smuzhiyun rockchip,camera-module-name = "GEIR180089"; 70*4882a593Smuzhiyun rockchip,camera-module-lens-name = "LG500627G"; 71*4882a593Smuzhiyun eeprom-ctrl = <&imx258_eeprom>; 72*4882a593Smuzhiyun lens-focus = <&dw9714>; 73*4882a593Smuzhiyun port { 74*4882a593Smuzhiyun ucam_out0: endpoint { 75*4882a593Smuzhiyun remote-endpoint = <&mipi_in_ucam0>; 76*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun&mipi2_csi2 { 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun ports { 85*4882a593Smuzhiyun #address-cells = <1>; 86*4882a593Smuzhiyun #size-cells = <0>; 87*4882a593Smuzhiyun port@0 { 88*4882a593Smuzhiyun reg = <0>; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun mipi2_csi2_input: endpoint@1 { 92*4882a593Smuzhiyun reg = <1>; 93*4882a593Smuzhiyun remote-endpoint = <&csidphy0_out>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun port@1 { 97*4882a593Smuzhiyun reg = <1>; 98*4882a593Smuzhiyun #address-cells = <1>; 99*4882a593Smuzhiyun #size-cells = <0>; 100*4882a593Smuzhiyun mipi2_csi2_output: endpoint@0 { 101*4882a593Smuzhiyun reg = <0>; 102*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in2>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&rkcif { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&rkcif_mipi_lvds2 { 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun port { 115*4882a593Smuzhiyun cif_mipi_in2: endpoint { 116*4882a593Smuzhiyun remote-endpoint = <&mipi2_csi2_output>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&rkcif_mipi_lvds2_sditf { 122*4882a593Smuzhiyun status = "okay"; 123*4882a593Smuzhiyun port { 124*4882a593Smuzhiyun mipi_lvds_sditf: endpoint { 125*4882a593Smuzhiyun remote-endpoint = <&isp0_vir0>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&rkcif_mmu { 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun&rkisp0 { 135*4882a593Smuzhiyun status = "okay"; 136*4882a593Smuzhiyun}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun&isp0_mmu { 139*4882a593Smuzhiyun status = "okay"; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&rkisp0_vir0 { 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun port { 145*4882a593Smuzhiyun #address-cells = <1>; 146*4882a593Smuzhiyun #size-cells = <0>; 147*4882a593Smuzhiyun isp0_vir0: endpoint@0 { 148*4882a593Smuzhiyun reg = <0>; 149*4882a593Smuzhiyun remote-endpoint = <&mipi_lvds_sditf>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&csi2_dcphy0 { 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun ports { 157*4882a593Smuzhiyun #address-cells = <1>; 158*4882a593Smuzhiyun #size-cells = <0>; 159*4882a593Smuzhiyun port@0 { 160*4882a593Smuzhiyun reg = <0>; 161*4882a593Smuzhiyun #address-cells = <1>; 162*4882a593Smuzhiyun #size-cells = <0>; 163*4882a593Smuzhiyun mipi_in_1_ucam0: endpoint@1 { 164*4882a593Smuzhiyun reg = <1>; 165*4882a593Smuzhiyun remote-endpoint = <&imx258_1_out0>; 166*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun port@1 { 170*4882a593Smuzhiyun reg = <1>; 171*4882a593Smuzhiyun #address-cells = <1>; 172*4882a593Smuzhiyun #size-cells = <0>; 173*4882a593Smuzhiyun csidcphy0_out: endpoint@0 { 174*4882a593Smuzhiyun reg = <0>; 175*4882a593Smuzhiyun remote-endpoint = <&mipi0_csi2_input>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&i2c5 { 182*4882a593Smuzhiyun status = "okay"; 183*4882a593Smuzhiyun dw9714_1: dw9714_1@c { 184*4882a593Smuzhiyun compatible = "silicon touch,dw9714"; 185*4882a593Smuzhiyun status = "okay"; 186*4882a593Smuzhiyun reg = <0x0c>; 187*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 188*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 189*4882a593Smuzhiyun rockchip,vcm-start-current = <20>; 190*4882a593Smuzhiyun rockchip,vcm-rated-current = <120>; 191*4882a593Smuzhiyun rockchip,vcm-step-mode = <13>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun imx258_1_eeprom: imx258_1_eeprom@50 { 195*4882a593Smuzhiyun compatible = "otp,imx258_eeprom"; 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun reg = <0x50>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun imx258_1: imx258_1@1a { 201*4882a593Smuzhiyun compatible = "sony,imx258"; 202*4882a593Smuzhiyun reg = <0x1a>; 203*4882a593Smuzhiyun clocks = <&cru CLK_MIPI_CAMARAOUT_M1>; 204*4882a593Smuzhiyun clock-names = "xvclk"; 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun pinctrl-0 = <&mipim0_camera1_clk>; 207*4882a593Smuzhiyun power-domains = <&power RK3588_PD_VI>; 208*4882a593Smuzhiyun avdd-supply = <&vcc_mipidcphy0>; 209*4882a593Smuzhiyun pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 210*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>; 211*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 212*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 213*4882a593Smuzhiyun rockchip,camera-module-name = "GEIR180089"; 214*4882a593Smuzhiyun rockchip,camera-module-lens-name = "LG500627G"; 215*4882a593Smuzhiyun eeprom-ctrl = <&imx258_1_eeprom>; 216*4882a593Smuzhiyun lens-focus = <&dw9714_1>; 217*4882a593Smuzhiyun port { 218*4882a593Smuzhiyun imx258_1_out0: endpoint { 219*4882a593Smuzhiyun remote-endpoint = <&mipi_in_1_ucam0>; 220*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun// use dcphy0 isp1 227*4882a593Smuzhiyun&mipi_dcphy0 { 228*4882a593Smuzhiyun status = "okay"; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&mipi0_csi2 { 232*4882a593Smuzhiyun status = "okay"; 233*4882a593Smuzhiyun ports { 234*4882a593Smuzhiyun #address-cells = <1>; 235*4882a593Smuzhiyun #size-cells = <0>; 236*4882a593Smuzhiyun port@0 { 237*4882a593Smuzhiyun reg = <0>; 238*4882a593Smuzhiyun #address-cells = <1>; 239*4882a593Smuzhiyun #size-cells = <0>; 240*4882a593Smuzhiyun mipi0_csi2_input: endpoint@1 { 241*4882a593Smuzhiyun reg = <1>; 242*4882a593Smuzhiyun remote-endpoint = <&csidcphy0_out>; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun port@1 { 246*4882a593Smuzhiyun reg = <1>; 247*4882a593Smuzhiyun #address-cells = <1>; 248*4882a593Smuzhiyun #size-cells = <0>; 249*4882a593Smuzhiyun mipi0_csi2_output: endpoint@0 { 250*4882a593Smuzhiyun reg = <0>; 251*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in0>; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun}; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun&rkcif_mipi_lvds { 258*4882a593Smuzhiyun status = "okay"; 259*4882a593Smuzhiyun port { 260*4882a593Smuzhiyun cif_mipi_in0: endpoint { 261*4882a593Smuzhiyun remote-endpoint = <&mipi0_csi2_output>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun#if 0 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf { 269*4882a593Smuzhiyun status = "okay"; 270*4882a593Smuzhiyun port { 271*4882a593Smuzhiyun mipi_lvds_sditf_1: endpoint { 272*4882a593Smuzhiyun remote-endpoint = <&isp0_vir1>; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun&rkisp0_vir1 { 278*4882a593Smuzhiyun status = "okay"; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun port { 281*4882a593Smuzhiyun #address-cells = <1>; 282*4882a593Smuzhiyun #size-cells = <0>; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun isp0_vir1: endpoint@0 { 285*4882a593Smuzhiyun reg = <0>; 286*4882a593Smuzhiyun remote-endpoint = <&mipi_lvds_sditf_1>; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun#endif 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&rkisp1 { 294*4882a593Smuzhiyun status = "okay"; 295*4882a593Smuzhiyun}; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun&isp1_mmu { 298*4882a593Smuzhiyun status = "okay"; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf { 302*4882a593Smuzhiyun status = "okay"; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun port { 305*4882a593Smuzhiyun mipi1_lvds_sditf: endpoint { 306*4882a593Smuzhiyun remote-endpoint = <&isp1_vir0>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&rkisp1_vir0 { 312*4882a593Smuzhiyun status = "okay"; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun port { 315*4882a593Smuzhiyun #address-cells = <1>; 316*4882a593Smuzhiyun #size-cells = <0>; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun isp1_vir0: endpoint@0 { 319*4882a593Smuzhiyun reg = <0>; 320*4882a593Smuzhiyun remote-endpoint = <&mipi1_lvds_sditf>; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun}; 324