xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h"
8*4882a593Smuzhiyun#include "rk3588.dtsi"
9*4882a593Smuzhiyun#include "rk3588-evb.dtsi"
10*4882a593Smuzhiyun#include "rk3588-rk806-single.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	fan: pwm-fan {
14*4882a593Smuzhiyun		compatible = "pwm-fan";
15*4882a593Smuzhiyun		#cooling-cells = <2>;
16*4882a593Smuzhiyun		pwms = <&pwm14 0 50000 0>;
17*4882a593Smuzhiyun		cooling-levels = <0 50 100 150 200 255>;
18*4882a593Smuzhiyun		rockchip,temp-trips = <
19*4882a593Smuzhiyun			50000	1
20*4882a593Smuzhiyun			55000	2
21*4882a593Smuzhiyun			60000	3
22*4882a593Smuzhiyun			65000	4
23*4882a593Smuzhiyun			70000	5
24*4882a593Smuzhiyun		>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	pcie30_avdd1v8: pcie30-avdd1v8 {
28*4882a593Smuzhiyun		compatible = "regulator-fixed";
29*4882a593Smuzhiyun		regulator-name = "pcie30_avdd1v8";
30*4882a593Smuzhiyun		regulator-boot-on;
31*4882a593Smuzhiyun		regulator-always-on;
32*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
33*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
34*4882a593Smuzhiyun		vin-supply = <&avcc_1v8_s0>;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	pcie30_avdd0v75: pcie30-avdd0v75 {
38*4882a593Smuzhiyun		compatible = "regulator-fixed";
39*4882a593Smuzhiyun		regulator-name = "pcie30_avdd0v75";
40*4882a593Smuzhiyun		regulator-boot-on;
41*4882a593Smuzhiyun		regulator-always-on;
42*4882a593Smuzhiyun		regulator-min-microvolt = <750000>;
43*4882a593Smuzhiyun		regulator-max-microvolt = <750000>;
44*4882a593Smuzhiyun		vin-supply = <&avdd_0v75_s0>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	reserved-memory {
48*4882a593Smuzhiyun		#address-cells = <2>;
49*4882a593Smuzhiyun		#size-cells = <2>;
50*4882a593Smuzhiyun		ranges;
51*4882a593Smuzhiyun		dma_trans: dma-trans@3c000000 {
52*4882a593Smuzhiyun			reg = <0x0 0x3c000000 0x0 0x04000000>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	vbus5v0_typec: vbus5v0-typec {
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun		regulator-name = "vbus5v0_typec";
59*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
60*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
61*4882a593Smuzhiyun		enable-active-high;
62*4882a593Smuzhiyun		gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
63*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
64*4882a593Smuzhiyun		pinctrl-names = "default";
65*4882a593Smuzhiyun		pinctrl-0 = <&typec5v_pwren>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
69*4882a593Smuzhiyun		compatible = "regulator-fixed";
70*4882a593Smuzhiyun		regulator-name = "vcc_1v1_nldo_s3";
71*4882a593Smuzhiyun		regulator-always-on;
72*4882a593Smuzhiyun		regulator-boot-on;
73*4882a593Smuzhiyun		regulator-min-microvolt = <1100000>;
74*4882a593Smuzhiyun		regulator-max-microvolt = <1100000>;
75*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	vcc3v3_au5426: vcc3v3-au5426 {
79*4882a593Smuzhiyun		compatible = "regulator-fixed";
80*4882a593Smuzhiyun		regulator-name = "vcc3v3_au5426";
81*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
82*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
83*4882a593Smuzhiyun		enable-active-high;
84*4882a593Smuzhiyun		regulator-boot-on;
85*4882a593Smuzhiyun		regulator-always-on;
86*4882a593Smuzhiyun		gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
87*4882a593Smuzhiyun		startup-delay-us = <5000>;
88*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	vcc3v3_lcd_n: vcc3v3-lcd0-n {
92*4882a593Smuzhiyun		compatible = "regulator-fixed";
93*4882a593Smuzhiyun		regulator-name = "vcc3v3_lcd0_n";
94*4882a593Smuzhiyun		regulator-boot-on;
95*4882a593Smuzhiyun		enable-active-high;
96*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
97*4882a593Smuzhiyun		vin-supply = <&vcc_1v8_s3>;
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host {
101*4882a593Smuzhiyun		compatible = "regulator-fixed";
102*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
103*4882a593Smuzhiyun		regulator-boot-on;
104*4882a593Smuzhiyun		regulator-always-on;
105*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
106*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
107*4882a593Smuzhiyun		enable-active-high;
108*4882a593Smuzhiyun		gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
109*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
110*4882a593Smuzhiyun		pinctrl-names = "default";
111*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&backlight {
116*4882a593Smuzhiyun	pwms = <&pwm3 0 25000 0>;
117*4882a593Smuzhiyun	status = "okay";
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&dp0 {
121*4882a593Smuzhiyun	status = "okay";
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&dp0_in_vp2 {
125*4882a593Smuzhiyun	status = "okay";
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun/*
129*4882a593Smuzhiyun * mipi_dcphy0 needs to be enabled
130*4882a593Smuzhiyun * when dsi0 is enabled
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun&dsi0 {
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&dsi0_in_vp2 {
137*4882a593Smuzhiyun	status = "disabled";
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&dsi0_in_vp3 {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&dsi0_panel {
145*4882a593Smuzhiyun	power-supply = <&vcc3v3_lcd_n>;
146*4882a593Smuzhiyun	reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
147*4882a593Smuzhiyun	pinctrl-names = "default";
148*4882a593Smuzhiyun	pinctrl-0 = <&lcd_rst_gpio>;
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&gmac0 {
152*4882a593Smuzhiyun	/* Use rgmii-rxid mode to disable rx delay inside Soc */
153*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
154*4882a593Smuzhiyun	clock_in_out = "output";
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
157*4882a593Smuzhiyun	snps,reset-active-low;
158*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
159*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	pinctrl-names = "default";
162*4882a593Smuzhiyun	pinctrl-0 = <&gmac0_miim
163*4882a593Smuzhiyun		     &gmac0_tx_bus2
164*4882a593Smuzhiyun		     &gmac0_rx_bus2
165*4882a593Smuzhiyun		     &gmac0_rgmii_clk
166*4882a593Smuzhiyun		     &gmac0_rgmii_bus>;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	tx_delay = <0x44>;
169*4882a593Smuzhiyun	/* rx_delay = <0x4f>; */
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	phy-handle = <&rgmii_phy0>;
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&gmac1 {
176*4882a593Smuzhiyun	/* Use rgmii-rxid mode to disable rx delay inside Soc */
177*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
178*4882a593Smuzhiyun	clock_in_out = "output";
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	snps,reset-gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
181*4882a593Smuzhiyun	snps,reset-active-low;
182*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
183*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun	pinctrl-names = "default";
186*4882a593Smuzhiyun	pinctrl-0 = <&gmac1_miim
187*4882a593Smuzhiyun		     &gmac1_tx_bus2
188*4882a593Smuzhiyun		     &gmac1_rx_bus2
189*4882a593Smuzhiyun		     &gmac1_rgmii_clk
190*4882a593Smuzhiyun		     &gmac1_rgmii_bus>;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun	tx_delay = <0x44>;
193*4882a593Smuzhiyun	/* rx_delay = <0x4f>; */
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	phy-handle = <&rgmii_phy1>;
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&i2c0 {
200*4882a593Smuzhiyun	status = "okay";
201*4882a593Smuzhiyun	pinctrl-names = "default";
202*4882a593Smuzhiyun	pinctrl-0 = <&i2c0m2_xfer>;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
205*4882a593Smuzhiyun		compatible = "rockchip,rk8602";
206*4882a593Smuzhiyun		reg = <0x42>;
207*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
208*4882a593Smuzhiyun		regulator-compatible = "rk860x-reg";
209*4882a593Smuzhiyun		regulator-name = "vdd_cpu_big0_s0";
210*4882a593Smuzhiyun		regulator-min-microvolt = <550000>;
211*4882a593Smuzhiyun		regulator-max-microvolt = <1050000>;
212*4882a593Smuzhiyun		regulator-ramp-delay = <2300>;
213*4882a593Smuzhiyun		rockchip,suspend-voltage-selector = <1>;
214*4882a593Smuzhiyun		regulator-boot-on;
215*4882a593Smuzhiyun		regulator-always-on;
216*4882a593Smuzhiyun		regulator-state-mem {
217*4882a593Smuzhiyun			regulator-off-in-suspend;
218*4882a593Smuzhiyun		};
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun	vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
222*4882a593Smuzhiyun		compatible = "rockchip,rk8603";
223*4882a593Smuzhiyun		reg = <0x43>;
224*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
225*4882a593Smuzhiyun		regulator-compatible = "rk860x-reg";
226*4882a593Smuzhiyun		regulator-name = "vdd_cpu_big1_s0";
227*4882a593Smuzhiyun		regulator-min-microvolt = <550000>;
228*4882a593Smuzhiyun		regulator-max-microvolt = <1050000>;
229*4882a593Smuzhiyun		regulator-ramp-delay = <2300>;
230*4882a593Smuzhiyun		rockchip,suspend-voltage-selector = <1>;
231*4882a593Smuzhiyun		regulator-boot-on;
232*4882a593Smuzhiyun		regulator-always-on;
233*4882a593Smuzhiyun		regulator-state-mem {
234*4882a593Smuzhiyun			regulator-off-in-suspend;
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun&i2c2 {
240*4882a593Smuzhiyun	status = "okay";
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun	vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
243*4882a593Smuzhiyun		compatible = "rockchip,rk8602";
244*4882a593Smuzhiyun		reg = <0x42>;
245*4882a593Smuzhiyun		vin-supply = <&vcc5v0_sys>;
246*4882a593Smuzhiyun		regulator-compatible = "rk860x-reg";
247*4882a593Smuzhiyun		regulator-name = "vdd_npu_s0";
248*4882a593Smuzhiyun		regulator-min-microvolt = <550000>;
249*4882a593Smuzhiyun		regulator-max-microvolt = <950000>;
250*4882a593Smuzhiyun		regulator-ramp-delay = <2300>;
251*4882a593Smuzhiyun		rockchip,suspend-voltage-selector = <1>;
252*4882a593Smuzhiyun		regulator-boot-on;
253*4882a593Smuzhiyun		regulator-always-on;
254*4882a593Smuzhiyun		regulator-state-mem {
255*4882a593Smuzhiyun			regulator-off-in-suspend;
256*4882a593Smuzhiyun		};
257*4882a593Smuzhiyun	};
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&i2c6 {
261*4882a593Smuzhiyun	status = "okay";
262*4882a593Smuzhiyun	gt1x: gt1x@14 {
263*4882a593Smuzhiyun		compatible = "goodix,gt1x";
264*4882a593Smuzhiyun		reg = <0x14>;
265*4882a593Smuzhiyun		pinctrl-names = "default";
266*4882a593Smuzhiyun		pinctrl-0 = <&touch_gpio>;
267*4882a593Smuzhiyun		goodix,rst-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
268*4882a593Smuzhiyun		goodix,irq-gpio = <&gpio0 RK_PC6 IRQ_TYPE_LEVEL_LOW>;
269*4882a593Smuzhiyun		power-supply = <&vcc3v3_lcd_n>;
270*4882a593Smuzhiyun	};
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun&i2c8 {
274*4882a593Smuzhiyun	status = "okay";
275*4882a593Smuzhiyun	pinctrl-names = "default";
276*4882a593Smuzhiyun	pinctrl-0 = <&i2c8m3_xfer>;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun	usbc0: fusb302@22 {
279*4882a593Smuzhiyun		compatible = "fcs,fusb302";
280*4882a593Smuzhiyun		reg = <0x22>;
281*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
282*4882a593Smuzhiyun		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
283*4882a593Smuzhiyun		pinctrl-names = "default";
284*4882a593Smuzhiyun		pinctrl-0 = <&usbc0_int>;
285*4882a593Smuzhiyun		vbus-supply = <&vbus5v0_typec>;
286*4882a593Smuzhiyun		status = "okay";
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun		ports {
289*4882a593Smuzhiyun			#address-cells = <1>;
290*4882a593Smuzhiyun			#size-cells = <0>;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun			port@0 {
293*4882a593Smuzhiyun				reg = <0>;
294*4882a593Smuzhiyun				usbc0_role_sw: endpoint@0 {
295*4882a593Smuzhiyun					remote-endpoint = <&dwc3_0_role_switch>;
296*4882a593Smuzhiyun				};
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun		usb_con: connector {
301*4882a593Smuzhiyun			compatible = "usb-c-connector";
302*4882a593Smuzhiyun			label = "USB-C";
303*4882a593Smuzhiyun			data-role = "dual";
304*4882a593Smuzhiyun			power-role = "dual";
305*4882a593Smuzhiyun			try-power-role = "sink";
306*4882a593Smuzhiyun			op-sink-microwatt = <1000000>;
307*4882a593Smuzhiyun			sink-pdos =
308*4882a593Smuzhiyun				<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
309*4882a593Smuzhiyun			source-pdos =
310*4882a593Smuzhiyun				<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun			altmodes {
313*4882a593Smuzhiyun				#address-cells = <1>;
314*4882a593Smuzhiyun				#size-cells = <0>;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun				altmode@0 {
317*4882a593Smuzhiyun					reg = <0>;
318*4882a593Smuzhiyun					svid = <0xff01>;
319*4882a593Smuzhiyun					vdo = <0xffffffff>;
320*4882a593Smuzhiyun				};
321*4882a593Smuzhiyun			};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun			ports {
324*4882a593Smuzhiyun				#address-cells = <1>;
325*4882a593Smuzhiyun				#size-cells = <0>;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun				port@0 {
328*4882a593Smuzhiyun					reg = <0>;
329*4882a593Smuzhiyun					usbc0_orien_sw: endpoint {
330*4882a593Smuzhiyun						remote-endpoint = <&usbdp_phy0_orientation_switch>;
331*4882a593Smuzhiyun					};
332*4882a593Smuzhiyun				};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun				port@1 {
335*4882a593Smuzhiyun					reg = <1>;
336*4882a593Smuzhiyun					dp_altmode_mux: endpoint {
337*4882a593Smuzhiyun						remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
338*4882a593Smuzhiyun					};
339*4882a593Smuzhiyun				};
340*4882a593Smuzhiyun			};
341*4882a593Smuzhiyun		};
342*4882a593Smuzhiyun	};
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&mdio0 {
346*4882a593Smuzhiyun	rgmii_phy0: phy@1 {
347*4882a593Smuzhiyun		compatible = "ethernet-phy-ieee802.3-c22";
348*4882a593Smuzhiyun		reg = <0x1>;
349*4882a593Smuzhiyun	};
350*4882a593Smuzhiyun};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun&mdio1 {
353*4882a593Smuzhiyun	rgmii_phy1: phy@1 {
354*4882a593Smuzhiyun		compatible = "ethernet-phy-ieee802.3-c22";
355*4882a593Smuzhiyun		reg = <0x1>;
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun&mipi_dcphy0 {
360*4882a593Smuzhiyun	status = "okay";
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&pcie30phy {
364*4882a593Smuzhiyun	status = "okay";
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&pcie3x4 {
368*4882a593Smuzhiyun	compatible = "rockchip,rk3588-pcie-ep";
369*4882a593Smuzhiyun	memory-region = <&dma_trans>;
370*4882a593Smuzhiyun	busno = <1>;
371*4882a593Smuzhiyun};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun&pinctrl {
374*4882a593Smuzhiyun	lcd {
375*4882a593Smuzhiyun		lcd_rst_gpio: lcd-rst-gpio {
376*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
377*4882a593Smuzhiyun		};
378*4882a593Smuzhiyun	};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun	touch {
381*4882a593Smuzhiyun		touch_gpio: touch-gpio {
382*4882a593Smuzhiyun			rockchip,pins =
383*4882a593Smuzhiyun				<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
384*4882a593Smuzhiyun				<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
385*4882a593Smuzhiyun		};
386*4882a593Smuzhiyun	};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun	usb {
389*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
390*4882a593Smuzhiyun			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
391*4882a593Smuzhiyun		};
392*4882a593Smuzhiyun	};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun	usb-typec {
395*4882a593Smuzhiyun		usbc0_int: usbc0-int {
396*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
397*4882a593Smuzhiyun		};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun		typec5v_pwren: typec5v-pwren {
400*4882a593Smuzhiyun			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
401*4882a593Smuzhiyun		};
402*4882a593Smuzhiyun	};
403*4882a593Smuzhiyun};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun&pwm3 {
406*4882a593Smuzhiyun	status = "okay";
407*4882a593Smuzhiyun};
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun&pwm14 {
410*4882a593Smuzhiyun	pinctrl-0 = <&pwm14m1_pins>;
411*4882a593Smuzhiyun	status = "okay";
412*4882a593Smuzhiyun};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun&route_dsi0 {
415*4882a593Smuzhiyun	status = "okay";
416*4882a593Smuzhiyun	connect = <&vp3_out_dsi0>;
417*4882a593Smuzhiyun};
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun&u2phy2 {
420*4882a593Smuzhiyun	status = "disabled";
421*4882a593Smuzhiyun};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun&u2phy3 {
424*4882a593Smuzhiyun	status = "disabled";
425*4882a593Smuzhiyun};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun&u2phy1_otg {
428*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
429*4882a593Smuzhiyun};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun&u2phy2_host {
432*4882a593Smuzhiyun	status = "disabled";
433*4882a593Smuzhiyun};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun&u2phy3_host {
436*4882a593Smuzhiyun	status = "disabled";
437*4882a593Smuzhiyun};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun&usb_host0_ehci {
440*4882a593Smuzhiyun	status = "disabled";
441*4882a593Smuzhiyun};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun&usb_host0_ohci {
444*4882a593Smuzhiyun	status = "disabled";
445*4882a593Smuzhiyun};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun&usb_host1_ehci {
448*4882a593Smuzhiyun	status = "disabled";
449*4882a593Smuzhiyun};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun&usb_host1_ohci {
452*4882a593Smuzhiyun	status = "disabled";
453*4882a593Smuzhiyun};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun&usbdp_phy0 {
456*4882a593Smuzhiyun	orientation-switch;
457*4882a593Smuzhiyun	svid = <0xff01>;
458*4882a593Smuzhiyun	sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
459*4882a593Smuzhiyun	sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun	port {
462*4882a593Smuzhiyun		#address-cells = <1>;
463*4882a593Smuzhiyun		#size-cells = <0>;
464*4882a593Smuzhiyun		usbdp_phy0_orientation_switch: endpoint@0 {
465*4882a593Smuzhiyun			reg = <0>;
466*4882a593Smuzhiyun			remote-endpoint = <&usbc0_orien_sw>;
467*4882a593Smuzhiyun		};
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun		usbdp_phy0_dp_altmode_mux: endpoint@1 {
470*4882a593Smuzhiyun			reg = <1>;
471*4882a593Smuzhiyun			remote-endpoint = <&dp_altmode_mux>;
472*4882a593Smuzhiyun		};
473*4882a593Smuzhiyun	};
474*4882a593Smuzhiyun};
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun&usbdrd_dwc3_0 {
477*4882a593Smuzhiyun	dr_mode = "otg";
478*4882a593Smuzhiyun	usb-role-switch;
479*4882a593Smuzhiyun	port {
480*4882a593Smuzhiyun		#address-cells = <1>;
481*4882a593Smuzhiyun		#size-cells = <0>;
482*4882a593Smuzhiyun		dwc3_0_role_switch: endpoint@0 {
483*4882a593Smuzhiyun			reg = <0>;
484*4882a593Smuzhiyun			remote-endpoint = <&usbc0_role_sw>;
485*4882a593Smuzhiyun		};
486*4882a593Smuzhiyun	};
487*4882a593Smuzhiyun};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun&usbhost3_0 {
490*4882a593Smuzhiyun	status = "disabled";
491*4882a593Smuzhiyun};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun&usbhost_dwc3_0 {
494*4882a593Smuzhiyun	status = "disabled";
495*4882a593Smuzhiyun};
496