1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "dt-bindings/usb/pd.h" 8#include "rk3588.dtsi" 9#include "rk3588-evb.dtsi" 10#include "rk3588-rk806-dual.dtsi" 11 12/ { 13 es7202_sound_micarray: es7202-sound-micarray { 14 status = "okay"; 15 compatible = "simple-audio-card"; 16 simple-audio-card,format = "i2s"; 17 simple-audio-card,name = "rockchip,sound-micarray"; 18 simple-audio-card,mclk-fs = <256>; 19 simple-audio-card,dai-link@0 { 20 format = "pdm"; 21 cpu { 22 sound-dai = <&pdm0>; 23 }; 24 codec { 25 sound-dai = <&es7202>; 26 }; 27 }; 28 }; 29 30 es8388_sound: es8388-sound { 31 status = "okay"; 32 compatible = "rockchip,multicodecs-card"; 33 rockchip,card-name = "rockchip-es8388"; 34 hp-det-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; 35 io-channels = <&saradc 3>; 36 io-channel-names = "adc-detect"; 37 keyup-threshold-microvolt = <1800000>; 38 poll-interval = <100>; 39 spk-con-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; 40 hp-con-gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 41 rockchip,format = "i2s"; 42 rockchip,mclk-fs = <256>; 43 rockchip,cpu = <&i2s0_8ch>; 44 rockchip,codec = <&es8388>; 45 rockchip,audio-routing = 46 "Headphone", "LOUT1", 47 "Headphone", "ROUT1", 48 "Speaker", "LOUT2", 49 "Speaker", "ROUT2", 50 "Headphone", "Headphone Power", 51 "Headphone", "Headphone Power", 52 "Speaker", "Speaker Power", 53 "Speaker", "Speaker Power", 54 "LINPUT1", "Main Mic", 55 "LINPUT2", "Main Mic", 56 "RINPUT1", "Headset Mic", 57 "RINPUT2", "Headset Mic"; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&hp_det>; 60 play-pause-key { 61 label = "playpause"; 62 linux,code = <KEY_PLAYPAUSE>; 63 press-threshold-microvolt = <2000>; 64 }; 65 }; 66 67 fan: pwm-fan { 68 compatible = "pwm-fan"; 69 #cooling-cells = <2>; 70 pwms = <&pwm6 0 50000 0>; 71 cooling-levels = <0 50 100 150 200 255>; 72 rockchip,temp-trips = < 73 50000 1 74 55000 2 75 60000 3 76 65000 4 77 70000 5 78 >; 79 }; 80 81 hall_sensor: hall-mh248 { 82 compatible = "hall-mh248"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&mh248_irq_gpio>; 85 irq-gpio = <&gpio0 RK_PD2 IRQ_TYPE_EDGE_BOTH>; 86 hall-active = <1>; 87 status = "okay"; 88 }; 89 90 pcie20_avdd0v85: pcie20-avdd0v85 { 91 compatible = "regulator-fixed"; 92 regulator-name = "pcie20_avdd0v85"; 93 regulator-boot-on; 94 regulator-always-on; 95 regulator-min-microvolt = <850000>; 96 regulator-max-microvolt = <850000>; 97 vin-supply = <&avdd_0v85_s0>; 98 }; 99 100 pcie20_avdd1v8: pcie20-avdd1v8 { 101 compatible = "regulator-fixed"; 102 regulator-name = "pcie20_avdd1v8"; 103 regulator-boot-on; 104 regulator-always-on; 105 regulator-min-microvolt = <1800000>; 106 regulator-max-microvolt = <1800000>; 107 vin-supply = <&avcc_1v8_s0>; 108 }; 109 110 pcie30_avdd0v75: pcie30-avdd0v75 { 111 compatible = "regulator-fixed"; 112 regulator-name = "pcie30_avdd0v75"; 113 regulator-boot-on; 114 regulator-always-on; 115 regulator-min-microvolt = <750000>; 116 regulator-max-microvolt = <750000>; 117 vin-supply = <&avdd_0v75_s0>; 118 }; 119 120 pcie30_avdd1v8: pcie30-avdd1v8 { 121 compatible = "regulator-fixed"; 122 regulator-name = "pcie30_avdd1v8"; 123 regulator-boot-on; 124 regulator-always-on; 125 regulator-min-microvolt = <1800000>; 126 regulator-max-microvolt = <1800000>; 127 vin-supply = <&avcc_1v8_s0>; 128 }; 129 130 vbus5v0_typec: vbus5v0-typec { 131 compatible = "regulator-fixed"; 132 regulator-name = "vbus5v0_typec"; 133 regulator-min-microvolt = <5000000>; 134 regulator-max-microvolt = <5000000>; 135 enable-active-high; 136 gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; 137 vin-supply = <&vcc5v0_sys>; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&typec5v_pwren>; 140 }; 141 142 vcc3v3_lcd_n: vcc3v3-lcd0-n { 143 compatible = "regulator-fixed"; 144 regulator-name = "vcc3v3_lcd0_n"; 145 regulator-boot-on; 146 enable-active-high; 147 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 148 vin-supply = <&vcc_1v8_s0>; 149 }; 150 151 vcc3v3_pcie30: vcc3v3-pcie30 { 152 compatible = "regulator-fixed"; 153 regulator-name = "vcc3v3_pcie30"; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 enable-active-high; 157 gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; 158 startup-delay-us = <5000>; 159 vin-supply = <&vcc12v_dcin>; 160 }; 161 162 vcc5v0_host: vcc5v0-host { 163 compatible = "regulator-fixed"; 164 regulator-name = "vcc5v0_host"; 165 regulator-boot-on; 166 regulator-always-on; 167 regulator-min-microvolt = <5000000>; 168 regulator-max-microvolt = <5000000>; 169 enable-active-high; 170 gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 171 vin-supply = <&vcc5v0_usb>; 172 pinctrl-names = "default"; 173 pinctrl-0 = <&vcc5v0_host_en>; 174 }; 175 176 wireless_bluetooth: wireless-bluetooth { 177 compatible = "bluetooth-platdata"; 178 clocks = <&hym8563>; 179 clock-names = "ext_clock"; 180 uart_rts_gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; 181 pinctrl-names = "default", "rts_gpio"; 182 pinctrl-0 = <&uart8m1_rtsn>; 183 pinctrl-1 = <&uart8_gpios>; 184 BT,reset_gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 185 BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 186 BT,wake_host_irq = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>; 187 status = "okay"; 188 }; 189 190 wireless_wlan: wireless-wlan { 191 compatible = "wlan-platdata"; 192 wifi_chip_type = "ap6275p"; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>; 195 WIFI,host_wake_irq = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 196 WIFI,poweren_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 197 status = "okay"; 198 }; 199}; 200 201&combphy0_ps { 202 status = "okay"; 203}; 204 205&combphy1_ps { 206 status = "okay"; 207}; 208 209&combphy2_psu { 210 status = "okay"; 211}; 212 213&backlight { 214 pwms = <&pwm15 0 25000 0>; 215 status = "okay"; 216}; 217 218&dp0 { 219 status = "okay"; 220}; 221 222&dp0_in_vp2 { 223 status = "okay"; 224}; 225 226&dp1_sound { 227 status = "okay"; 228}; 229 230&dp1 { 231 pinctrl-0 = <&dp1m2_pins>; 232 pinctrl-names = "default"; 233 status = "okay"; 234}; 235 236&dp1_in_vp2 { 237 status = "okay"; 238}; 239 240/* 241 * mipi_dcphy0 needs to be enabled 242 * when dsi0 is enabled 243 */ 244&dsi0 { 245 status = "okay"; 246}; 247 248&dsi0_in_vp2 { 249 status = "disabled"; 250}; 251 252&dsi0_in_vp3 { 253 status = "okay"; 254}; 255 256&dsi0_panel { 257 power-supply = <&vcc3v3_lcd_n>; 258 reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 259 pinctrl-names = "default"; 260 pinctrl-0 = <&lcd_rst_gpio>; 261}; 262 263/* 264 * mipi_dcphy1 needs to be enabled 265 * when dsi1 is enabled 266 */ 267&dsi1 { 268 status = "disabled"; 269}; 270 271&dsi1_in_vp2 { 272 status = "disabled"; 273}; 274 275&dsi1_in_vp3 { 276 status = "disabled"; 277}; 278 279&dsi1_panel { 280 power-supply = <&vcc3v3_lcd_n>; 281 282 /* 283 * because in hardware, the two screens share the reset pin, 284 * so reset-gpios need only in dsi1 enable and dsi0 disabled 285 * case. 286 */ 287 288 //reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 289 //pinctrl-names = "default"; 290 //pinctrl-0 = <&lcd_rst_gpio>; 291 phy-c-option; 292 dsi,lanes = <3>; 293 294 panel-init-sequence = [ 295 23 00 02 FF 20 296 23 00 02 FB 01 297 23 00 02 05 D9 298 /* VGH=17V */ 299 23 00 02 07 78 300 /* VGL=-14V */ 301 23 00 02 08 5A 302 /* EN_VMODGATE2=1 */ 303 23 00 02 0D 63 304 /* VGH=16V */ 305 23 00 02 0E 91 306 /* VGL=-13V */ 307 23 00 02 0F 73 308 /* GVDD=5.2V */ 309 23 00 02 95 EB 310 23 00 02 96 EB 311 /* Disable VDDI LV */ 312 23 00 02 30 11 313 /* ISOP */ 314 23 00 02 6D 66 315 /* EN_GMACP */ 316 23 00 02 75 A2 317 /* V128 */ 318 23 00 02 77 3B 319 /* R(+) */ 320 29 00 11 B0 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 321 29 00 11 B1 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 322 29 00 11 B2 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 323 29 00 0D B3 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF 324 /* G(+) */ 325 29 00 11 B4 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 326 29 00 11 B5 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 327 29 00 11 B6 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 328 29 00 0D B7 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF 329 /* B(+) */ 330 29 00 11 B8 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 331 29 00 11 B9 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 332 29 00 11 BA 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 333 29 00 0D BB 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF 334 /* CMD2_Page1 */ 335 23 00 02 FF 21 336 23 00 02 FB 01 337 /* R(-) */ 338 29 00 11 B0 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 339 29 00 11 B1 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 340 29 00 11 B2 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 341 29 00 0D B3 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 342 /* G(-) */ 343 29 00 11 B4 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 344 29 00 11 B5 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 345 29 00 11 B6 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 346 29 00 0D B7 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 347 /* B(-) */ 348 29 00 11 B8 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 349 29 00 11 B9 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 350 29 00 11 BA 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 351 29 00 0D BB 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 352 353 29 00 02 FF 24 354 29 00 02 FB 01 355 /* VGL */ 356 29 00 02 00 00 357 29 00 02 01 00 358 /* VDDO */ 359 29 00 02 02 1C 360 29 00 02 03 1C 361 /* VDDE */ 362 29 00 02 04 1D 363 29 00 02 05 1D 364 /* STV0 */ 365 29 00 02 06 04 366 29 00 02 07 04 367 /* CLK8 */ 368 29 00 02 08 0F 369 29 00 02 09 0F 370 /* CLK6 */ 371 29 00 02 0A 0E 372 29 00 02 0B 0E 373 /* CLK4 */ 374 29 00 02 0C 0D 375 29 00 02 0D 0D 376 /* CLK2 */ 377 29 00 02 0E 0C 378 29 00 02 0F 0C 379 /* STV2 */ 380 29 00 02 10 08 381 29 00 02 11 08 382 383 29 00 02 12 00 384 29 00 02 13 00 385 29 00 02 14 00 386 29 00 02 15 00 387 /* VGL */ 388 29 00 02 16 00 389 29 00 02 17 00 390 /* VDDO */ 391 29 00 02 18 1C 392 29 00 02 19 1C 393 /* VDDE */ 394 29 00 02 1A 1D 395 29 00 02 1B 1D 396 /* STV0 */ 397 29 00 02 1C 04 398 29 00 02 1D 04 399 /* CLK7 */ 400 29 00 02 1E 0F 401 29 00 02 1F 0F 402 /* CLK5 */ 403 29 00 02 20 0E 404 29 00 02 21 0E 405 /* CLK3 */ 406 29 00 02 22 0D 407 29 00 02 23 0D 408 /* CLK1 */ 409 29 00 02 24 0C 410 29 00 02 25 0C 411 /* STV1 */ 412 29 00 02 26 08 413 29 00 02 27 08 414 415 29 00 02 28 00 416 29 00 02 29 00 417 29 00 02 2A 00 418 29 00 02 2B 00 419 /* STV0 */ 420 29 00 02 2D 20 421 29 00 02 2F 0A 422 29 00 02 30 44 423 29 00 02 33 0C 424 29 00 02 34 32 425 426 29 00 02 37 44 427 29 00 02 38 40 428 29 00 02 39 00 429 29 00 02 3A 50 430 29 00 02 3B 50 431 29 00 02 3D 42 432 /* STV */ 433 29 00 02 3F 06 434 29 00 02 43 06 435 436 29 00 02 47 66 437 29 00 02 4A 50 438 29 00 02 4B 50 439 29 00 02 4C 91 440 /* GCK */ 441 29 00 02 4D 21 442 29 00 02 4E 43 443 29 00 02 51 12 444 29 00 02 52 34 445 29 00 03 55 82 02 446 29 00 02 56 04 447 29 00 02 58 21 448 29 00 02 59 30 449 29 00 02 5A 50 450 29 00 02 5B 50 451 29 00 03 5E 00 06 452 29 00 02 5F 00 453 /* EN_LFD_SOURCE=0 */ 454 29 00 02 65 82 455 /* VDDO, VDDE */ 456 29 00 02 7E 20 457 29 00 02 7F 3C 458 29 00 02 82 04 459 29 00 02 97 C0 460 461 29 00 0D B6 05 00 05 00 00 00 00 00 05 05 00 00 462 /* qclk=96/5 Mhz */ 463 29 00 02 91 44 464 29 00 02 92 55 465 29 00 02 93 1A 466 29 00 02 94 5F 467 /* SOG_HBP */ 468 29 00 02 D7 55 469 29 00 02 DA 0A 470 29 00 02 DE 08 471 /* Normal */ 472 29 00 02 DB 05 473 29 00 02 DC 55 474 29 00 02 DD 22 475 /* Line N */ 476 29 00 02 DF 05 477 29 00 02 E0 55 478 /* Line N+1 */ 479 29 00 02 E1 05 480 29 00 02 E2 55 481 /* TP0 */ 482 29 00 02 E3 05 483 29 00 02 E4 55 484 /* TP3 */ 485 29 00 02 E5 05 486 29 00 02 E6 55 487 /* Gate EQ */ 488 29 00 02 5C 00 489 29 00 02 5D 00 490 /* TP3 */ 491 29 00 02 8D 00 492 29 00 02 8E 00 493 /* No Sync @ TP */ 494 29 00 02 B5 90 495 496 29 00 02 FF 25 497 29 00 02 FB 01 498 /* disable auto_vbp_vfp */ 499 29 00 02 05 00 500 /* ESD_DET_ERR_SEL */ 501 29 00 02 19 07 502 /* DP_N_GCK */ 503 29 00 02 1F 50 504 29 00 02 20 50 505 /* DP_N_1_GCK */ 506 29 00 02 26 50 507 29 00 02 27 50 508 /* TP0_GCK */ 509 29 00 02 33 50 510 29 00 02 34 50 511 /* TP3 GCK/MUX=1 */ 512 29 00 02 3F E0 513 /* TP3_GCK_START_LINE */ 514 29 00 02 40 00 515 /* TP3_STV */ 516 29 00 02 44 00 517 29 00 02 45 40 518 /* TP3_GCK */ 519 29 00 02 48 50 520 29 00 02 49 50 521 /* LSTP0 */ 522 29 00 02 5B 00 523 29 00 02 5C 00 524 29 00 02 5D 00 525 29 00 02 5E D0 526 527 29 00 02 61 50 528 29 00 02 62 50 529 /* en_vfp_addvsync */ 530 29 00 02 F1 10 531 /* CMD2,Page10 */ 532 29 00 02 FF 2A 533 29 00 02 FB 01 534 /* PWRONOFF */ 535 /* STV */ 536 29 00 02 64 16 537 /* CLR */ 538 29 00 02 67 16 539 /* GCK */ 540 29 00 02 6A 16 541 /* POL */ 542 29 00 02 70 30 543 /* ABOFF */ 544 29 00 02 A2 F3 545 29 00 02 A3 FF 546 29 00 02 A4 FF 547 29 00 02 A5 FF 548 /* Long_V_TIMING disable */ 549 29 00 02 D6 08 550 /* CMD2,Page6 */ 551 29 00 02 FF 26 552 29 00 02 FB 01 553 /* TPEN */ 554 29 00 02 00 81 555 /* 90Hz */ 556 29 00 02 01 30 557 558 29 00 02 02 31 559 29 00 02 0A F2 560 //Table A (90Hz) 561 29 00 02 04 28 562 29 00 02 06 3C 563 29 00 02 0C 0B 564 29 00 02 0D 0C 565 29 00 02 0F 00 566 29 00 02 11 00 567 29 00 02 12 50 568 29 00 02 13 AE 569 29 00 02 14 A6 570 29 00 02 16 10 571 29 00 02 19 08 572 29 00 02 1A FF 573 29 00 02 1B 08 574 29 00 02 1C 80 575 29 00 02 22 00 576 29 00 02 23 00 577 29 00 02 2A 08 578 29 00 02 2B FF 579 580 29 00 02 1D 00 581 29 00 02 1E 55 582 29 00 02 1F 55 583 29 00 02 24 00 584 29 00 02 25 55 585 29 00 02 2F 05 586 29 00 02 30 55 587 29 00 02 31 05 588 29 00 02 32 6D 589 29 00 02 39 00 590 29 00 02 3A 55 591 /* Table B (60Hz,81*1+101*19=2000, Extra=20) */ 592 29 00 02 8B 28 593 29 00 02 8C 13 594 29 00 02 8D 0A 595 29 00 02 8F 0A 596 29 00 02 91 00 597 29 00 02 92 50 598 29 00 02 93 51 599 29 00 02 94 65 600 29 00 02 96 10 601 29 00 02 99 0A 602 29 00 02 9A 7F 603 29 00 02 9B 0A 604 29 00 02 9C 0C 605 29 00 02 9D 0A 606 29 00 02 9E 7F 607 608 29 00 02 3F 00 609 29 00 02 40 75 610 29 00 02 41 75 611 29 00 02 42 75 612 29 00 02 43 00 613 29 00 02 44 75 614 29 00 02 45 05 615 29 00 02 46 75 616 29 00 02 47 05 617 29 00 02 48 8D 618 29 00 02 49 00 619 29 00 02 4A 75 620 /* STV0 */ 621 29 00 02 4D 5D 622 29 00 02 4E 60 623 /* STV */ 624 29 00 02 4F 5D 625 29 00 02 50 60 626 /* GCK */ 627 29 00 02 51 70 628 29 00 02 52 60 629 /* DP_N_GCK */ 630 29 00 02 56 70 631 29 00 02 58 60 632 /* DP_N_1_GCK */ 633 29 00 02 5B 70 634 29 00 02 5C 60 635 /* TP0_GCK */ 636 29 00 02 60 70 637 29 00 02 61 60 638 /* TP3_GCK */ 639 29 00 02 64 70 640 29 00 02 65 60 641 /* LSTP0 */ 642 29 00 02 72 70 643 29 00 02 73 60 644 /* PRZ1 */ 645 29 00 02 20 01 646 /* PRZ3 */ 647 /* Rescan=3 */ 648 29 00 02 33 11 649 29 00 02 34 78 650 29 00 02 35 16 651 /* DLH */ 652 29 00 02 C8 04 653 29 00 02 C9 80 654 29 00 02 CA 4E 655 29 00 02 CB 00 656 29 00 02 A9 4C 657 29 00 02 AA 47 658 /* CMD2,Page7 */ 659 29 00 02 FF 27 660 29 00 02 FB 01 661 /* VPOR_DYNH_EN=1, VPOR_CNT_REV=1 */ 662 29 00 02 56 06 663 /* FR0(60Hz) */ 664 29 00 02 58 80 665 29 00 02 59 53 666 29 00 02 5A 00 667 29 00 02 5B 14 668 29 00 02 5C 00 669 29 00 02 5D 01 670 29 00 02 5E 20 671 29 00 02 5F 10 672 29 00 02 60 00 673 29 00 02 61 1D 674 29 00 02 62 00 675 29 00 02 63 01 676 29 00 02 64 24 677 29 00 02 65 1C 678 29 00 02 66 00 679 29 00 02 67 01 680 29 00 02 68 25 681 /* FR1(90Hz) */ 682 29 00 02 78 80 683 29 00 02 79 73 684 29 00 02 7A 00 685 29 00 02 7B 14 686 29 00 02 7C 00 687 29 00 02 7D 02 688 29 00 02 7E 20 689 29 00 02 7F 21 690 29 00 02 80 00 691 29 00 02 81 2A 692 29 00 02 82 00 693 29 00 02 83 01 694 29 00 02 84 1C 695 29 00 02 85 28 696 29 00 02 86 00 697 29 00 02 87 01 698 29 00 02 88 1D 699 700 29 00 02 00 00 701 29 00 02 C3 00 702 /* FTE output TE, FTE1 output TSVD, LEDPWM output TSHD */ 703 29 00 02 D1 24 704 29 00 02 D2 53 705 /* CMD2,Page10 */ 706 29 00 02 FF 2A 707 29 00 02 FB 01 708 29 00 02 01 05 709 29 00 02 02 55 710 /* TP0 */ 711 29 00 02 03 05 712 29 00 02 04 75 713 /* TP3 */ 714 29 00 02 05 05 715 29 00 02 06 75 716 /* PEN_EN=1, UL_FREQ=0 */ 717 29 00 02 22 2F 718 /* 90Hz */ 719 29 00 02 23 11 720 /* FR0 (60Hz) */ 721 29 00 02 24 00 722 29 00 02 25 75 723 29 00 02 27 00 724 29 00 02 28 1A 725 29 00 02 29 00 726 29 00 02 2A 1A 727 29 00 02 2B 00 728 29 00 02 2D 1A 729 /* FR1 (90Hz) */ 730 29 00 02 2F 00 731 29 00 02 30 55 732 29 00 02 32 00 733 29 00 02 33 1A 734 29 00 02 34 00 735 29 00 02 35 1A 736 29 00 02 36 00 737 29 00 02 37 1A 738 /* CMD2,Page3 */ 739 29 00 02 FF 23 740 29 00 02 FB 01 741 /* DBV=12 bit */ 742 29 00 02 00 80 743 /* PWM frequency */ 744 29 00 02 07 00 745 /* CMD3,PageA */ 746 29 00 02 FF E0 747 29 00 02 FB 01 748 /* VCOM Driving Ability */ 749 29 00 02 14 60 750 29 00 02 16 C0 751 /* CMD3,PageB */ 752 29 00 02 FF F0 753 29 00 02 FB 01 754 /* slave osc workaround */ 755 29 00 02 3A 08 756 /* CMD3,PageC */ 757 29 00 02 FF D0 758 29 00 02 FB 01 759 29 00 02 1C 88 760 29 00 02 1D 08 761 /* CMD1 */ 762 29 00 02 FF 10 763 29 00 02 FB 01 764 /* Only Write Slave */ 765 29 00 02 B9 01 766 /* CMD2,Page0 */ 767 29 00 02 FF 20 768 29 00 02 FB 01 769 29 00 02 18 40 770 /* CMD1 */ 771 29 00 02 FF 10 772 29 00 02 FB 01 773 /* Write Master & Slave */ 774 29 00 02 B9 02 775 29 00 02 35 00 776 29 00 03 51 00 FF 777 29 00 02 53 24 778 29 00 02 55 00 779 29 00 02 BB 13 780 /* VBP+VFP=121 */ 781 29 00 06 3B 03 5F 1A 04 04 782 /* CMD2,Page5 */ 783 29 00 02 FF 25 784 /* FRM */ 785 29 00 02 EC 00 786 /* CMD1 */ 787 29 00 02 FF 10 788 29 00 02 FB 01 789 05 FF 01 11 790 05 FF 01 29 791 ]; 792 793 panel-exit-sequence = [ 794 05 00 01 28 795 05 00 01 10 796 ]; 797 798 disp_timings1: display-timings { 799 native-mode = <&dsi1_timing0>; 800 dsi1_timing0: timing0 { 801 clock-frequency = <241300000>; 802 hactive = <1200>; 803 vactive = <2000>; 804 hfront-porch = <31>; 805 hsync-len = <4>; 806 hback-porch = <32>; 807 vfront-porch = <26>; 808 vsync-len = <2>; 809 vback-porch = <93>; 810 hsync-active = <0>; 811 vsync-active = <0>; 812 de-active = <0>; 813 pixelclk-active = <0>; 814 }; 815 }; 816}; 817 818&hdmi1 { 819 enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 820 status = "okay"; 821}; 822 823&hdmi1_in_vp0 { 824 status = "okay"; 825}; 826 827&hdmi1_sound { 828 status = "okay"; 829}; 830 831&hdptxphy_hdmi1 { 832 status = "okay"; 833}; 834 835&i2c0 { 836 status = "okay"; 837 pinctrl-0 = <&i2c0m1_xfer>; 838 839 ls_stk3332: light@47 { 840 compatible = "ls_stk3332"; 841 status = "okay"; 842 reg = <0x47>; 843 type = <SENSOR_TYPE_LIGHT>; 844 irq_enable = <0>; 845 als_threshold_high = <100>; 846 als_threshold_low = <10>; 847 als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */ 848 poll_delay_ms = <100>; 849 }; 850 851 ps_stk3332: proximity@47 { 852 compatible = "ps_stk3332"; 853 status = "okay"; 854 reg = <0x47>; 855 type = <SENSOR_TYPE_PROXIMITY>; 856 //pinctrl-names = "default"; 857 //pinctrl-0 = <&gpio2_b2>; 858 //irq-gpio = <&gpio2 RK_PB2 IRQ_TYPE_LEVEL_LOW>; 859 //irq_enable = <1>; 860 ps_threshold_high = <0x200>; 861 ps_threshold_low = <0x100>; 862 ps_ctrl_gain = <3>; /* 0:x1 1:x2 2:x5 3:x8 */ 863 ps_led_current = <4>; /* 0:3.125mA 1:6.25mA 2:12.5mA 3:25mA 4:50mA 5:100mA*/ 864 poll_delay_ms = <100>; 865 }; 866 867 mpu6500_acc: mpu_acc@68 { 868 compatible = "mpu6500_acc"; 869 status = "okay"; 870 reg = <0x68>; 871 irq-gpio = <&gpio2 RK_PB5 IRQ_TYPE_EDGE_RISING>; 872 irq_enable = <0>; 873 poll_delay_ms = <30>; 874 type = <SENSOR_TYPE_ACCEL>; 875 layout = <9>; 876 }; 877 878 mpu6500_gyro: mpu_gyro@68 { 879 compatible = "mpu6500_gyro"; 880 status = "okay"; 881 reg = <0x68>; 882 irq_enable = <0>; 883 poll_delay_ms = <30>; 884 type = <SENSOR_TYPE_GYROSCOPE>; 885 layout = <9>; 886 }; 887}; 888 889&i2c2 { 890 status = "okay"; 891 892 usbc0: fusb302@22 { 893 compatible = "fcs,fusb302"; 894 reg = <0x22>; 895 interrupt-parent = <&gpio0>; 896 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 897 pinctrl-names = "default"; 898 pinctrl-0 = <&usbc0_int>; 899 vbus-supply = <&vbus5v0_typec>; 900 status = "okay"; 901 902 ports { 903 #address-cells = <1>; 904 #size-cells = <0>; 905 906 port@0 { 907 reg = <0>; 908 usbc0_role_sw: endpoint@0 { 909 remote-endpoint = <&dwc3_0_role_switch>; 910 }; 911 }; 912 }; 913 914 usb_con: connector { 915 compatible = "usb-c-connector"; 916 label = "USB-C"; 917 data-role = "dual"; 918 power-role = "dual"; 919 try-power-role = "sink"; 920 op-sink-microwatt = <1000000>; 921 sink-pdos = 922 <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>; 923 source-pdos = 924 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 925 926 altmodes { 927 #address-cells = <1>; 928 #size-cells = <0>; 929 930 altmode@0 { 931 reg = <0>; 932 svid = <0xff01>; 933 vdo = <0xffffffff>; 934 }; 935 }; 936 937 ports { 938 #address-cells = <1>; 939 #size-cells = <0>; 940 941 port@0 { 942 reg = <0>; 943 usbc0_orien_sw: endpoint { 944 remote-endpoint = <&usbdp_phy0_orientation_switch>; 945 }; 946 }; 947 948 port@1 { 949 reg = <1>; 950 dp_altmode_mux: endpoint { 951 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 952 }; 953 }; 954 955 }; 956 }; 957 }; 958 959 hym8563: hym8563@51 { 960 compatible = "haoyu,hym8563"; 961 reg = <0x51>; 962 #clock-cells = <0>; 963 clock-frequency = <32768>; 964 clock-output-names = "hym8563"; 965 pinctrl-names = "default"; 966 pinctrl-0 = <&hym8563_int>; 967 interrupt-parent = <&gpio0>; 968 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 969 wakeup-source; 970 }; 971}; 972 973&i2c5 { 974 status = "okay"; 975 pinctrl-names = "default"; 976 pinctrl-0 = <&i2c5m4_xfer>; 977 978 gt1x: gt1x@14 { 979 compatible = "goodix,gt1x"; 980 reg = <0x14>; 981 pinctrl-names = "default"; 982 pinctrl-0 = <&touch_gpio>; 983 goodix,rst-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 984 goodix,irq-gpio = <&gpio4 RK_PB1 IRQ_TYPE_LEVEL_LOW>; 985 power-supply = <&vcc3v3_lcd_n>; 986 }; 987}; 988 989&i2c7 { 990 status = "okay"; 991 992 es8388: es8388@11 { 993 status = "okay"; 994 #sound-dai-cells = <0>; 995 compatible = "everest,es8388", "everest,es8323"; 996 reg = <0x11>; 997 clocks = <&mclkout_i2s0>; 998 clock-names = "mclk"; 999 assigned-clocks = <&mclkout_i2s0>; 1000 assigned-clock-rates = <12288000>; 1001 pinctrl-names = "default"; 1002 pinctrl-0 = <&i2s0_mclk>; 1003 }; 1004 1005 es7202: es7202@32 { 1006 status = "okay"; 1007 #sound-dai-cells = <0>; 1008 compatible = "ES7202_PDM_ADC_1"; 1009 power-supply = <&vcc_1v8_s0>; /* only 1v8 or 3v3, default is 3v3 */ 1010 reg = <0x32>; 1011 }; 1012}; 1013 1014&i2s6_8ch { 1015 status = "okay"; 1016}; 1017 1018&mipi_dcphy0 { 1019 status = "okay"; 1020}; 1021 1022 1023&mipi_dcphy1 { 1024 status = "disabled"; 1025}; 1026 1027&pcie2x1l1 { 1028 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 1029 pinctrl-names = "default"; 1030 pinctrl-0 = <&rtl8111_isolate>; 1031 status = "okay"; 1032}; 1033 1034&pcie2x1l2 { 1035 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 1036 rockchip,skip-scan-in-resume; 1037 status = "okay"; 1038}; 1039 1040&pcie30phy { 1041 status = "okay"; 1042}; 1043 1044&pcie3x4 { 1045 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 1046 vpcie3v3-supply = <&vcc3v3_pcie30>; 1047 pinctrl-names = "default"; 1048 pinctrl-0 = <&pcie30x4_clkreqn_m1>; 1049 status = "okay"; 1050}; 1051 1052&pdm0 { 1053 status = "okay"; 1054 pinctrl-names = "default"; 1055 pinctrl-0 = <&pdm0m0_clk 1056 &pdm0m0_sdi0>; 1057}; 1058 1059&pinctrl { 1060 headphone { 1061 hp_det: hp-det { 1062 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1063 }; 1064 }; 1065 1066 hym8563 { 1067 hym8563_int: hym8563-int { 1068 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 1069 }; 1070 }; 1071 1072 lcd { 1073 lcd_rst_gpio: lcd-rst-gpio { 1074 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 1075 }; 1076 }; 1077 1078 pcie30x4 { 1079 pcie30x4_clkreqn_m1: pcie30x4-clkreqn-m1 { 1080 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 1081 }; 1082 }; 1083 1084 rtl8111 { 1085 rtl8111_isolate: rtl8111-isolate { 1086 rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 1087 }; 1088 }; 1089 1090 sensor { 1091 mh248_irq_gpio: mh248-irq-gpio { 1092 rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 1093 }; 1094 1095 mpu6500_irq_gpio: mpu6500_irq_gpio { 1096 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1097 }; 1098 }; 1099 1100 touch { 1101 touch_gpio: touch-gpio { 1102 rockchip,pins = 1103 <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, 1104 <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1105 }; 1106 }; 1107 1108 usb { 1109 vcc5v0_host_en: vcc5v0-host-en { 1110 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 1111 }; 1112 }; 1113 1114 usb-typec { 1115 usbc0_int: usbc0-int { 1116 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 1117 }; 1118 1119 typec5v_pwren: typec5v-pwren { 1120 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1121 }; 1122 }; 1123 1124 wireless-bluetooth { 1125 uart8_gpios: uart8-gpios { 1126 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1127 }; 1128 }; 1129 1130 wireless-wlan { 1131 wifi_host_wake_irq: wifi-host-wake-irq { 1132 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 1133 }; 1134 1135 wifi_poweren_gpio: wifi-poweren-gpio { 1136 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 1137 }; 1138 }; 1139}; 1140 1141&pwm6 { 1142 pinctrl-0 = <&pwm6m1_pins>; 1143 status = "okay"; 1144}; 1145 1146&pwm15 { 1147 pinctrl-0 = <&pwm15m1_pins>; 1148 status = "okay"; 1149}; 1150 1151&route_dsi0 { 1152 status = "okay"; 1153 connect = <&vp3_out_dsi0>; 1154}; 1155 1156&route_dsi1 { 1157 status = "disabled"; 1158 connect = <&vp3_out_dsi1>; 1159}; 1160 1161&sata1 { 1162 status = "okay"; 1163}; 1164 1165&sdmmc { 1166 status = "okay"; 1167 vmmc-supply = <&vcc_3v3_sd_s0>; 1168}; 1169 1170&spdif_tx5 { 1171 status = "okay"; 1172}; 1173 1174&u2phy0_otg { 1175 rockchip,typec-vbus-det; 1176}; 1177 1178&u2phy1_otg { 1179 phy-supply = <&vcc5v0_host>; 1180}; 1181 1182&u2phy2_host { 1183 phy-supply = <&vcc5v0_host>; 1184}; 1185 1186&u2phy3_host { 1187 phy-supply = <&vcc5v0_host>; 1188}; 1189 1190&uart8 { 1191 status = "okay"; 1192 pinctrl-names = "default"; 1193 pinctrl-0 = <&uart8m1_xfer &uart8m1_ctsn>; 1194}; 1195 1196&usbdp_phy0 { 1197 orientation-switch; 1198 svid = <0xff01>; 1199 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 1200 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 1201 1202 port { 1203 #address-cells = <1>; 1204 #size-cells = <0>; 1205 usbdp_phy0_orientation_switch: endpoint@0 { 1206 reg = <0>; 1207 remote-endpoint = <&usbc0_orien_sw>; 1208 }; 1209 1210 usbdp_phy0_dp_altmode_mux: endpoint@1 { 1211 reg = <1>; 1212 remote-endpoint = <&dp_altmode_mux>; 1213 }; 1214 }; 1215}; 1216 1217&usbdp_phy1 { 1218 rockchip,dp-lane-mux = <2 3>; 1219}; 1220 1221&usbdrd_dwc3_0 { 1222 dr_mode = "otg"; 1223 usb-role-switch; 1224 port { 1225 #address-cells = <1>; 1226 #size-cells = <0>; 1227 dwc3_0_role_switch: endpoint@0 { 1228 reg = <0>; 1229 remote-endpoint = <&usbc0_role_sw>; 1230 }; 1231 }; 1232}; 1233 1234&usbhost3_0 { 1235 status = "disabled"; 1236}; 1237 1238&usbhost_dwc3_0 { 1239 status = "disabled"; 1240}; 1241