1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include "rk3588-evb1-lp4.dtsi" 10#include "rk3588-ipc.dtsi" 11#include "rk3588-evb1-cam-6x.dtsi" 12 13/ { 14 model = "Rockchip RK3588 EVB1 LP4 V10 Board"; 15 compatible = "rockchip,rk3588-evb1-lp4-v10", "rockchip,rk3588"; 16}; 17 18&backlight { 19 status = "disabled"; 20}; 21 22&combphy0_ps { 23 status = "disabled"; 24}; 25 26&combphy1_ps { 27 status = "disabled"; 28}; 29 30&combphy2_psu { 31 status = "disabled"; 32}; 33 34&dp0 { 35 status = "disabled"; 36}; 37 38&dp0_in_vp2 { 39 status = "disabled"; 40}; 41 42&dp1 { 43 status = "disabled"; 44}; 45 46&dp1_in_vp2 { 47 status = "disabled"; 48}; 49 50&dsi0 { 51 status = "disabled"; 52}; 53 54&dsi0_in_vp3 { 55 status = "disabled"; 56}; 57 58&dsi0_panel { 59 status = "disabled"; 60}; 61 62&dsi1_panel { 63 status = "disabled"; 64}; 65 66>1x { 67 status = "disabled"; 68}; 69 70&hdmi1 { 71 status = "disabled"; 72}; 73 74&hdmi1_in_vp1 { 75 status = "disabled"; 76}; 77 78&hdmi1_sound { 79 status = "disabled"; 80}; 81 82&hdptxphy_hdmi1 { 83 status = "disabled"; 84}; 85 86&i2c6 { 87 status = "disabled"; 88}; 89 90&i2s5_8ch { 91 status = "disabled"; 92}; 93 94&i2s6_8ch { 95 status = "disabled"; 96}; 97 98&jpegd { 99 status = "disabled"; 100}; 101 102&jpegd_mmu { 103 status = "disabled"; 104}; 105 106&leds { 107 status = "disabled"; 108}; 109 110&pcie2x1l0 { 111 status = "disabled"; 112}; 113 114&pcie2x1l1 { 115 status = "disabled"; 116}; 117 118&pcie30phy { 119 status = "disabled"; 120}; 121 122&pcie3x4 { 123 status = "disabled"; 124}; 125 126&pwm2 { 127 status = "disabled"; 128}; 129 130&rkvdec0 { 131 status = "disabled"; 132}; 133 134&rkvdec0_mmu { 135 status = "disabled"; 136}; 137 138&rkvdec1_mmu { 139 status = "disabled"; 140}; 141 142&rkvdec_ccu { 143 status = "disabled"; 144}; 145 146&rk_headset { 147 status = "disabled"; 148}; 149 150&sata0 { 151 status = "disabled"; 152}; 153 154&uart8 { 155 status = "disabled"; 156}; 157 158&usbdp_phy1 { 159 status = "disabled"; 160}; 161 162&usbdp_phy1_dp { 163 status = "disabled"; 164}; 165 166&usbdp_phy1_u3 { 167 status = "disabled"; 168}; 169 170&usbdrd3_1 { 171 status = "disabled"; 172}; 173 174&usbdrd_dwc3_1 { 175 status = "disabled"; 176}; 177 178&usb_host0_ehci { 179 status = "disabled"; 180}; 181 182&usb_host0_ohci { 183 status = "disabled"; 184}; 185 186&usb_host1_ehci { 187 status = "disabled"; 188}; 189 190&usb_host1_ohci { 191 status = "disabled"; 192}; 193 194&u2phy1 { 195 status = "disabled"; 196}; 197 198&u2phy1_otg { 199 status = "disabled"; 200}; 201 202&u2phy2 { 203 status = "disabled"; 204}; 205 206&u2phy2_host { 207 status = "disabled"; 208}; 209 210&u2phy3 { 211 status = "disabled"; 212}; 213 214&u2phy3_host { 215 status = "disabled"; 216}; 217 218&vdpu { 219 status = "disabled"; 220}; 221 222&vdpu_mmu { 223 status = "disabled"; 224}; 225 226&wireless_bluetooth { 227 status = "disabled"; 228}; 229 230&wireless_wlan { 231 status = "disabled"; 232}; 233