1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "rk3568-evb6-ddr3-v10.dtsi" 7*4882a593Smuzhiyun#include "rk3568-android.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun&dsi0 { 10*4882a593Smuzhiyun status = "disabled"; 11*4882a593Smuzhiyun}; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun&i2c3 { 14*4882a593Smuzhiyun clock-frequency = <400000>; 15*4882a593Smuzhiyun status = "okay"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun rk628: rk628@50 { 18*4882a593Smuzhiyun reg = <0x50>; 19*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 20*4882a593Smuzhiyun interrupts = <RK_PA0 IRQ_TYPE_LEVEL_HIGH>; 21*4882a593Smuzhiyun enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 22*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; 23*4882a593Smuzhiyun status = "okay"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun}; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun&video_phy0 { 28*4882a593Smuzhiyun status = "disabled"; 29*4882a593Smuzhiyun}; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun#include <arm/rk628.dtsi> 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&rk628_hdmi { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun ports { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <0>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun port@0 { 41*4882a593Smuzhiyun reg = <0>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun hdmi_in_post_process: endpoint { 44*4882a593Smuzhiyun remote-endpoint = <&post_process_out_hdmi>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&rk628_post_process { 51*4882a593Smuzhiyun pinctrl-names = "default"; 52*4882a593Smuzhiyun pinctrl-0 = <&rk628_vop_pins>; 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun mode-sync-pol = <0>; 56*4882a593Smuzhiyun ports { 57*4882a593Smuzhiyun #address-cells = <1>; 58*4882a593Smuzhiyun #size-cells = <0>; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun port@0 { 61*4882a593Smuzhiyun reg = <0>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun post_process_in_bt1120: endpoint { 64*4882a593Smuzhiyun remote-endpoint = <&bt1120_out_post_process>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun port@1 { 69*4882a593Smuzhiyun reg = <1>; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun post_process_out_hdmi: endpoint { 72*4882a593Smuzhiyun remote-endpoint = <&hdmi_in_post_process>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun&rk628_bt1120_rx { 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun ports { 82*4882a593Smuzhiyun #address-cells = <1>; 83*4882a593Smuzhiyun #size-cells = <0>; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun port@0 { 86*4882a593Smuzhiyun reg = <0>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun bt1120_in_rgb: endpoint { 89*4882a593Smuzhiyun remote-endpoint = <&rgb_out_bt1120>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun port@1 { 94*4882a593Smuzhiyun reg = <1>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun bt1120_out_post_process: endpoint { 97*4882a593Smuzhiyun remote-endpoint = <&post_process_in_bt1120>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&rgb { 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun pinctrl-names = "default"; 106*4882a593Smuzhiyun pinctrl-0 = <&bt1120_pins>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun ports { 109*4882a593Smuzhiyun port@1 { 110*4882a593Smuzhiyun reg = <1>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun rgb_out_bt1120: endpoint { 113*4882a593Smuzhiyun remote-endpoint = <&bt1120_in_rgb>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun}; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun&rgb_in_vp2 { 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun}; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun&vcc3v3_lcd1_n { 124*4882a593Smuzhiyun status = "disabled"; 125*4882a593Smuzhiyun gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 126*4882a593Smuzhiyun enable-active-high; 127*4882a593Smuzhiyun}; 128