xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-dual-camera.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun&csi2_dphy_hw {
8*4882a593Smuzhiyun	status = "okay";
9*4882a593Smuzhiyun};
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/*
12*4882a593Smuzhiyun * csi2_dphy1 & csi2_dphy2 used for split mode,
13*4882a593Smuzhiyun * csi2_dphy0 used for full mode,
14*4882a593Smuzhiyun * full mode and split mode are mutually exclusive
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun&csi2_dphy0 {
17*4882a593Smuzhiyun	status = "disabled";
18*4882a593Smuzhiyun	/delete-node/ ports;
19*4882a593Smuzhiyun};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun&csi2_dphy1 {
22*4882a593Smuzhiyun	status = "okay";
23*4882a593Smuzhiyun	/*
24*4882a593Smuzhiyun	 * dphy1 only used for split mode,
25*4882a593Smuzhiyun	 * can be used  concurrently  with dphy2
26*4882a593Smuzhiyun	 * full mode and split mode are mutually exclusive
27*4882a593Smuzhiyun	 */
28*4882a593Smuzhiyun	ports {
29*4882a593Smuzhiyun		#address-cells = <1>;
30*4882a593Smuzhiyun		#size-cells = <0>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		port@0 {
33*4882a593Smuzhiyun			reg = <0>;
34*4882a593Smuzhiyun			#address-cells = <1>;
35*4882a593Smuzhiyun			#size-cells = <0>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun			mipi_in_gc2093_rgb: endpoint@2 {
38*4882a593Smuzhiyun				reg = <2>;
39*4882a593Smuzhiyun				remote-endpoint = <&gc2093_out>;
40*4882a593Smuzhiyun				data-lanes = <1 2>;
41*4882a593Smuzhiyun			};
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		port@1 {
45*4882a593Smuzhiyun			reg = <1>;
46*4882a593Smuzhiyun			#address-cells = <1>;
47*4882a593Smuzhiyun			#size-cells = <0>;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun			dphy1_out: endpoint@1 {
50*4882a593Smuzhiyun				reg = <1>;
51*4882a593Smuzhiyun				remote-endpoint = <&mipi_csi2_input>;
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&csi2_dphy2 {
58*4882a593Smuzhiyun	status = "okay";
59*4882a593Smuzhiyun	/*
60*4882a593Smuzhiyun	 * dphy2 only used for split mode,
61*4882a593Smuzhiyun	 * can be used  concurrently  with dphy1
62*4882a593Smuzhiyun	 * full mode and split mode are mutually exclusive
63*4882a593Smuzhiyun	 */
64*4882a593Smuzhiyun	ports {
65*4882a593Smuzhiyun		#address-cells = <1>;
66*4882a593Smuzhiyun		#size-cells = <0>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		port@0 {
69*4882a593Smuzhiyun			reg = <0>;
70*4882a593Smuzhiyun			#address-cells = <1>;
71*4882a593Smuzhiyun			#size-cells = <0>;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun			mipi_in_gc2053_ir: endpoint@1 {
74*4882a593Smuzhiyun				reg = <1>;
75*4882a593Smuzhiyun				remote-endpoint = <&gc2053_out>;
76*4882a593Smuzhiyun				data-lanes = <1 2>;
77*4882a593Smuzhiyun			};
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		port@1 {
81*4882a593Smuzhiyun			reg = <1>;
82*4882a593Smuzhiyun			#address-cells = <1>;
83*4882a593Smuzhiyun			#size-cells = <0>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun			dphy2_out: endpoint@1 {
86*4882a593Smuzhiyun				reg = <1>;
87*4882a593Smuzhiyun				remote-endpoint = <&isp_in1>;
88*4882a593Smuzhiyun			};
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&mipi_csi2 {
94*4882a593Smuzhiyun	status = "okay";
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	ports {
97*4882a593Smuzhiyun		#address-cells = <1>;
98*4882a593Smuzhiyun		#size-cells = <0>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		port@0 {
101*4882a593Smuzhiyun			reg = <0>;
102*4882a593Smuzhiyun			#address-cells = <1>;
103*4882a593Smuzhiyun			#size-cells = <0>;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun			mipi_csi2_input: endpoint@1 {
106*4882a593Smuzhiyun				reg = <1>;
107*4882a593Smuzhiyun				remote-endpoint = <&dphy1_out>;
108*4882a593Smuzhiyun				data-lanes = <1 2>;
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		port@1 {
113*4882a593Smuzhiyun			reg = <1>;
114*4882a593Smuzhiyun			#address-cells = <1>;
115*4882a593Smuzhiyun			#size-cells = <0>;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun			mipi_csi2_output: endpoint@0 {
118*4882a593Smuzhiyun				reg = <0>;
119*4882a593Smuzhiyun				remote-endpoint = <&cif_mipi_in>;
120*4882a593Smuzhiyun				data-lanes = <1 2>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun		};
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&i2c4 {
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	/delete-node/ gc8034@37;
130*4882a593Smuzhiyun	/delete-node/ os04a10@36;
131*4882a593Smuzhiyun	/delete-node/ ov5695@36;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	gc2053: gc2053@37 {
134*4882a593Smuzhiyun		status = "okay";
135*4882a593Smuzhiyun		compatible = "galaxycore,gc2053";
136*4882a593Smuzhiyun		reg = <0x37>;
137*4882a593Smuzhiyun		clocks = <&pmucru CLK_WIFI>;
138*4882a593Smuzhiyun		clock-names = "xvclk";
139*4882a593Smuzhiyun		power-domains = <&power RK3568_PD_VI>;
140*4882a593Smuzhiyun		pinctrl-names = "default";
141*4882a593Smuzhiyun		pinctrl-0 = <&refclk_pins>;
142*4882a593Smuzhiyun		reset-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
143*4882a593Smuzhiyun		pwdn-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
144*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
145*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
146*4882a593Smuzhiyun		rockchip,camera-module-name = "DW-RV2093-V1.0";
147*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "JZ-7070AS-A3";
148*4882a593Smuzhiyun		port {
149*4882a593Smuzhiyun			gc2053_out: endpoint {
150*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_gc2053_ir>;
151*4882a593Smuzhiyun				data-lanes = <1 2>;
152*4882a593Smuzhiyun			};
153*4882a593Smuzhiyun		};
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	gc2093: gc2093@7e {
157*4882a593Smuzhiyun		status = "okay";
158*4882a593Smuzhiyun		compatible = "galaxycore,gc2093";
159*4882a593Smuzhiyun		reg = <0x7e>;
160*4882a593Smuzhiyun		clocks = <&cru CLK_CIF_OUT>;
161*4882a593Smuzhiyun		clock-names = "xvclk";
162*4882a593Smuzhiyun		power-domains = <&power RK3568_PD_VI>;
163*4882a593Smuzhiyun		pinctrl-names = "default";
164*4882a593Smuzhiyun		pinctrl-0 = <&cif_clk>;
165*4882a593Smuzhiyun		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
166*4882a593Smuzhiyun		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
167*4882a593Smuzhiyun		rockchip,camera-module-index = <0>;
168*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
169*4882a593Smuzhiyun		rockchip,camera-module-name = "DW-RV2093-V1.0";
170*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "JZ-7070AS-A1";
171*4882a593Smuzhiyun		port {
172*4882a593Smuzhiyun			gc2093_out: endpoint {
173*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_gc2093_rgb>;
174*4882a593Smuzhiyun				data-lanes = <1 2>;
175*4882a593Smuzhiyun			};
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun&rkcif {
181*4882a593Smuzhiyun	status = "okay";
182*4882a593Smuzhiyun};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun&rkcif_mipi_lvds {
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	port {
188*4882a593Smuzhiyun		cif_mipi_in: endpoint {
189*4882a593Smuzhiyun			remote-endpoint = <&mipi_csi2_output>;
190*4882a593Smuzhiyun			data-lanes = <1 2>;
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf {
196*4882a593Smuzhiyun	status = "okay";
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	port {
199*4882a593Smuzhiyun		mipi_lvds_sditf: endpoint {
200*4882a593Smuzhiyun			remote-endpoint = <&isp_in2>;
201*4882a593Smuzhiyun			data-lanes = <1 2>;
202*4882a593Smuzhiyun		 };
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun&rkcif_mmu {
207*4882a593Smuzhiyun	status = "okay";
208*4882a593Smuzhiyun};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&rkisp {
212*4882a593Smuzhiyun	status = "okay";
213*4882a593Smuzhiyun	max-input = <3840 2160 30>;
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&rkisp_mmu {
217*4882a593Smuzhiyun	status = "okay";
218*4882a593Smuzhiyun};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun&rkisp_vir0 {
221*4882a593Smuzhiyun	status = "okay";
222*4882a593Smuzhiyun	/* gc2053-ir->dphy2->isp_vir0 */
223*4882a593Smuzhiyun	port {
224*4882a593Smuzhiyun		#address-cells = <1>;
225*4882a593Smuzhiyun		#size-cells = <0>;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun		isp_in1: endpoint@0 {
228*4882a593Smuzhiyun			reg = <0>;
229*4882a593Smuzhiyun			remote-endpoint = <&dphy2_out>;
230*4882a593Smuzhiyun		};
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun&rkisp_vir1 {
235*4882a593Smuzhiyun	status = "okay";
236*4882a593Smuzhiyun	/* gc2093-rgb->dphy1->csi2->vicap */
237*4882a593Smuzhiyun	/* vicap sditf->isp_vir1 */
238*4882a593Smuzhiyun	port {
239*4882a593Smuzhiyun		#address-cells = <1>;
240*4882a593Smuzhiyun		#size-cells = <0>;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun		isp_in2: endpoint@0 {
243*4882a593Smuzhiyun			reg = <0>;
244*4882a593Smuzhiyun			remote-endpoint = <&mipi_lvds_sditf>;
245*4882a593Smuzhiyun		};
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun};
248