xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3568-android.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	chosen: chosen {
9*4882a593Smuzhiyun		bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0";
10*4882a593Smuzhiyun	};
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	aliases {
13*4882a593Smuzhiyun		mmc0 = &sdmmc0;
14*4882a593Smuzhiyun		mmc1 = &sdmmc1;
15*4882a593Smuzhiyun		mmc2 = &sdhci;
16*4882a593Smuzhiyun		mmc3 = &sdmmc2;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	fiq-debugger {
20*4882a593Smuzhiyun		compatible = "rockchip,fiq-debugger";
21*4882a593Smuzhiyun		rockchip,serial-id = <2>;
22*4882a593Smuzhiyun		rockchip,wake-irq = <0>;
23*4882a593Smuzhiyun		/* If enable uart uses irq instead of fiq */
24*4882a593Smuzhiyun		rockchip,irq-mode-enable = <1>;
25*4882a593Smuzhiyun		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
26*4882a593Smuzhiyun		interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
27*4882a593Smuzhiyun		pinctrl-names = "default";
28*4882a593Smuzhiyun		pinctrl-0 = <&uart2m0_xfer>;
29*4882a593Smuzhiyun		status = "okay";
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	firmware {
33*4882a593Smuzhiyun		optee: optee {
34*4882a593Smuzhiyun			compatible = "linaro,optee-tz";
35*4882a593Smuzhiyun			method = "smc";
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	debug: debug@fd904000 {
40*4882a593Smuzhiyun		compatible = "rockchip,debug";
41*4882a593Smuzhiyun		reg = <0x0 0xfd904000 0x0 0x1000>,
42*4882a593Smuzhiyun			<0x0 0xfd905000 0x0 0x1000>,
43*4882a593Smuzhiyun			<0x0 0xfd906000 0x0 0x1000>,
44*4882a593Smuzhiyun			<0x0 0xfd907000 0x0 0x1000>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	cspmu: cspmu@fd90c000 {
48*4882a593Smuzhiyun		compatible = "rockchip,cspmu";
49*4882a593Smuzhiyun		reg = <0x0 0xfd90c000 0x0 0x1000>,
50*4882a593Smuzhiyun			<0x0 0xfd90d000 0x0 0x1000>,
51*4882a593Smuzhiyun			<0x0 0xfd90e000 0x0 0x1000>,
52*4882a593Smuzhiyun			<0x0 0xfd90f000 0x0 0x1000>;
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	vendor_storage: vendor-storage {
56*4882a593Smuzhiyun		compatible = "rockchip,ram-vendor-storage";
57*4882a593Smuzhiyun		memory-region = <&vendor_storage_rm>;
58*4882a593Smuzhiyun		status = "okay";
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun&reserved_memory {
63*4882a593Smuzhiyun	linux,cma {
64*4882a593Smuzhiyun		compatible = "shared-dma-pool";
65*4882a593Smuzhiyun		inactive;
66*4882a593Smuzhiyun		reusable;
67*4882a593Smuzhiyun		reg = <0x0 0x10000000 0x0 0x00800000>;
68*4882a593Smuzhiyun		linux,cma-default;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	ramoops: ramoops@110000 {
72*4882a593Smuzhiyun		compatible = "ramoops";
73*4882a593Smuzhiyun		reg = <0x0 0x110000 0x0 0xf0000>;
74*4882a593Smuzhiyun		record-size = <0x20000>;
75*4882a593Smuzhiyun		console-size = <0x80000>;
76*4882a593Smuzhiyun		ftrace-size = <0x00000>;
77*4882a593Smuzhiyun		pmsg-size = <0x50000>;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	vendor_storage_rm: vendor-storage-rm@00000000 {
81*4882a593Smuzhiyun		compatible = "rockchip,vendor-storage-rm";
82*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x0>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun&rng {
87*4882a593Smuzhiyun	status = "okay";
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&rockchip_suspend {
91*4882a593Smuzhiyun	status = "okay";
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&vop {
95*4882a593Smuzhiyun	support-multi-area;
96*4882a593Smuzhiyun};
97