1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6#include "rk3568.dtsi" 7 8/ { 9 aliases { 10 /delete-property/ ethernet0; 11 }; 12}; 13 14&cpu0_opp_table { 15 /delete-node/ opp-1992000000; 16}; 17 18&lpddr4_params { 19 /* freq info, freq_0 is final frequency, unit: MHz */ 20 freq_0 = <1056>; 21}; 22 23&lpddr4x_params { 24 /* freq info, freq_0 is final frequency, unit: MHz */ 25 freq_0 = <1056>; 26}; 27 28&power { 29 pd_pipe@RK3568_PD_PIPE { 30 reg = <RK3568_PD_PIPE>; 31 clocks = <&cru PCLK_PIPE>; 32 pm_qos = <&qos_pcie2x1>, 33 <&qos_sata1>, 34 <&qos_sata2>, 35 <&qos_usb3_0>, 36 <&qos_usb3_1>; 37 }; 38}; 39 40&rkisp { 41 rockchip,iq-feature = /bits/ 64 <0x1BFBF7FE67FF>; 42}; 43 44&usbdrd_dwc3 { 45 phys = <&u2phy0_otg>; 46 phy-names = "usb2-phy"; 47 extcon = <&usb2phy0>; 48 maximum-speed = "high-speed"; 49 snps,dis_u2_susphy_quirk; 50 snps,usb2-lpm-disable; 51}; 52 53/delete-node/ &combphy0_us; 54/delete-node/ &gmac0_clkin; 55/delete-node/ &gmac0_xpcsclk; 56/delete-node/ &gmac0; 57/delete-node/ &gmac_uio0; 58/delete-node/ &pcie30_phy_grf; 59/delete-node/ &pcie30phy; 60/delete-node/ &pcie3x1; 61/delete-node/ &pcie3x2; 62/delete-node/ &qos_pcie3x1; 63/delete-node/ &qos_pcie3x2; 64/delete-node/ &qos_sata0; 65/delete-node/ &sata0; 66