1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "rk3566.dtsi" 15#include "rk3568-android.dtsi" 16 17/ { 18 model = "Rockchip RK3566 RK817 TABLET LP4X Board"; 19 compatible = "rockchip,rk3566-rk817-tablet", "rockchip,rk3566"; 20 21 adc_keys: adc-keys { 22 compatible = "adc-keys"; 23 io-channels = <&saradc 0>; 24 io-channel-names = "buttons"; 25 keyup-threshold-microvolt = <1800000>; 26 poll-interval = <100>; 27 28 vol-up-key { 29 label = "volume up"; 30 linux,code = <KEY_VOLUMEUP>; 31 press-threshold-microvolt = <1750>; 32 }; 33 34 vol-down-key { 35 label = "volume down"; 36 linux,code = <KEY_VOLUMEDOWN>; 37 press-threshold-microvolt = <297500>; 38 }; 39 }; 40 41 backlight: backlight { 42 compatible = "pwm-backlight"; 43 pwms = <&pwm4 0 25000 0>; 44 brightness-levels = < 45 0 20 20 21 21 22 22 23 46 23 24 24 25 25 26 26 27 47 27 28 28 29 29 30 30 31 48 31 32 32 33 33 34 34 35 49 35 36 36 37 37 38 38 39 50 40 41 42 43 44 45 46 47 51 48 49 50 50 51 52 53 54 52 55 55 56 57 58 59 60 61 53 62 63 64 64 65 65 66 67 54 68 69 70 71 71 72 73 74 55 75 76 77 78 79 79 80 81 56 82 83 84 85 86 86 87 88 57 89 90 91 92 93 94 94 95 58 96 97 98 99 100 101 101 102 59 103 104 105 106 107 107 108 109 60 110 111 112 113 114 115 115 116 61 117 118 119 120 121 122 123 123 62 124 125 126 127 128 129 130 130 63 131 132 133 134 135 136 136 137 64 138 139 140 141 142 143 143 144 65 145 146 147 147 148 149 150 151 66 152 153 154 155 156 156 157 158 67 159 157 158 159 160 161 162 162 68 163 164 165 166 167 168 169 169 69 170 171 172 173 174 175 175 176 70 177 178 179 180 181 182 182 183 71 184 185 186 187 188 189 190 190 72 191 192 193 194 195 196 197 197 73 198 199 200 201 202 203 204 204 74 205 206 207 208 209 209 210 211 75 212 213 213 214 214 215 215 216 76 216 217 217 218 218 219 219 220 77 >; 78 default-brightness-level = <200>; 79 }; 80 81 charge-animation { 82 compatible = "rockchip,uboot-charge"; 83 rockchip,uboot-charge-on = <1>; 84 rockchip,android-charge-on = <0>; 85 rockchip,uboot-low-power-voltage = <3350>; 86 rockchip,screen-on-voltage = <3400>; 87 status = "okay"; 88 }; 89 90 flash_rgb13h: flash-rgb13h { 91 status = "okay"; 92 compatible = "led,rgb13h"; 93 label = "gpio-flash"; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&flash_led_gpios>; 96 led-max-microamp = <20000>; 97 flash-max-microamp = <20000>; 98 flash-max-timeout-us = <1000000>; 99 enable-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; 100 rockchip,camera-module-index = <0>; 101 rockchip,camera-module-facing = "back"; 102 }; 103 104 hdmi_sound: hdmi-sound { 105 compatible = "simple-audio-card"; 106 simple-audio-card,format = "i2s"; 107 simple-audio-card,mclk-fs = <128>; 108 simple-audio-card,name = "rockchip,hdmi"; 109 status = "okay"; 110 111 simple-audio-card,cpu { 112 sound-dai = <&i2s0_8ch>; 113 }; 114 simple-audio-card,codec { 115 sound-dai = <&hdmi>; 116 }; 117 }; 118 119 vccsys: vccsys { 120 compatible = "regulator-fixed"; 121 regulator-name = "vcc3v8_sys"; 122 regulator-always-on; 123 regulator-boot-on; 124 regulator-min-microvolt = <3800000>; 125 regulator-max-microvolt = <3800000>; 126 }; 127 128 vcc_camera: vcc-camera-regulator { 129 compatible = "regulator-fixed"; 130 gpio = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&camera_rst>; 133 regulator-name = "vcc_camera"; 134 enable-active-high; 135 regulator-always-on; 136 regulator-boot-on; 137 }; 138 139 rk817-sound { 140 compatible = "rockchip,multicodecs-card"; 141 rockchip,card-name = "rockchip-rk817"; 142 hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 143 io-channels = <&saradc 2>; 144 io-channel-names = "adc-detect"; 145 keyup-threshold-microvolt = <1800000>; 146 poll-interval = <100>; 147 rockchip,format = "i2s"; 148 rockchip,mclk-fs = <256>; 149 rockchip,cpu = <&i2s1_8ch>; 150 rockchip,codec = <&rk817_codec>; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&hp_det>; 153 play-pause-key { 154 label = "playpause"; 155 linux,code = <KEY_PLAYPAUSE>; 156 press-threshold-microvolt = <2000>; 157 }; 158 }; 159 160 sdio_pwrseq: sdio-pwrseq { 161 compatible = "mmc-pwrseq-simple"; 162 clocks = <&rk817 1>; 163 clock-names = "ext_clock"; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&wifi_enable_h>; 166 167 /* 168 * On the module itself this is one of these (depending 169 * on the actual card populated): 170 * - SDIO_RESET_L_WL_REG_ON 171 * - PDN (power down when low) 172 */ 173 post-power-on-delay-ms = <200>; 174 reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 175 }; 176 177 vcc_sd: vcc-sd { 178 compatible = "regulator-gpio"; 179 enable-active-low; 180 enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 181 regulator-min-microvolt = <3300000>; 182 regulator-max-microvolt = <3300000>; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&vcc_sd_h>; 185 regulator-name = "vcc_sd"; 186 states = <3300000 0x0 187 3300000 0x1>; 188 }; 189 190 wireless-wlan { 191 compatible = "wlan-platdata"; 192 rockchip,grf = <&grf>; 193 wifi_chip_type = "ap6255"; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&wifi_host_wake_irq>; 196 WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; 197 WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 198 status = "okay"; 199 }; 200 201 wireless-bluetooth { 202 compatible = "bluetooth-platdata"; 203 clocks = <&rk817 1>; 204 clock-names = "ext_clock"; 205 //wifi-bt-power-toggle; 206 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 207 pinctrl-names = "default", "rts_gpio"; 208 pinctrl-0 = <&uart1m0_rtsn>; 209 pinctrl-1 = <&uart1_gpios>; 210 BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 211 BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 212 BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 213 status = "okay"; 214 }; 215}; 216 217&cpu0 { 218 cpu-supply = <&vdd_cpu>; 219}; 220 221&csi2_dphy_hw { 222 status = "okay"; 223}; 224 225&csi2_dphy0 { 226 status = "okay"; 227 228 ports { 229 #address-cells = <1>; 230 #size-cells = <0>; 231 port@0 { 232 reg = <0>; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 236 mipi_in_ucam0: endpoint@0 { 237 reg = <0>; 238 remote-endpoint = <&gc2385_out>; 239 data-lanes = <1>; 240 }; 241 mipi_in_ucam1: endpoint@1 { 242 reg = <1>; 243 remote-endpoint = <&ov8858_out>; 244 data-lanes = <1 2 3 4>; 245 }; 246 }; 247 port@1 { 248 reg = <1>; 249 #address-cells = <1>; 250 #size-cells = <0>; 251 252 csidphy0_out: endpoint@0 { 253 reg = <0>; 254 remote-endpoint = <&isp0_in>; 255 }; 256 }; 257 }; 258}; 259 260&dfi { 261 status = "okay"; 262}; 263 264&dmc { 265 center-supply = <&vdd_logic>; 266 status = "okay"; 267}; 268 269&dsi0 { 270 status = "okay"; 271 rockchip,lane-rate = <1000>; 272 panel@0 { 273 compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi"; 274 reg = <0>; 275 276 backlight = <&backlight>; 277 //power-supply=<&vcc_3v3>; 278 enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 279 stbyb-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 280 reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 281 282 pinctrl-names = "default"; 283 pinctrl-0 = <&lcd_enable_gpio>, <&lcd_rst_gpio>, <&lcd_stanby_gpio>; 284 285 prepare-delay-ms = <120>; 286 reset-delay-ms = <120>; 287 init-delay-ms = <120>; 288 stbyb-delay-ms = <120>; 289 enable-delay-ms = <120>; 290 disable-delay-ms = <120>; 291 unprepare-delay-ms = <120>; 292 293 width-mm = <229>; 294 height-mm = <143>; 295 296 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 297 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 298 dsi,format = <MIPI_DSI_FMT_RGB888>; 299 dsi,lanes = <4>; 300 301 panel-init-sequence = [ 302 23 00 02 B0 01 303 23 00 02 C3 0F 304 23 00 02 C4 00 305 23 00 02 C5 00 306 23 00 02 C6 00 307 23 00 02 C7 00 308 23 00 02 C8 0D 309 23 00 02 C9 12 310 23 00 02 CA 11 311 23 00 02 CD 1D 312 23 00 02 CE 1B 313 23 00 02 CF 0B 314 23 00 02 D0 09 315 23 00 02 D1 07 316 23 00 02 D2 05 317 23 00 02 D3 01 318 23 00 02 D7 10 319 23 00 02 D8 00 320 23 00 02 D9 00 321 23 00 02 DA 00 322 23 00 02 DB 00 323 23 00 02 DC 0E 324 23 00 02 DD 12 325 23 00 02 DE 11 326 23 00 02 E1 1E 327 23 00 02 E2 1C 328 23 00 02 E3 0C 329 23 00 02 E4 0A 330 23 00 02 E5 08 331 23 00 02 E6 06 332 23 00 02 E7 02 333 23 00 02 B0 03 334 23 00 02 BE 03 335 23 00 02 CC 44 336 23 00 02 C8 07 337 23 00 02 C9 05 338 23 00 02 CA 42 339 23 00 02 CD 3E 340 23 00 02 CF 60 341 23 00 02 D2 04 342 23 00 02 D3 04 343 23 00 02 D4 01 344 23 00 02 D5 00 345 23 00 02 D6 03 346 23 00 02 D7 04 347 23 00 02 D9 01 348 23 00 02 DB 01 349 23 00 02 E4 F0 350 23 00 02 E5 0A 351 23 00 02 B0 00 352 23 00 02 BA 8F// NEW ADD 353 23 00 02 BD 63 354 23 00 02 C2 08 355 23 00 02 C4 10 356 23 00 02 B0 02 357 23 00 02 C0 00 358 23 00 02 C1 0A 359 23 00 02 C2 20 360 23 00 02 C3 24 361 23 00 02 C4 23 362 23 00 02 C5 29 363 23 00 02 C6 23 364 23 00 02 C7 1C 365 23 00 02 C8 19 366 23 00 02 C9 17 367 23 00 02 CA 17 368 23 00 02 CB 18 369 23 00 02 CC 1A 370 23 00 02 CD 1E 371 23 00 02 CE 20 372 23 00 02 CF 23 373 23 00 02 D0 07 374 23 00 02 D1 00 375 23 00 02 D2 00 376 23 00 02 D3 0A 377 23 00 02 D4 13 378 23 00 02 D5 1C 379 23 00 02 D6 1A 380 23 00 02 D7 13 381 23 00 02 D8 17 382 23 00 02 D9 1C 383 23 00 02 DA 19 384 23 00 02 DB 17 385 23 00 02 DC 17 386 23 00 02 DD 18 387 23 00 02 DE 1A 388 23 00 02 DF 1E 389 23 00 02 E0 20 390 23 00 02 E1 23 391 23 00 02 E2 07 392 393 05 78 01 11 394 05 32 01 29 395 ]; 396 397 panel-exit-sequence = [ 398 05 dc 01 28 399 05 78 01 10 400 ]; 401 402 display-timings { 403 native-mode = <&timing0>; 404 405 timing0: timing0 { 406 clock-frequency = <160000000>; 407 hactive = <1200>; 408 vactive = <1920>; 409 410 hsync-len = <1>;//19 411 hback-porch = <60>;//40 412 hfront-porch = <80>;//123 413 414 vsync-len = <1>; 415 vback-porch = <25>; 416 vfront-porch = <35>; 417 418 hsync-active = <0>; 419 vsync-active = <0>; 420 de-active = <0>; 421 pixelclk-active = <1>; 422 }; 423 }; 424 425 ports { 426 #address-cells = <1>; 427 #size-cells = <0>; 428 429 port@0 { 430 reg = <0>; 431 panel_in_dsi: endpoint { 432 remote-endpoint = <&dsi_out_panel>; 433 }; 434 }; 435 }; 436 }; 437 438 ports { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 442 port@1 { 443 reg = <1>; 444 dsi_out_panel: endpoint { 445 remote-endpoint = <&panel_in_dsi>; 446 }; 447 }; 448 }; 449 450}; 451 452&dsi0_in_vp0 { 453 status = "okay"; 454}; 455 456&dsi0_in_vp1 { 457 status = "disabled"; 458}; 459 460&gpu { 461 mali-supply = <&vdd_gpu>; 462 status = "okay"; 463}; 464 465&hdmi { 466 status = "okay"; 467}; 468 469&hdmi_in_vp0 { 470 status = "okay"; 471}; 472 473&hdmi_in_vp1 { 474 status = "disabled"; 475}; 476 477&hdmi_sound { 478 status = "okay"; 479}; 480 481&i2c0 { 482 status = "okay"; 483 484 vdd_cpu: tcs4525@1c { 485 compatible = "tcs,tcs4525"; 486 reg = <0x1c>; 487 vin-supply = <&vccsys>; 488 regulator-compatible = "fan53555-reg"; 489 regulator-name = "vdd_cpu"; 490 regulator-min-microvolt = <712500>; 491 regulator-max-microvolt = <1390000>; 492 regulator-init-microvolt = <900000>; 493 regulator-ramp-delay = <2300>; 494 fcs,suspend-voltage-selector = <1>; 495 regulator-boot-on; 496 regulator-always-on; 497 regulator-state-mem { 498 regulator-off-in-suspend; 499 }; 500 }; 501 502 rk817: pmic@20 { 503 compatible = "rockchip,rk817"; 504 reg = <0x20>; 505 interrupt-parent = <&gpio0>; 506 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 507 508 pinctrl-names = "default", "pmic-sleep", 509 "pmic-power-off", "pmic-reset"; 510 pinctrl-0 = <&pmic_int>; 511 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 512 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 513 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 514 rockchip,system-power-controller; 515 wakeup-source; 516 #clock-cells = <1>; 517 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 518 //fb-inner-reg-idxs = <2>; 519 /* 1: rst regs (default in codes), 0: rst the pmic */ 520 pmic-reset-func = <0>; 521 /* not save the PMIC_POWER_EN register in uboot */ 522 not-save-power-en = <1>; 523 524 vcc1-supply = <&vccsys>; 525 vcc2-supply = <&vccsys>; 526 vcc3-supply = <&vccsys>; 527 vcc4-supply = <&vccsys>; 528 vcc5-supply = <&vccsys>; 529 vcc6-supply = <&vccsys>; 530 vcc7-supply = <&vccsys>; 531 vcc8-supply = <&vccsys>; 532 vcc9-supply = <&dcdc_boost>; 533 534 pwrkey { 535 status = "okay"; 536 }; 537 538 pinctrl_rk8xx: pinctrl_rk8xx { 539 gpio-controller; 540 #gpio-cells = <2>; 541 542 rk817_slppin_null: rk817_slppin_null { 543 pins = "gpio_slp"; 544 function = "pin_fun0"; 545 }; 546 547 rk817_slppin_slp: rk817_slppin_slp { 548 pins = "gpio_slp"; 549 function = "pin_fun1"; 550 }; 551 552 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 553 pins = "gpio_slp"; 554 function = "pin_fun2"; 555 }; 556 557 rk817_slppin_rst: rk817_slppin_rst { 558 pins = "gpio_slp"; 559 function = "pin_fun3"; 560 }; 561 }; 562 563 regulators { 564 vdd_logic: DCDC_REG1 { 565 regulator-always-on; 566 regulator-boot-on; 567 regulator-min-microvolt = <500000>; 568 regulator-max-microvolt = <1350000>; 569 regulator-init-microvolt = <900000>; 570 regulator-ramp-delay = <6001>; 571 regulator-initial-mode = <0x2>; 572 regulator-name = "vdd_logic"; 573 regulator-state-mem { 574 regulator-off-in-suspend; 575 regulator-suspend-microvolt = <900000>; 576 }; 577 }; 578 579 vdd_gpu: DCDC_REG2 { 580 regulator-always-on; 581 regulator-boot-on; 582 regulator-min-microvolt = <500000>; 583 regulator-max-microvolt = <1350000>; 584 regulator-init-microvolt = <900000>; 585 regulator-ramp-delay = <6001>; 586 regulator-initial-mode = <0x2>; 587 regulator-name = "vdd_gpu"; 588 regulator-state-mem { 589 regulator-off-in-suspend; 590 }; 591 }; 592 593 vcc_ddr: DCDC_REG3 { 594 regulator-always-on; 595 regulator-boot-on; 596 regulator-initial-mode = <0x2>; 597 regulator-name = "vcc_ddr"; 598 regulator-state-mem { 599 regulator-on-in-suspend; 600 }; 601 }; 602 603 vcc_3v3: DCDC_REG4 { 604 regulator-always-on; 605 regulator-boot-on; 606 regulator-min-microvolt = <3300000>; 607 regulator-max-microvolt = <3300000>; 608 regulator-initial-mode = <0x2>; 609 regulator-name = "vcc_3v3"; 610 regulator-state-mem { 611 regulator-off-in-suspend; 612 }; 613 }; 614 615 vcca1v8_pmu: LDO_REG1 { 616 regulator-always-on; 617 regulator-boot-on; 618 regulator-min-microvolt = <1800000>; 619 regulator-max-microvolt = <1800000>; 620 regulator-name = "vcca1v8_pmu"; 621 regulator-state-mem { 622 regulator-on-in-suspend; 623 regulator-suspend-microvolt = <1800000>; 624 }; 625 }; 626 627 vdda_0v9: LDO_REG2 { 628 regulator-always-on; 629 regulator-boot-on; 630 regulator-min-microvolt = <900000>; 631 regulator-max-microvolt = <900000>; 632 regulator-name = "vdda_0v9"; 633 regulator-state-mem { 634 regulator-off-in-suspend; 635 }; 636 }; 637 638 vdda0v9_pmu: LDO_REG3 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <900000>; 642 regulator-max-microvolt = <900000>; 643 regulator-name = "vdda0v9_pmu"; 644 regulator-state-mem { 645 regulator-on-in-suspend; 646 regulator-suspend-microvolt = <900000>; 647 }; 648 }; 649 650 vccio_acodec: LDO_REG4 { 651 regulator-always-on; 652 regulator-boot-on; 653 regulator-min-microvolt = <3300000>; 654 regulator-max-microvolt = <3300000>; 655 regulator-name = "vccio_acodec"; 656 regulator-state-mem { 657 regulator-off-in-suspend; 658 }; 659 }; 660 661 vccio_sd: LDO_REG5 { 662 regulator-always-on; 663 regulator-boot-on; 664 regulator-min-microvolt = <1800000>; 665 regulator-max-microvolt = <3300000>; 666 regulator-name = "vccio_sd"; 667 regulator-state-mem { 668 regulator-off-in-suspend; 669 }; 670 }; 671 672 vcc3v3_pmu: LDO_REG6 { 673 regulator-always-on; 674 regulator-boot-on; 675 regulator-min-microvolt = <3300000>; 676 regulator-max-microvolt = <3300000>; 677 regulator-name = "vcc3v3_pmu"; 678 regulator-state-mem { 679 regulator-on-in-suspend; 680 regulator-suspend-microvolt = <3000000>; 681 }; 682 }; 683 684 vcc_1v8: LDO_REG7 { 685 regulator-always-on; 686 regulator-boot-on; 687 regulator-min-microvolt = <1800000>; 688 regulator-max-microvolt = <1800000>; 689 regulator-name = "vcc_1v8"; 690 regulator-state-mem { 691 regulator-off-in-suspend; 692 }; 693 }; 694 695 vcc1v8_dvp: LDO_REG8 { 696 regulator-always-on; 697 regulator-boot-on; 698 regulator-min-microvolt = <1800000>; 699 regulator-max-microvolt = <1800000>; 700 regulator-name = "vcc1v8_dvp"; 701 regulator-state-mem { 702 regulator-off-in-suspend; 703 }; 704 }; 705 706 vcc2v8_dvp: LDO_REG9 { 707 regulator-always-on; 708 regulator-boot-on; 709 regulator-min-microvolt = <2800000>; 710 regulator-max-microvolt = <2800000>; 711 regulator-name = "vcc2v8_dvp"; 712 regulator-state-mem { 713 regulator-off-in-suspend; 714 }; 715 }; 716 717 dcdc_boost: BOOST { 718 regulator-always-on; 719 regulator-boot-on; 720 regulator-min-microvolt = <4700000>; 721 regulator-max-microvolt = <5400000>; 722 regulator-name = "boost"; 723 regulator-state-mem { 724 regulator-off-in-suspend; 725 }; 726 }; 727 728 otg_switch: OTG_SWITCH { 729 regulator-name = "otg_switch"; 730 regulator-state-mem { 731 regulator-off-in-suspend; 732 }; 733 }; 734 }; 735 736 battery { 737 compatible = "rk817,battery"; 738 ocv_table = <3400 3513 3578 3687 3734 3752 3763 739 3766 3771 3784 3804 3836 3885 3925 740 3962 4005 4063 4114 4169 4227 4303>; 741 design_capacity = <5000>; 742 design_qmax = <5500>; 743 bat_res = <100>; 744 sleep_enter_current = <150>; 745 sleep_exit_current = <180>; 746 sleep_filter_current = <100>; 747 power_off_thresd = <3350>; 748 zero_algorithm_vol = <3850>; 749 max_soc_offset = <60>; 750 monitor_sec = <5>; 751 sample_res = <10>; 752 virtual_power = <0>; 753 }; 754 755 charger { 756 compatible = "rk817,charger"; 757 min_input_voltage = <4500>; 758 max_input_current = <1500>; 759 max_chrg_current = <2000>; 760 max_chrg_voltage = <4300>; 761 chrg_term_mode = <0>; 762 chrg_finish_cur = <300>; 763 virtual_power = <0>; 764 dc_det_adc = <0>; 765 extcon = <&usb2phy0>; 766 gate_function_disable = <1>; 767 }; 768 769 rk817_codec: codec { 770 #sound-dai-cells = <0>; 771 compatible = "rockchip,rk817-codec"; 772 clocks = <&cru I2S1_MCLKOUT>; 773 clock-names = "mclk"; 774 assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; 775 assigned-clock-rates = <12288000>; 776 assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; 777 pinctrl-names = "default"; 778 pinctrl-0 = <&i2s1m0_mclk>; 779 hp-volume = <20>; 780 spk-volume = <3>; 781 out-l2spk-r2hp; 782 spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 783 status = "okay"; 784 }; 785 }; 786}; 787 788&i2c2 { 789 status = "okay"; 790 pinctrl-0 = <&i2c2m1_xfer>; 791 792 dw9714: dw9714@c { 793 compatible = "dongwoon,dw9714"; 794 status = "okay"; 795 reg = <0x0c>; 796 rockchip,camera-module-index = <0>; 797 rockchip,vcm-start-current = <10>; 798 rockchip,vcm-rated-current = <85>; 799 rockchip,vcm-step-mode = <5>; 800 rockchip,camera-module-facing = "back"; 801 }; 802 803 gc2385: gc2385@37 { 804 compatible = "galaxycore,gc2385"; 805 status = "okay"; 806 reg = <0x37>; 807 clocks = <&cru CLK_CIF_OUT>; 808 clock-names = "xvclk"; 809 power-domains = <&power RK3568_PD_VI>; 810 pinctrl-names = "rockchip,camera_default"; 811 pinctrl-0 = <&cif_clk>; 812 813 //reset pin control by hardware,used this pin switch to mipi input 814 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 815 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 816 pwdn-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 817 rockchip,camera-module-index = <1>; 818 rockchip,camera-module-facing = "front"; 819 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 820 rockchip,camera-module-lens-name = "default"; 821 port { 822 gc2385_out: endpoint { 823 remote-endpoint = <&mipi_in_ucam0>; 824 data-lanes = <1>; 825 }; 826 }; 827 }; 828 829 ov8858: ov8858@36 { 830 status = "okay"; 831 compatible = "ovti,ov8858"; 832 reg = <0x36>; 833 clocks = <&cru CLK_CAM0_OUT>; 834 clock-names = "xvclk"; 835 power-domains = <&power RK3568_PD_VI>; 836 pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep"; 837 pinctrl-0 = <&cam_clkout0>; 838 pinctrl-1 = <&cam_sleep>; 839 //reset pin control by hardware,used this pin switch to mipi input 840 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 841 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 842 pwdn-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 843 rockchip,camera-module-index = <0>; 844 rockchip,camera-module-facing = "back"; 845 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 846 rockchip,camera-module-lens-name = "default"; 847 flash-leds = <&flash_rgb13h>; 848 lens-focus = <&dw9714>; 849 port { 850 ov8858_out: endpoint { 851 remote-endpoint = <&mipi_in_ucam1>; 852 data-lanes = <1 2 3 4>; 853 }; 854 }; 855 }; 856}; 857 858&i2c3 { 859 status = "okay"; 860 pinctrl-names = "default"; 861 pinctrl-0 = <&i2c3m1_xfer>; 862 clock-frequency = <400000>; 863 i2c-scl-rising-time-ns = <138>; 864 i2c-scl-falling-time-ns = <4>; 865 866 ts@40 { 867 compatible = "gslX680-pad"; 868 reg = <0x40>; 869 touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 870 reset-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_HIGH>; 871 pinctrl-names = "default"; 872 pinctrl-0 = <&tp_gpio>; 873 screen_max_x = <1200>; 874 screen_max_y = <1920>; 875 revert_x = <0>; 876 revert_y = <1>; 877 revert_xy = <0>; 878 chip_id = <1>; 879 status = "okay"; 880 }; 881}; 882 883&i2c5 { 884 status = "okay"; 885 clock-frequency = <400000>; 886 i2c-scl-rising-time-ns = <144>; 887 i2c-scl-falling-time-ns = <4>; 888 889 sensor@18 { 890 compatible = "gs_sc7a20"; 891 reg = <0x18>; 892 type = <SENSOR_TYPE_ACCEL>; 893 irq_enable = <0>; 894 pinctrl-names = "default"; 895 pinctrl-0 = <&sensor_gpio>; 896 irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_RISING>; 897 poll_delay_ms = <10>; 898 layout = <1>; 899 }; 900}; 901 902&i2s0_8ch { 903 status = "okay"; 904}; 905 906&i2s1_8ch { 907 status = "okay"; 908 rockchip,clk-trcm = <1>; 909 pinctrl-names = "default"; 910 pinctrl-0 = <&i2s1m0_sclktx 911 &i2s1m0_lrcktx 912 &i2s1m0_sdi0 913 &i2s1m0_sdo0>; 914}; 915 916&jpegd { 917 status = "okay"; 918}; 919 920&jpegd_mmu { 921 status = "okay"; 922}; 923 924&video_phy0 { 925 status = "okay"; 926}; 927 928&mpp_srv { 929 status = "okay"; 930}; 931 932&nandc0 { 933 status = "okay"; 934}; 935 936&pinctrl { 937 cam { 938 cam_clkout0: cam-clkout0 { 939 rockchip,pins = 940 /* cam_clkout0 */ 941 <4 RK_PA7 1 &pcfg_pull_none>; 942 }; 943 944 cam_sleep: cam-sleep { 945 rockchip,pins = 946 /* cam_sleep */ 947 <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 948 }; 949 950 camera_rst: camera-rst { 951 rockchip,pins = 952 /* front camera reset */ 953 <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 954 /* back camra reset */ 955 <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 956 }; 957 958 flash_led_gpios: flash-led { 959 rockchip,pins = 960 /* flash led enable */ 961 <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 962 }; 963 }; 964 965 tp { 966 tp_gpio: tp-gpio { 967 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 968 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 969 }; 970 }; 971 972 headphone { 973 hp_det: hp-det { 974 rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 975 }; 976 }; 977 978 lcd { 979 lcd_rst_gpio: lcd-rst-gpio { 980 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 981 }; 982 983 lcd_enable_gpio: lcd-enable-gpio { 984 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 985 }; 986 987 lcd_stanby_gpio: lcd-stanby-gpio { 988 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 989 }; 990 }; 991 992 pmic { 993 pmic_int: pmic_int { 994 rockchip,pins = 995 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 996 }; 997 998 soc_slppin_gpio: soc_slppin_gpio { 999 rockchip,pins = 1000 <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; 1001 }; 1002 1003 soc_slppin_slp: soc_slppin_slp { 1004 rockchip,pins = 1005 <0 RK_PA2 1 &pcfg_pull_none>; 1006 }; 1007 1008 soc_slppin_rst: soc_slppin_rst { 1009 rockchip,pins = 1010 <0 RK_PA2 2 &pcfg_pull_none>; 1011 }; 1012 }; 1013 1014 sensor { 1015 sensor_gpio: sensor-gpio { 1016 rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 1017 }; 1018 }; 1019 1020 sdio-pwrseq { 1021 wifi_enable_h: wifi-enable-h { 1022 rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1023 }; 1024 }; 1025 1026 vcc_sd { 1027 vcc_sd_h: vcc-sd-h { 1028 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 1029 }; 1030 }; 1031 1032 wireless-wlan { 1033 wifi_host_wake_irq: wifi-host-wake-irq { 1034 rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 1035 }; 1036 }; 1037 1038 wireless-bluetooth { 1039 uart1_gpios: uart1-gpios { 1040 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 1041 }; 1042 }; 1043}; 1044 1045&pmu_io_domains { 1046 status = "okay"; 1047 pmuio1-supply = <&vcc3v3_pmu>; 1048 pmuio2-supply = <&vcc3v3_pmu>; 1049 vccio1-supply = <&vccio_acodec>; 1050 vccio3-supply = <&vccio_sd>; 1051 vccio4-supply = <&vcca1v8_pmu>; 1052 vccio5-supply = <&vcc_1v8>; 1053 vccio6-supply = <&vcc1v8_dvp>; 1054 vccio7-supply = <&vcc_3v3>; 1055}; 1056 1057&pwm4 { 1058 status = "okay"; 1059}; 1060 1061&rk_rga { 1062 status = "okay"; 1063}; 1064 1065&rkisp { 1066 status = "okay"; 1067}; 1068 1069&rkisp_mmu { 1070 status = "okay"; 1071}; 1072 1073&rkisp_vir0 { 1074 status = "okay"; 1075 1076 port { 1077 #address-cells = <1>; 1078 #size-cells = <0>; 1079 1080 isp0_in: endpoint@0 { 1081 reg = <0>; 1082 remote-endpoint = <&csidphy0_out>; 1083 }; 1084 }; 1085}; 1086 1087&rkvdec { 1088 status = "okay"; 1089}; 1090 1091&rkvdec_mmu { 1092 status = "okay"; 1093}; 1094 1095&rkvenc { 1096 status = "okay"; 1097}; 1098 1099&rkvenc_mmu { 1100 status = "okay"; 1101}; 1102 1103&route_dsi0 { 1104 status = "okay"; 1105}; 1106 1107&route_hdmi { 1108 status = "okay"; 1109 connect = <&vp0_out_hdmi>; 1110}; 1111 1112&saradc { 1113 status = "okay"; 1114 vref-supply = <&vcc_1v8>; 1115}; 1116 1117&sdhci { 1118 bus-width = <8>; 1119 no-sdio; 1120 no-sd; 1121 non-removable; 1122 max-frequency = <200000000>; 1123 status = "okay"; 1124}; 1125 1126&sdmmc0 { 1127 max-frequency = <150000000>; 1128 no-sdio; 1129 no-mmc; 1130 bus-width = <4>; 1131 cap-mmc-highspeed; 1132 cap-sd-highspeed; 1133 disable-wp; 1134 sd-uhs-sdr104; 1135 vmmc-supply = <&vcc_sd>; 1136 vqmmc-supply = <&vccio_sd>; 1137 pinctrl-names = "default"; 1138 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 1139 status = "okay"; 1140}; 1141 1142&sdmmc1 { 1143 max-frequency = <150000000>; 1144 no-sd; 1145 no-mmc; 1146 bus-width = <4>; 1147 disable-wp; 1148 cap-sd-highspeed; 1149 cap-sdio-irq; 1150 keep-power-in-suspend; 1151 mmc-pwrseq = <&sdio_pwrseq>; 1152 non-removable; 1153 pinctrl-names = "default"; 1154 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 1155 sd-uhs-sdr104; 1156 rockchip,default-sample-phase = <90>; 1157 status = "okay"; 1158}; 1159 1160&tsadc { 1161 status = "okay"; 1162}; 1163 1164&uart1 { 1165 status = "okay"; 1166 pinctrl-names = "default"; 1167 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 1168}; 1169 1170&u2phy0_otg { 1171 status = "okay"; 1172}; 1173 1174&usb2phy0 { 1175 status = "okay"; 1176}; 1177 1178&usbdrd_dwc3 { 1179 status = "okay"; 1180}; 1181 1182&usbdrd30 { 1183 status = "okay"; 1184}; 1185 1186&vdpu { 1187 status = "okay"; 1188}; 1189 1190&vdpu_mmu { 1191 status = "okay"; 1192}; 1193 1194&vepu { 1195 status = "okay"; 1196}; 1197 1198&vepu_mmu { 1199 status = "okay"; 1200}; 1201 1202&vop { 1203 status = "okay"; 1204}; 1205 1206&vop_mmu { 1207 status = "okay"; 1208}; 1209