1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "rk3566.dtsi" 15#include "rk3568-android.dtsi" 16 17/ { 18 model = "Rockchip RK3566 RK817 TABLET K108 LP4X Board"; 19 compatible = "rockchip,rk3566-rk817-tablet-k108", "rockchip,rk3566"; 20 21 adc_keys: adc-keys { 22 compatible = "adc-keys"; 23 io-channels = <&saradc 0>; 24 io-channel-names = "buttons"; 25 keyup-threshold-microvolt = <1800000>; 26 poll-interval = <100>; 27 28 vol-up-key { 29 label = "volume up"; 30 linux,code = <KEY_VOLUMEUP>; 31 press-threshold-microvolt = <1750>; 32 }; 33 34 vol-down-key { 35 label = "volume down"; 36 linux,code = <KEY_VOLUMEDOWN>; 37 press-threshold-microvolt = <297500>; 38 }; 39 }; 40 41 backlight: backlight { 42 compatible = "pwm-backlight"; 43 pwms = <&pwm4 0 25000 0>; 44 brightness-levels = < 45 0 20 20 21 21 22 22 23 46 23 24 24 25 25 26 26 27 47 27 28 28 29 29 30 30 31 48 31 32 32 33 33 34 34 35 49 35 36 36 37 37 38 38 39 50 40 41 42 43 44 45 46 47 51 48 49 50 51 52 53 54 55 52 56 57 58 59 60 61 62 63 53 64 65 66 67 68 69 70 71 54 72 73 74 75 76 77 78 79 55 80 81 82 83 84 85 86 87 56 88 89 90 91 92 93 94 95 57 96 97 98 99 100 101 102 103 58 104 105 106 107 108 109 110 111 59 112 113 114 115 116 117 118 119 60 120 121 122 123 124 125 126 127 61 128 129 130 131 132 133 134 135 62 136 137 138 139 140 141 142 143 63 144 145 146 147 148 149 150 151 64 152 153 154 155 156 157 158 159 65 160 161 162 163 164 165 166 167 66 168 169 170 171 172 173 174 175 67 176 177 178 179 180 181 182 183 68 184 185 186 187 188 189 190 191 69 192 193 194 195 196 197 198 199 70 200 201 202 203 204 205 206 207 71 208 209 210 211 212 213 214 215 72 216 217 218 219 220 221 222 223 73 224 225 226 227 228 229 230 231 74 232 233 234 235 236 237 238 239 75 240 241 242 243 244 245 246 247 76 248 249 250 251 252 253 254 255 77 >; 78 default-brightness-level = <200>; 79 }; 80 81 charge-animation { 82 compatible = "rockchip,uboot-charge"; 83 rockchip,uboot-charge-on = <1>; 84 rockchip,android-charge-on = <0>; 85 rockchip,uboot-low-power-voltage = <3350>; 86 rockchip,screen-on-voltage = <3400>; 87 status = "okay"; 88 }; 89 90 flash_rgb13h: flash-rgb13h { 91 status = "okay"; 92 compatible = "led,rgb13h"; 93 label = "gpio-flash"; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&flash_led_gpios>; 96 led-max-microamp = <20000>; 97 flash-max-microamp = <20000>; 98 flash-max-timeout-us = <1000000>; 99 enable-gpio = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>; 100 rockchip,camera-module-index = <0>; 101 rockchip,camera-module-facing = "back"; 102 }; 103 104 hall_sensor: hall-mh248 { 105 compatible = "hall-mh248"; 106 irq-gpio = <&gpio3 RK_PA6 IRQ_TYPE_EDGE_BOTH>; 107 hall-active = <1>; 108 status = "okay"; 109 }; 110 111 hdmi_sound: hdmi-sound { 112 compatible = "simple-audio-card"; 113 simple-audio-card,format = "i2s"; 114 simple-audio-card,mclk-fs = <128>; 115 simple-audio-card,name = "rockchip,hdmi"; 116 status = "okay"; 117 118 simple-audio-card,cpu { 119 sound-dai = <&i2s0_8ch>; 120 }; 121 simple-audio-card,codec { 122 sound-dai = <&hdmi>; 123 }; 124 }; 125 126 vccsys: vccsys { 127 compatible = "regulator-fixed"; 128 regulator-name = "vcc3v8_sys"; 129 regulator-always-on; 130 regulator-boot-on; 131 regulator-min-microvolt = <3800000>; 132 regulator-max-microvolt = <3800000>; 133 }; 134 135 vcc_camera: vcc-camera-regulator { 136 compatible = "regulator-fixed"; 137 gpio = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&camera_rst>; 140 regulator-name = "vcc_camera"; 141 enable-active-high; 142 regulator-always-on; 143 regulator-boot-on; 144 }; 145 146 rk817-sound { 147 compatible = "simple-audio-card"; 148 simple-audio-card,format = "i2s"; 149 simple-audio-card,name = "rockchip,rk817-codec"; 150 simple-audio-card,mclk-fs = <256>; 151 152 simple-audio-card,cpu { 153 sound-dai = <&i2s1_8ch>; 154 }; 155 simple-audio-card,codec { 156 sound-dai = <&rk817_codec>; 157 }; 158 }; 159 160 rk_headset: rk-headset { 161 compatible = "rockchip_headset"; 162 headset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 163 pinctrl-names = "default"; 164 pinctrl-0 = <&hp_det>; 165 io-channels = <&saradc 2>; 166 }; 167 168 sdio_pwrseq: sdio-pwrseq { 169 compatible = "mmc-pwrseq-simple"; 170 clocks = <&rk817 1>; 171 clock-names = "ext_clock"; 172 pinctrl-names = "default"; 173 pinctrl-0 = <&wifi_enable_h>; 174 175 /* 176 * On the module itself this is one of these (depending 177 * on the actual card populated): 178 * - SDIO_RESET_L_WL_REG_ON 179 * - PDN (power down when low) 180 */ 181 post-power-on-delay-ms = <200>; 182 reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 183 }; 184 185 vcc_sd: vcc-sd { 186 compatible = "regulator-gpio"; 187 enable-active-low; 188 enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 189 regulator-min-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>; 191 pinctrl-names = "default"; 192 pinctrl-0 = <&vcc_sd_h>; 193 regulator-name = "vcc_sd"; 194 states = <3300000 0x0 195 3300000 0x1>; 196 }; 197 198 vcc5v0_host: vcc5v0-host-regulator { 199 compatible = "regulator-fixed"; 200 enable-active-high; 201 gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&vcc5v0_host_en>; 204 regulator-name = "vcc5v0_host"; 205 regulator-always-on; 206 }; 207 208 wireless-wlan { 209 compatible = "wlan-platdata"; 210 rockchip,grf = <&grf>; 211 wifi_chip_type = "rtl8723cs"; 212 pinctrl-names = "default"; 213 pinctrl-0 = <&wifi_host_wake_irq>; 214 WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; 215 WIFI,vbat_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>; 216 WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 217 status = "okay"; 218 }; 219 220 wireless-bluetooth { 221 compatible = "bluetooth-platdata"; 222 clocks = <&rk817 1>; 223 clock-names = "ext_clock"; 224 //wifi-bt-power-toggle; 225 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 226 pinctrl-names = "default", "rts_gpio"; 227 pinctrl-0 = <&uart1m0_rtsn>; 228 pinctrl-1 = <&uart1_gpios>; 229 BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 230 BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 231 BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 232 status = "okay"; 233 }; 234}; 235 236&combphy1_usq { 237 rockchip,dis-u3otg1-port; 238 status = "okay"; 239}; 240 241&cpu0 { 242 cpu-supply = <&vdd_cpu>; 243}; 244 245&csi2_dphy_hw { 246 status = "okay"; 247}; 248 249&csi2_dphy0 { 250 status = "okay"; 251 252 ports { 253 #address-cells = <1>; 254 #size-cells = <0>; 255 port@0 { 256 reg = <0>; 257 #address-cells = <1>; 258 #size-cells = <0>; 259 260 mipi_in_ucam0: endpoint@0 { 261 reg = <0>; 262 remote-endpoint = <&gc2385_out>; 263 data-lanes = <1>; 264 }; 265 mipi_in_ucam1: endpoint@1 { 266 reg = <1>; 267 remote-endpoint = <&ov8858_out>; 268 data-lanes = <1 2 3 4>; 269 }; 270 }; 271 port@1 { 272 reg = <1>; 273 #address-cells = <1>; 274 #size-cells = <0>; 275 276 csidphy0_out: endpoint@0 { 277 reg = <0>; 278 remote-endpoint = <&isp0_in>; 279 }; 280 }; 281 }; 282}; 283 284&dsi0 { 285 status = "okay"; 286 rockchip,lane-rate = <1000>; 287 panel@0 { 288 compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi"; 289 reg = <0>; 290 291 backlight = <&backlight>; 292 power-supply=<&vcc_3v3>; 293 enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 294 stbyb-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 295 reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 296 297 pinctrl-names = "default"; 298 pinctrl-0 = <&lcd_enable_gpio>, <&lcd_rst_gpio>, <&lcd_stanby_gpio>; 299 300 prepare-delay-ms = <120>; 301 reset-delay-ms = <120>; 302 init-delay-ms = <120>; 303 stbyb-delay-ms = <120>; 304 enable-delay-ms = <120>; 305 disable-delay-ms = <120>; 306 unprepare-delay-ms = <120>; 307 308 width-mm = <229>; 309 height-mm = <143>; 310 311 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 312 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 313 dsi,format = <MIPI_DSI_FMT_RGB888>; 314 dsi,lanes = <4>; 315 316 panel-init-sequence = [ 317 29 00 04 FF 98 81 03 318 23 00 02 01 00 319 23 00 02 02 00 320 23 00 02 03 73 321 23 00 02 04 00 322 23 00 02 05 00 323 23 00 02 06 08 324 23 00 02 07 00 325 23 00 02 08 00 326 23 00 02 09 00 327 23 00 02 0A 01 328 23 00 02 0B 01 329 23 00 02 0C 00 330 23 00 02 0D 01 331 23 00 02 0E 01 332 23 00 02 0F 00 333 23 00 02 10 00 334 23 00 02 11 00 335 23 00 02 12 00 336 23 00 02 13 1F 337 23 00 02 14 1F 338 23 00 02 15 00 339 23 00 02 16 00 340 23 00 02 17 00 341 23 00 02 18 00 342 23 00 02 19 00 343 23 00 02 1A 00 344 23 00 02 1B 00 345 23 00 02 1C 00 346 23 00 02 1D 00 347 23 00 02 1E 40 348 23 00 02 1F C0 349 23 00 02 20 06 350 23 00 02 21 01 351 23 00 02 22 06 352 23 00 02 23 01 353 23 00 02 24 88 354 23 00 02 25 88 355 23 00 02 26 00 356 23 00 02 27 00 357 23 00 02 28 3B 358 23 00 02 29 03 359 23 00 02 2A 00 360 23 00 02 2B 00 361 23 00 02 2C 00 362 23 00 02 2D 00 363 23 00 02 2E 00 364 23 00 02 2F 00 365 23 00 02 30 00 366 23 00 02 31 00 367 23 00 02 32 00 368 23 00 02 33 00 369 23 00 02 34 00 370 23 00 02 35 00 371 23 00 02 36 00 372 23 00 02 37 00 373 23 00 02 38 00 374 23 00 02 39 00 375 23 00 02 3A 00 376 23 00 02 3B 00 377 23 00 02 3C 00 378 23 00 02 3D 00 379 23 00 02 3E 00 380 23 00 02 3F 00 381 23 00 02 40 00 382 23 00 02 41 00 383 23 00 02 42 00 384 23 00 02 43 00 385 23 00 02 44 00 386 23 00 02 50 01 387 23 00 02 51 23 388 23 00 02 52 45 389 23 00 02 53 67 390 23 00 02 54 89 391 23 00 02 55 AB 392 23 00 02 56 01 393 23 00 02 57 23 394 23 00 02 58 45 395 23 00 02 59 67 396 23 00 02 5A 89 397 23 00 02 5B AB 398 23 00 02 5C CD 399 23 00 02 5D EF 400 23 00 02 5E 00 401 23 00 02 5F 01 402 23 00 02 60 01 403 23 00 02 61 06 404 23 00 02 62 06 405 23 00 02 63 07 406 23 00 02 64 07 407 23 00 02 65 00 408 23 00 02 66 00 409 23 00 02 67 02 410 23 00 02 68 02 411 23 00 02 69 05 412 23 00 02 6A 05 413 23 00 02 6B 02 414 23 00 02 6C 0D 415 23 00 02 6D 0D 416 23 00 02 6E 0C 417 23 00 02 6F 0C 418 23 00 02 70 0F 419 23 00 02 71 0F 420 23 00 02 72 0E 421 23 00 02 73 0E 422 23 00 02 74 02 423 23 00 02 75 01 424 23 00 02 76 01 425 23 00 02 77 06 426 23 00 02 78 06 427 23 00 02 79 07 428 23 00 02 7A 07 429 23 00 02 7B 00 430 23 00 02 7C 00 431 23 00 02 7D 02 432 23 00 02 7E 02 433 23 00 02 7F 05 434 23 00 02 80 05 435 23 00 02 81 02 436 23 00 02 82 0D 437 23 00 02 83 0D 438 23 00 02 84 0C 439 23 00 02 85 0C 440 23 00 02 86 0F 441 23 00 02 87 0F 442 23 00 02 88 0E 443 23 00 02 89 0E 444 23 00 02 8A 02 445 29 00 04 FF 98 81 04 446 23 00 02 6C 15 447 23 00 02 6E 2A 448 23 00 02 6F 33 449 23 00 02 8D 1B 450 23 00 02 87 BA 451 23 00 02 3A 24 452 23 00 02 26 76 453 23 00 02 B2 D1 454 29 00 04 FF 98 81 01 455 23 00 02 22 0A 456 23 00 02 31 00 457 23 00 02 43 66 458 23 00 02 53 40 459 23 00 02 50 87 460 23 00 02 51 82 461 23 00 02 60 15 462 23 00 02 61 01 463 23 00 02 62 0C 464 23 00 02 63 00 465 29 00 04 FF 98 81 00 466 23 00 02 35 00 467 468 05 78 01 11 469 05 dc 01 29 470 //05 00 01 35 471 ]; 472 473 panel-exit-sequence = [ 474 05 dc 01 28 475 05 78 01 10 476 ]; 477 478 display-timings { 479 native-mode = <&timing0>; 480 481 timing0: timing0 { 482 clock-frequency = <160000000>; 483 hactive = <1200>; 484 vactive = <1920>; 485 486 hsync-len = <1>;//19 487 hback-porch = <60>;//40 488 hfront-porch = <80>;//123 489 490 vsync-len = <1>; 491 vback-porch = <25>; 492 vfront-porch = <35>; 493 494 hsync-active = <0>; 495 vsync-active = <0>; 496 de-active = <0>; 497 pixelclk-active = <1>; 498 }; 499 }; 500 501 ports { 502 #address-cells = <1>; 503 #size-cells = <0>; 504 505 port@0 { 506 reg = <0>; 507 panel_in_dsi: endpoint { 508 remote-endpoint = <&dsi_out_panel>; 509 }; 510 }; 511 }; 512 }; 513 514 ports { 515 #address-cells = <1>; 516 #size-cells = <0>; 517 518 port@1 { 519 reg = <1>; 520 dsi_out_panel: endpoint { 521 remote-endpoint = <&panel_in_dsi>; 522 }; 523 }; 524 }; 525 526}; 527 528&dsi0_in_vp0 { 529 status = "okay"; 530}; 531 532&dsi0_in_vp1 { 533 status = "disabled"; 534}; 535 536&gpu { 537 mali-supply = <&vdd_gpu>; 538 status = "okay"; 539}; 540 541&hdmi { 542 status = "okay"; 543}; 544 545&hdmi_in_vp0 { 546 status = "okay"; 547}; 548 549&hdmi_in_vp1 { 550 status = "disabled"; 551}; 552 553&hdmi_sound { 554 status = "okay"; 555}; 556 557&i2c0 { 558 status = "okay"; 559 560 vdd_cpu: tcs4525@1c { 561 compatible = "tcs,tcs4525"; 562 reg = <0x1c>; 563 vin-supply = <&vccsys>; 564 regulator-compatible = "fan53555-reg"; 565 regulator-name = "vdd_cpu"; 566 regulator-min-microvolt = <712500>; 567 regulator-max-microvolt = <1390000>; 568 regulator-init-microvolt = <900000>; 569 regulator-ramp-delay = <2300>; 570 fcs,suspend-voltage-selector = <1>; 571 regulator-boot-on; 572 regulator-always-on; 573 regulator-state-mem { 574 regulator-off-in-suspend; 575 }; 576 }; 577 578 rk817: pmic@20 { 579 compatible = "rockchip,rk817"; 580 reg = <0x20>; 581 interrupt-parent = <&gpio0>; 582 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 583 584 pinctrl-names = "default", "pmic-sleep", 585 "pmic-power-off", "pmic-reset"; 586 pinctrl-0 = <&pmic_int>; 587 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 588 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 589 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 590 rockchip,system-power-controller; 591 wakeup-source; 592 #clock-cells = <1>; 593 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 594 //fb-inner-reg-idxs = <2>; 595 /* 1: rst regs (default in codes), 0: rst the pmic */ 596 pmic-reset-func = <0>; 597 598 vcc1-supply = <&vccsys>; 599 vcc2-supply = <&vccsys>; 600 vcc3-supply = <&vccsys>; 601 vcc4-supply = <&vccsys>; 602 vcc5-supply = <&vccsys>; 603 vcc6-supply = <&vccsys>; 604 vcc7-supply = <&vccsys>; 605 vcc8-supply = <&vccsys>; 606 vcc9-supply = <&dcdc_boost>; 607 608 pwrkey { 609 status = "okay"; 610 }; 611 612 pinctrl_rk8xx: pinctrl_rk8xx { 613 gpio-controller; 614 #gpio-cells = <2>; 615 616 rk817_slppin_null: rk817_slppin_null { 617 pins = "gpio_slp"; 618 function = "pin_fun0"; 619 }; 620 621 rk817_slppin_slp: rk817_slppin_slp { 622 pins = "gpio_slp"; 623 function = "pin_fun1"; 624 }; 625 626 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 627 pins = "gpio_slp"; 628 function = "pin_fun2"; 629 }; 630 631 rk817_slppin_rst: rk817_slppin_rst { 632 pins = "gpio_slp"; 633 function = "pin_fun3"; 634 }; 635 }; 636 637 regulators { 638 vdd_logic: DCDC_REG1 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <500000>; 642 regulator-max-microvolt = <1350000>; 643 regulator-init-microvolt = <900000>; 644 regulator-ramp-delay = <6001>; 645 regulator-initial-mode = <0x2>; 646 regulator-name = "vdd_logic"; 647 regulator-state-mem { 648 regulator-off-in-suspend; 649 regulator-suspend-microvolt = <900000>; 650 }; 651 }; 652 653 vdd_gpu: DCDC_REG2 { 654 regulator-always-on; 655 regulator-boot-on; 656 regulator-min-microvolt = <500000>; 657 regulator-max-microvolt = <1350000>; 658 regulator-init-microvolt = <900000>; 659 regulator-ramp-delay = <6001>; 660 regulator-initial-mode = <0x2>; 661 regulator-name = "vdd_gpu"; 662 regulator-state-mem { 663 regulator-off-in-suspend; 664 }; 665 }; 666 667 vcc_ddr: DCDC_REG3 { 668 regulator-always-on; 669 regulator-boot-on; 670 regulator-initial-mode = <0x2>; 671 regulator-name = "vcc_ddr"; 672 regulator-state-mem { 673 regulator-on-in-suspend; 674 }; 675 }; 676 677 vcc_3v3: DCDC_REG4 { 678 regulator-always-on; 679 regulator-boot-on; 680 regulator-min-microvolt = <3300000>; 681 regulator-max-microvolt = <3300000>; 682 regulator-initial-mode = <0x2>; 683 regulator-name = "vcc_3v3"; 684 regulator-state-mem { 685 regulator-off-in-suspend; 686 }; 687 }; 688 689 vcca1v8_pmu: LDO_REG1 { 690 regulator-always-on; 691 regulator-boot-on; 692 regulator-min-microvolt = <1800000>; 693 regulator-max-microvolt = <1800000>; 694 regulator-name = "vcca1v8_pmu"; 695 regulator-state-mem { 696 regulator-on-in-suspend; 697 regulator-suspend-microvolt = <1800000>; 698 }; 699 }; 700 701 vdda_0v9: LDO_REG2 { 702 regulator-always-on; 703 regulator-boot-on; 704 regulator-min-microvolt = <900000>; 705 regulator-max-microvolt = <900000>; 706 regulator-name = "vdda_0v9"; 707 regulator-state-mem { 708 regulator-off-in-suspend; 709 }; 710 }; 711 712 vdda0v9_pmu: LDO_REG3 { 713 regulator-always-on; 714 regulator-boot-on; 715 regulator-min-microvolt = <900000>; 716 regulator-max-microvolt = <900000>; 717 regulator-name = "vdda0v9_pmu"; 718 regulator-state-mem { 719 regulator-on-in-suspend; 720 regulator-suspend-microvolt = <900000>; 721 }; 722 }; 723 724 vccio_acodec: LDO_REG4 { 725 regulator-always-on; 726 regulator-boot-on; 727 regulator-min-microvolt = <3300000>; 728 regulator-max-microvolt = <3300000>; 729 regulator-name = "vccio_acodec"; 730 regulator-state-mem { 731 regulator-off-in-suspend; 732 }; 733 }; 734 735 vccio_sd: LDO_REG5 { 736 regulator-always-on; 737 regulator-boot-on; 738 regulator-min-microvolt = <1800000>; 739 regulator-max-microvolt = <3300000>; 740 regulator-name = "vccio_sd"; 741 regulator-state-mem { 742 regulator-off-in-suspend; 743 }; 744 }; 745 746 vcc3v3_pmu: LDO_REG6 { 747 regulator-always-on; 748 regulator-boot-on; 749 regulator-min-microvolt = <3300000>; 750 regulator-max-microvolt = <3300000>; 751 regulator-name = "vcc3v3_pmu"; 752 regulator-state-mem { 753 regulator-on-in-suspend; 754 regulator-suspend-microvolt = <3000000>; 755 }; 756 }; 757 758 vcc_1v8: LDO_REG7 { 759 regulator-always-on; 760 regulator-boot-on; 761 regulator-min-microvolt = <1800000>; 762 regulator-max-microvolt = <1800000>; 763 regulator-name = "vcc_1v8"; 764 regulator-state-mem { 765 regulator-off-in-suspend; 766 }; 767 }; 768 769 vcc1v8_dvp: LDO_REG8 { 770 regulator-always-on; 771 regulator-boot-on; 772 regulator-min-microvolt = <1800000>; 773 regulator-max-microvolt = <1800000>; 774 regulator-name = "vcc1v8_dvp"; 775 regulator-state-mem { 776 regulator-off-in-suspend; 777 }; 778 }; 779 780 vcc2v8_dvp: LDO_REG9 { 781 regulator-always-on; 782 regulator-boot-on; 783 regulator-min-microvolt = <2800000>; 784 regulator-max-microvolt = <2800000>; 785 regulator-name = "vcc2v8_dvp"; 786 regulator-state-mem { 787 regulator-off-in-suspend; 788 }; 789 }; 790 791 dcdc_boost: BOOST { 792 regulator-always-on; 793 regulator-boot-on; 794 regulator-min-microvolt = <4700000>; 795 regulator-max-microvolt = <5400000>; 796 regulator-name = "boost"; 797 regulator-state-mem { 798 regulator-off-in-suspend; 799 }; 800 }; 801 802 otg_switch: OTG_SWITCH { 803 regulator-name = "otg_switch"; 804 regulator-state-mem { 805 regulator-off-in-suspend; 806 }; 807 }; 808 }; 809 810 battery { 811 compatible = "rk817,battery"; 812 ocv_table = <3400 3513 3578 3687 3734 3752 3763 813 3766 3771 3784 3804 3836 3885 3925 814 3962 4005 4063 4114 4169 4227 4303>; 815 design_capacity = <5000>; 816 design_qmax = <5500>; 817 bat_res = <100>; 818 sleep_enter_current = <150>; 819 sleep_exit_current = <180>; 820 sleep_filter_current = <100>; 821 power_off_thresd = <3450>; 822 zero_algorithm_vol = <3850>; 823 max_soc_offset = <60>; 824 monitor_sec = <5>; 825 sample_res = <10>; 826 virtual_power = <0>; 827 }; 828 829 charger { 830 compatible = "rk817,charger"; 831 min_input_voltage = <4500>; 832 max_input_current = <1500>; 833 max_chrg_current = <2000>; 834 max_chrg_voltage = <4300>; 835 chrg_term_mode = <0>; 836 chrg_finish_cur = <300>; 837 virtual_power = <0>; 838 dc_det_adc = <0>; 839 extcon = <&usb2phy0>; 840 }; 841 842 rk817_codec: codec { 843 #sound-dai-cells = <0>; 844 compatible = "rockchip,rk817-codec"; 845 clocks = <&cru I2S1_MCLKOUT>; 846 clock-names = "mclk"; 847 assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; 848 assigned-clock-rates = <12288000>; 849 assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; 850 pinctrl-names = "default"; 851 pinctrl-0 = <&i2s1m0_mclk>; 852 hp-volume = <20>; 853 spk-volume = <3>; 854 out-l2spk-r2hp; 855 spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 856 status = "okay"; 857 }; 858 }; 859}; 860 861&i2c2 { 862 status = "okay"; 863 pinctrl-0 = <&i2c2m1_xfer>; 864 865 dw9714: dw9714@c { 866 compatible = "dongwoon,dw9714"; 867 status = "okay"; 868 reg = <0x0c>; 869 rockchip,camera-module-index = <0>; 870 rockchip,vcm-start-current = <10>; 871 rockchip,vcm-rated-current = <85>; 872 rockchip,vcm-step-mode = <5>; 873 rockchip,camera-module-facing = "back"; 874 }; 875 876 gc2385: gc2385@37 { 877 compatible = "galaxycore,gc2385"; 878 status = "okay"; 879 reg = <0x37>; 880 clocks = <&cru CLK_CIF_OUT>; 881 clock-names = "xvclk"; 882 power-domains = <&power RK3568_PD_VI>; 883 pinctrl-names = "rockchip,camera_default"; 884 pinctrl-0 = <&cif_clk>; 885 886 //reset pin control by hardware,used this pin switch to mipi input 887 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 888 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 889 pwdn-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 890 rockchip,camera-module-index = <1>; 891 rockchip,camera-module-facing = "front"; 892 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 893 rockchip,camera-module-lens-name = "default"; 894 port { 895 gc2385_out: endpoint { 896 remote-endpoint = <&mipi_in_ucam0>; 897 data-lanes = <1>; 898 }; 899 }; 900 }; 901 902 ov8858: ov8858@36 { 903 status = "okay"; 904 compatible = "ovti,ov8858"; 905 reg = <0x36>; 906 clocks = <&cru CLK_CAM0_OUT>; 907 clock-names = "xvclk"; 908 power-domains = <&power RK3568_PD_VI>; 909 pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep"; 910 pinctrl-0 = <&cam_clkout0>; 911 pinctrl-1 = <&cam_sleep>; 912 //reset pin control by hardware,used this pin switch to mipi input 913 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 914 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 915 pwdn-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 916 rockchip,camera-module-index = <0>; 917 rockchip,camera-module-facing = "back"; 918 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 919 rockchip,camera-module-lens-name = "default"; 920 flash-leds = <&flash_rgb13h>; 921 lens-focus = <&dw9714>; 922 port { 923 ov8858_out: endpoint { 924 remote-endpoint = <&mipi_in_ucam1>; 925 data-lanes = <1 2 3 4>; 926 }; 927 }; 928 }; 929}; 930 931&i2c3 { 932 status = "okay"; 933 pinctrl-names = "default"; 934 pinctrl-0 = <&i2c3m1_xfer>; 935 clock-frequency = <400000>; 936 i2c-scl-rising-time-ns = <138>; 937 i2c-scl-falling-time-ns = <4>; 938 939 gt9xx: gt9xx@14 { 940 compatible = "goodix,gt9xx"; 941 reg = <0x14>; 942 pinctrl-names = "default"; 943 pinctrl-0 = <>9xx_gpio>; 944 touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 945 reset-gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 946 max-x = <1200>; 947 max-y = <1920>; 948 tp-size = <9110>; 949 tp-supply = <&vcc_3v3>; 950 }; 951}; 952 953&i2c5 { 954 status = "okay"; 955 clock-frequency = <400000>; 956 i2c-scl-rising-time-ns = <144>; 957 i2c-scl-falling-time-ns = <4>; 958 959 sensor@4c { 960 compatible = "gs_mc3230"; 961 reg = <0x4c>; 962 type = <SENSOR_TYPE_ACCEL>; 963 irq_enable = <0>; 964 poll_delay_ms = <30>; 965 layout = <9>; 966 reprobe_en = <1>; 967 pinctrl-names = "default"; 968 pinctrl-0 = <&sensor_gpio>; 969 irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_LEVEL_LOW>; 970 }; 971}; 972 973&i2s0_8ch { 974 status = "okay"; 975}; 976 977&i2s1_8ch { 978 status = "okay"; 979 rockchip,clk-trcm = <1>; 980 pinctrl-names = "default"; 981 pinctrl-0 = <&i2s1m0_sclktx 982 &i2s1m0_lrcktx 983 &i2s1m0_sdi0 984 &i2s1m0_sdo0>; 985}; 986 987&jpegd { 988 status = "okay"; 989}; 990 991&jpegd_mmu { 992 status = "okay"; 993}; 994 995&video_phy0 { 996 status = "okay"; 997}; 998 999&mpp_srv { 1000 status = "okay"; 1001}; 1002 1003&nandc0 { 1004 status = "okay"; 1005}; 1006 1007&pinctrl { 1008 cam { 1009 cam_clkout0: cam-clkout0 { 1010 rockchip,pins = 1011 /* cam_clkout0 */ 1012 <4 RK_PA7 1 &pcfg_pull_none>; 1013 }; 1014 1015 cam_sleep: cam-sleep { 1016 rockchip,pins = 1017 /* cam_sleep */ 1018 <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 1019 }; 1020 1021 camera_rst: camera-rst { 1022 rockchip,pins = 1023 /* front camera reset */ 1024 <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 1025 /* back camra reset */ 1026 <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1027 }; 1028 1029 flash_led_gpios: flash-led { 1030 rockchip,pins = 1031 /* flash led enable */ 1032 <4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 1033 }; 1034 }; 1035 1036 gt9xx { 1037 gt9xx_gpio: gt9xx-gpio { 1038 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 1039 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1040 }; 1041 }; 1042 1043 headphone { 1044 hp_det: hp-det { 1045 rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 1046 }; 1047 }; 1048 1049 lcd { 1050 lcd_rst_gpio: lcd-rst-gpio { 1051 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 1052 }; 1053 1054 lcd_enable_gpio: lcd-enable-gpio { 1055 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 1056 }; 1057 1058 lcd_stanby_gpio: lcd-stanby-gpio { 1059 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 1060 }; 1061 }; 1062 1063 pmic { 1064 pmic_int: pmic_int { 1065 rockchip,pins = 1066 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 1067 }; 1068 1069 soc_slppin_gpio: soc_slppin_gpio { 1070 rockchip,pins = 1071 <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; 1072 }; 1073 1074 soc_slppin_slp: soc_slppin_slp { 1075 rockchip,pins = 1076 <0 RK_PA2 1 &pcfg_pull_none>; 1077 }; 1078 1079 soc_slppin_rst: soc_slppin_rst { 1080 rockchip,pins = 1081 <0 RK_PA2 2 &pcfg_pull_none>; 1082 }; 1083 }; 1084 1085 sensor { 1086 sensor_gpio: sensor-gpio { 1087 rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 1088 }; 1089 }; 1090 1091 sdio-pwrseq { 1092 wifi_enable_h: wifi-enable-h { 1093 rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1094 }; 1095 }; 1096 1097 vcc_sd { 1098 vcc_sd_h: vcc-sd-h { 1099 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 1100 }; 1101 }; 1102 1103 sdmmc0 { 1104 sdmmc0_det_gpio: sdmmc0-det-gpio { 1105 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 1106 }; 1107 }; 1108 1109 usb { 1110 vcc5v0_host_en: vcc5v0-host-en { 1111 rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 1112 }; 1113 }; 1114 1115 wireless-wlan { 1116 wifi_host_wake_irq: wifi-host-wake-irq { 1117 rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 1118 }; 1119 }; 1120 1121 wireless-bluetooth { 1122 uart1_gpios: uart1-gpios { 1123 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 1124 }; 1125 }; 1126}; 1127 1128&pmu_io_domains { 1129 status = "okay"; 1130 pmuio1-supply = <&vcc3v3_pmu>; 1131 pmuio2-supply = <&vcc3v3_pmu>; 1132 vccio1-supply = <&vccio_acodec>; 1133 vccio3-supply = <&vccio_sd>; 1134 vccio4-supply = <&vcc3v3_pmu>; 1135 vccio5-supply = <&vcc_1v8>; 1136 vccio6-supply = <&vcc1v8_dvp>; 1137 vccio7-supply = <&vcc_3v3>; 1138}; 1139 1140&pwm4 { 1141 status = "okay"; 1142}; 1143 1144&rk_rga { 1145 status = "okay"; 1146}; 1147 1148&rkisp { 1149 status = "okay"; 1150}; 1151 1152&rkisp_mmu { 1153 status = "okay"; 1154}; 1155 1156&rkisp_vir0 { 1157 status = "okay"; 1158 1159 port { 1160 #address-cells = <1>; 1161 #size-cells = <0>; 1162 1163 isp0_in: endpoint@0 { 1164 reg = <0>; 1165 remote-endpoint = <&csidphy0_out>; 1166 }; 1167 }; 1168}; 1169 1170&rkvdec { 1171 status = "okay"; 1172}; 1173 1174&rkvdec_mmu { 1175 status = "okay"; 1176}; 1177 1178&rkvenc { 1179 status = "okay"; 1180}; 1181 1182&rkvenc_mmu { 1183 status = "okay"; 1184}; 1185 1186&route_dsi0 { 1187 status = "okay"; 1188}; 1189 1190&route_hdmi { 1191 status = "okay"; 1192 connect = <&vp0_out_hdmi>; 1193}; 1194 1195&saradc { 1196 status = "okay"; 1197 vref-supply = <&vcc_1v8>; 1198}; 1199 1200&sdhci { 1201 bus-width = <8>; 1202 no-sdio; 1203 no-sd; 1204 non-removable; 1205 max-frequency = <200000000>; 1206 status = "okay"; 1207}; 1208 1209&sdmmc0 { 1210 max-frequency = <150000000>; 1211 no-sdio; 1212 no-mmc; 1213 bus-width = <4>; 1214 cap-mmc-highspeed; 1215 cap-sd-highspeed; 1216 disable-wp; 1217 sd-uhs-sdr104; 1218 vmmc-supply = <&vcc_sd>; 1219 vqmmc-supply = <&vccio_sd>; 1220 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 1221 pinctrl-names = "default"; 1222 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det_gpio>; 1223 status = "okay"; 1224}; 1225 1226&sdmmc1 { 1227 max-frequency = <150000000>; 1228 no-sd; 1229 no-mmc; 1230 bus-width = <4>; 1231 disable-wp; 1232 cap-sd-highspeed; 1233 cap-sdio-irq; 1234 keep-power-in-suspend; 1235 mmc-pwrseq = <&sdio_pwrseq>; 1236 non-removable; 1237 pinctrl-names = "default"; 1238 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 1239 sd-uhs-sdr104; 1240 rockchip,default-sample-phase = <90>; 1241 status = "okay"; 1242}; 1243 1244&tsadc { 1245 status = "okay"; 1246}; 1247 1248&uart1 { 1249 status = "okay"; 1250 pinctrl-names = "default"; 1251 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 1252}; 1253 1254&u2phy0_host { 1255 phy-supply = <&vcc5v0_host>; 1256 status = "okay"; 1257}; 1258 1259&u2phy0_otg { 1260 status = "okay"; 1261}; 1262 1263&usb2phy0 { 1264 status = "okay"; 1265}; 1266 1267&usbdrd_dwc3 { 1268 status = "okay"; 1269}; 1270 1271&usbdrd30 { 1272 status = "okay"; 1273}; 1274 1275&usbhost30 { 1276 status = "okay"; 1277}; 1278 1279&usbhost_dwc3 { 1280 phys = <&u2phy0_host>; 1281 phy-names = "usb2-phy"; 1282 maximum-speed = "high-speed"; 1283 status = "okay"; 1284}; 1285 1286&vdpu { 1287 status = "okay"; 1288}; 1289 1290&vdpu_mmu { 1291 status = "okay"; 1292}; 1293 1294&vepu { 1295 status = "okay"; 1296}; 1297 1298&vepu_mmu { 1299 status = "okay"; 1300}; 1301 1302&vop { 1303 status = "okay"; 1304}; 1305 1306&vop_mmu { 1307 status = "okay"; 1308}; 1309