xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/rk-input.h>
12*4882a593Smuzhiyun#include <dt-bindings/sensor-dev.h>
13*4882a593Smuzhiyun#include <dt-bindings/display/drm_mipi_dsi.h>
14*4882a593Smuzhiyun#include "rk3566.dtsi"
15*4882a593Smuzhiyun#include "rk3568-android.dtsi"
16*4882a593Smuzhiyun#include "rk3566-eink.dtsi"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun/ {
19*4882a593Smuzhiyun	model = "Rockchip RK3566 RK817 EINK LP4X Board";
20*4882a593Smuzhiyun	compatible = "rockchip,rk3566-rk817-eink", "rockchip,rk3566";
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	charge-animation {
23*4882a593Smuzhiyun		compatible = "rockchip,uboot-charge";
24*4882a593Smuzhiyun		rockchip,uboot-charge-on = <1>;
25*4882a593Smuzhiyun		rockchip,android-charge-on = <0>;
26*4882a593Smuzhiyun		rockchip,uboot-low-power-voltage = <3350>;
27*4882a593Smuzhiyun		rockchip,screen-on-voltage = <3400>;
28*4882a593Smuzhiyun		rockchip,auto-wakeup-interval = <60>;
29*4882a593Smuzhiyun		status = "okay";
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	adc_keys: adc-keys {
33*4882a593Smuzhiyun		status = "disabled";
34*4882a593Smuzhiyun		compatible = "adc-keys";
35*4882a593Smuzhiyun		io-channels = <&saradc 0>;
36*4882a593Smuzhiyun		io-channel-names = "buttons";
37*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
38*4882a593Smuzhiyun		poll-interval = <100>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		vol-up-key {
41*4882a593Smuzhiyun			label = "volume up";
42*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
43*4882a593Smuzhiyun			press-threshold-microvolt = <1750>;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		vol-down-key {
47*4882a593Smuzhiyun			label = "volume down";
48*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
49*4882a593Smuzhiyun			press-threshold-microvolt = <297500>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	hdmi_sound: hdmi-sound {
54*4882a593Smuzhiyun		compatible = "simple-audio-card";
55*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
56*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <128>;
57*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,hdmi";
58*4882a593Smuzhiyun		status = "disabled";
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		simple-audio-card,cpu {
61*4882a593Smuzhiyun				sound-dai = <&i2s0_8ch>;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun		simple-audio-card,codec {
64*4882a593Smuzhiyun				sound-dai = <&hdmi>;
65*4882a593Smuzhiyun		};
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	vccsys: vccsys {
69*4882a593Smuzhiyun		compatible = "regulator-fixed";
70*4882a593Smuzhiyun		regulator-name = "vcc3v8_sys";
71*4882a593Smuzhiyun		regulator-always-on;
72*4882a593Smuzhiyun		regulator-boot-on;
73*4882a593Smuzhiyun		regulator-min-microvolt = <3800000>;
74*4882a593Smuzhiyun		regulator-max-microvolt = <3800000>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	rk817-sound {
78*4882a593Smuzhiyun		compatible = "rockchip,multicodecs-card";
79*4882a593Smuzhiyun		rockchip,card-name = "rockchip-rk817";
80*4882a593Smuzhiyun		hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
81*4882a593Smuzhiyun		rockchip,format = "i2s";
82*4882a593Smuzhiyun		rockchip,mclk-fs = <256>;
83*4882a593Smuzhiyun		rockchip,cpu = <&i2s1_8ch>;
84*4882a593Smuzhiyun		rockchip,codec = <&rk817_codec>;
85*4882a593Smuzhiyun		pinctrl-names = "default";
86*4882a593Smuzhiyun		pinctrl-0 = <&hp_det>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
90*4882a593Smuzhiyun		status = "disabled";
91*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
92*4882a593Smuzhiyun		clocks = <&rk817 1>;
93*4882a593Smuzhiyun		clock-names = "ext_clock";
94*4882a593Smuzhiyun		pinctrl-names = "default";
95*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		/*
98*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
99*4882a593Smuzhiyun		 * on the actual card populated):
100*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
101*4882a593Smuzhiyun		 * - PDN (power down when low)
102*4882a593Smuzhiyun		 */
103*4882a593Smuzhiyun		post-power-on-delay-ms = <200>;
104*4882a593Smuzhiyun		reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	vcc_sd: vcc-sd {
108*4882a593Smuzhiyun		compatible = "regulator-gpio";
109*4882a593Smuzhiyun		enable-active-low;
110*4882a593Smuzhiyun		enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
111*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
112*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
113*4882a593Smuzhiyun		pinctrl-names = "default";
114*4882a593Smuzhiyun		pinctrl-0 = <&vcc_sd_h>;
115*4882a593Smuzhiyun		regulator-name = "vcc_sd";
116*4882a593Smuzhiyun		states = <3300000 0x0
117*4882a593Smuzhiyun			3300000 0x1>;
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	wireless-wlan {
121*4882a593Smuzhiyun		compatible = "wlan-platdata";
122*4882a593Smuzhiyun		rockchip,grf = <&grf>;
123*4882a593Smuzhiyun		wifi_chip_type = "ap6255";
124*4882a593Smuzhiyun		pinctrl-names = "default";
125*4882a593Smuzhiyun		pinctrl-0 = <&wifi_host_wake_irq>;
126*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
127*4882a593Smuzhiyun		status = "disabled";
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun	wireless-bluetooth {
131*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
132*4882a593Smuzhiyun		clocks = <&rk817 1>;
133*4882a593Smuzhiyun		clock-names = "ext_clock";
134*4882a593Smuzhiyun		//wifi-bt-power-toggle;
135*4882a593Smuzhiyun		uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
136*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
137*4882a593Smuzhiyun		pinctrl-0 = <&uart1m0_rtsn>;
138*4882a593Smuzhiyun		pinctrl-1 = <&uart1_gpios>;
139*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
140*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
141*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
142*4882a593Smuzhiyun		status = "disabled";
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&ebc {
147*4882a593Smuzhiyun	/* clock rate 1000M/n, (n=1~32) */
148*4882a593Smuzhiyun	assigned-clocks = <&cru CPLL_333M>, <&cru DCLK_EBC>;
149*4882a593Smuzhiyun	assigned-clock-rates = <250000000>, <250000000>;
150*4882a593Smuzhiyun	status = "okay";
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&ebc_dev {
154*4882a593Smuzhiyun	pmic = <&tps65185>;
155*4882a593Smuzhiyun	status = "okay";
156*4882a593Smuzhiyun#if 0
157*4882a593Smuzhiyun	/* ED097TC2U1 */
158*4882a593Smuzhiyun	panel,width = <1200>;
159*4882a593Smuzhiyun	panel,height = <825>;
160*4882a593Smuzhiyun	panel,vir_width = <1200>;
161*4882a593Smuzhiyun	panel,vir_height = <825>;
162*4882a593Smuzhiyun	panel,sdck = <25000000>;
163*4882a593Smuzhiyun	panel,lsl = <4>;
164*4882a593Smuzhiyun	panel,lbl = <4>;
165*4882a593Smuzhiyun	panel,ldl = <300>;
166*4882a593Smuzhiyun	panel,lel = <36>;
167*4882a593Smuzhiyun	panel,gdck-sta = <18>;
168*4882a593Smuzhiyun	panel,lgonl = <265>;
169*4882a593Smuzhiyun	panel,fsl = <2>;
170*4882a593Smuzhiyun	panel,fbl = <4>;
171*4882a593Smuzhiyun	panel,fdl = <825>;
172*4882a593Smuzhiyun	panel,fel = <24>;
173*4882a593Smuzhiyun	panel,mirror = <0>;
174*4882a593Smuzhiyun	panel,panel_16bit = <0>;
175*4882a593Smuzhiyun	panel,panel_color = <0>;
176*4882a593Smuzhiyun	panel,width-mm = <203>;
177*4882a593Smuzhiyun	panel,height-mm = <140>;
178*4882a593Smuzhiyun#else
179*4882a593Smuzhiyun	/* ES103TC1 */
180*4882a593Smuzhiyun	panel,width = <1872>;
181*4882a593Smuzhiyun	panel,height = <1404>;
182*4882a593Smuzhiyun	panel,vir_width = <1872>;
183*4882a593Smuzhiyun	panel,vir_height = <1404>;
184*4882a593Smuzhiyun	panel,sdck = <33300000>;
185*4882a593Smuzhiyun	panel,lsl = <18>;
186*4882a593Smuzhiyun	panel,lbl = <17>;
187*4882a593Smuzhiyun	panel,ldl = <234>;
188*4882a593Smuzhiyun	panel,lel = <7>;
189*4882a593Smuzhiyun	panel,gdck-sta = <34>;
190*4882a593Smuzhiyun	panel,lgonl = <192>;
191*4882a593Smuzhiyun	panel,fsl = <1>;
192*4882a593Smuzhiyun	panel,fbl = <4>;
193*4882a593Smuzhiyun	panel,fdl = <1404>;
194*4882a593Smuzhiyun	panel,fel = <12>;
195*4882a593Smuzhiyun	panel,mirror = <0>;
196*4882a593Smuzhiyun	panel,panel_16bit = <1>;
197*4882a593Smuzhiyun	panel,panel_color = <0>;
198*4882a593Smuzhiyun	panel,width-mm = <157>;
199*4882a593Smuzhiyun	panel,height-mm = <210>;
200*4882a593Smuzhiyun#endif
201*4882a593Smuzhiyun};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun&cpu0 {
204*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&gpu {
208*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
209*4882a593Smuzhiyun	status = "okay";
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&hdmi {
213*4882a593Smuzhiyun	status = "disabled";
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&hdmi_in_vp0 {
217*4882a593Smuzhiyun	status = "disabled";
218*4882a593Smuzhiyun};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun&hdmi_in_vp1 {
221*4882a593Smuzhiyun	status = "disabled";
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&hdmi_sound {
225*4882a593Smuzhiyun	status = "disabled";
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&i2c0 {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	vdd_cpu: tcs4525@1c {
232*4882a593Smuzhiyun		compatible = "tcs,tcs4525";
233*4882a593Smuzhiyun		reg = <0x1c>;
234*4882a593Smuzhiyun		vin-supply = <&vccsys>;
235*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
236*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
237*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
238*4882a593Smuzhiyun		regulator-max-microvolt = <1390000>;
239*4882a593Smuzhiyun		regulator-init-microvolt = <900000>;
240*4882a593Smuzhiyun		regulator-ramp-delay = <2300>;
241*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
242*4882a593Smuzhiyun		regulator-boot-on;
243*4882a593Smuzhiyun		regulator-always-on;
244*4882a593Smuzhiyun		regulator-state-mem {
245*4882a593Smuzhiyun			regulator-off-in-suspend;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	rk817: pmic@20 {
250*4882a593Smuzhiyun		compatible = "rockchip,rk817";
251*4882a593Smuzhiyun		reg = <0x20>;
252*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
253*4882a593Smuzhiyun		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-sleep",
256*4882a593Smuzhiyun				"pmic-power-off", "pmic-reset";
257*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
258*4882a593Smuzhiyun		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
259*4882a593Smuzhiyun		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
260*4882a593Smuzhiyun		pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
261*4882a593Smuzhiyun		rockchip,system-power-controller;
262*4882a593Smuzhiyun		wakeup-source;
263*4882a593Smuzhiyun		#clock-cells = <1>;
264*4882a593Smuzhiyun		clock-output-names = "rk808-clkout1", "rk808-clkout2";
265*4882a593Smuzhiyun		//fb-inner-reg-idxs = <2>;
266*4882a593Smuzhiyun		/* 1: rst regs (default in codes), 0: rst the pmic */
267*4882a593Smuzhiyun		pmic-reset-func = <0>;
268*4882a593Smuzhiyun		/* not save the PMIC_POWER_EN register in uboot */
269*4882a593Smuzhiyun		not-save-power-en = <1>;
270*4882a593Smuzhiyun		vcc1-supply = <&vccsys>;
271*4882a593Smuzhiyun		vcc2-supply = <&vccsys>;
272*4882a593Smuzhiyun		vcc3-supply = <&vccsys>;
273*4882a593Smuzhiyun		vcc4-supply = <&vccsys>;
274*4882a593Smuzhiyun		vcc5-supply = <&vccsys>;
275*4882a593Smuzhiyun		vcc6-supply = <&vccsys>;
276*4882a593Smuzhiyun		vcc7-supply = <&vccsys>;
277*4882a593Smuzhiyun		vcc8-supply = <&vccsys>;
278*4882a593Smuzhiyun		vcc9-supply = <&dcdc_boost>;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun		pwrkey {
281*4882a593Smuzhiyun			status = "okay";
282*4882a593Smuzhiyun		};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun		pinctrl_rk8xx: pinctrl_rk8xx {
285*4882a593Smuzhiyun			gpio-controller;
286*4882a593Smuzhiyun			#gpio-cells = <2>;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun			rk817_slppin_null: rk817_slppin_null {
289*4882a593Smuzhiyun				pins = "gpio_slp";
290*4882a593Smuzhiyun				function = "pin_fun0";
291*4882a593Smuzhiyun			};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun			rk817_slppin_slp: rk817_slppin_slp {
294*4882a593Smuzhiyun				pins = "gpio_slp";
295*4882a593Smuzhiyun				function = "pin_fun1";
296*4882a593Smuzhiyun			};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
299*4882a593Smuzhiyun				pins = "gpio_slp";
300*4882a593Smuzhiyun				function = "pin_fun2";
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun			rk817_slppin_rst: rk817_slppin_rst {
304*4882a593Smuzhiyun				pins = "gpio_slp";
305*4882a593Smuzhiyun				function = "pin_fun3";
306*4882a593Smuzhiyun			};
307*4882a593Smuzhiyun		};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun		regulators {
310*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
311*4882a593Smuzhiyun				regulator-always-on;
312*4882a593Smuzhiyun				regulator-boot-on;
313*4882a593Smuzhiyun				regulator-min-microvolt = <500000>;
314*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
315*4882a593Smuzhiyun				regulator-init-microvolt = <900000>;
316*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
317*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
318*4882a593Smuzhiyun				regulator-name = "vdd_logic";
319*4882a593Smuzhiyun				regulator-state-mem {
320*4882a593Smuzhiyun					regulator-off-in-suspend;
321*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
322*4882a593Smuzhiyun				};
323*4882a593Smuzhiyun			};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
326*4882a593Smuzhiyun				regulator-always-on;
327*4882a593Smuzhiyun				regulator-boot-on;
328*4882a593Smuzhiyun				regulator-min-microvolt = <500000>;
329*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
330*4882a593Smuzhiyun				regulator-init-microvolt = <900000>;
331*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
332*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
333*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
334*4882a593Smuzhiyun					regulator-state-mem {
335*4882a593Smuzhiyun					regulator-off-in-suspend;
336*4882a593Smuzhiyun				};
337*4882a593Smuzhiyun			};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
340*4882a593Smuzhiyun				regulator-always-on;
341*4882a593Smuzhiyun				regulator-boot-on;
342*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
343*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
344*4882a593Smuzhiyun				regulator-state-mem {
345*4882a593Smuzhiyun					regulator-on-in-suspend;
346*4882a593Smuzhiyun				};
347*4882a593Smuzhiyun			};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun			vcc_3v3: DCDC_REG4 {
350*4882a593Smuzhiyun				regulator-always-on;
351*4882a593Smuzhiyun				regulator-boot-on;
352*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
353*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
354*4882a593Smuzhiyun				regulator-initial-mode = <0x2>;
355*4882a593Smuzhiyun				regulator-name = "vcc_3v3";
356*4882a593Smuzhiyun				regulator-state-mem {
357*4882a593Smuzhiyun					regulator-off-in-suspend;
358*4882a593Smuzhiyun				};
359*4882a593Smuzhiyun			};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun			vcca1v8_pmu: LDO_REG1 {
362*4882a593Smuzhiyun				regulator-always-on;
363*4882a593Smuzhiyun				regulator-boot-on;
364*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
365*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
366*4882a593Smuzhiyun				regulator-name = "vcca1v8_pmu";
367*4882a593Smuzhiyun				regulator-state-mem {
368*4882a593Smuzhiyun					regulator-on-in-suspend;
369*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
370*4882a593Smuzhiyun				};
371*4882a593Smuzhiyun			};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun			vdda_0v9: LDO_REG2 {
374*4882a593Smuzhiyun				regulator-always-on;
375*4882a593Smuzhiyun				regulator-boot-on;
376*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
377*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
378*4882a593Smuzhiyun				regulator-name = "vdda_0v9";
379*4882a593Smuzhiyun				regulator-state-mem {
380*4882a593Smuzhiyun					regulator-off-in-suspend;
381*4882a593Smuzhiyun				};
382*4882a593Smuzhiyun			};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun			vdda0v9_pmu: LDO_REG3 {
385*4882a593Smuzhiyun				regulator-always-on;
386*4882a593Smuzhiyun				regulator-boot-on;
387*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
388*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
389*4882a593Smuzhiyun				regulator-name = "vdda0v9_pmu";
390*4882a593Smuzhiyun				regulator-state-mem {
391*4882a593Smuzhiyun					regulator-on-in-suspend;
392*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
393*4882a593Smuzhiyun				};
394*4882a593Smuzhiyun			};
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun			vccio_acodec: LDO_REG4 {
397*4882a593Smuzhiyun				regulator-always-on;
398*4882a593Smuzhiyun				regulator-boot-on;
399*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
400*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
401*4882a593Smuzhiyun				regulator-name = "vccio_acodec";
402*4882a593Smuzhiyun				regulator-state-mem {
403*4882a593Smuzhiyun					regulator-off-in-suspend;
404*4882a593Smuzhiyun				};
405*4882a593Smuzhiyun			};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
408*4882a593Smuzhiyun				regulator-always-on;
409*4882a593Smuzhiyun				regulator-boot-on;
410*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
411*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
412*4882a593Smuzhiyun				regulator-name = "vccio_sd";
413*4882a593Smuzhiyun				regulator-state-mem {
414*4882a593Smuzhiyun					regulator-off-in-suspend;
415*4882a593Smuzhiyun				};
416*4882a593Smuzhiyun			};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun			vcc3v3_pmu: LDO_REG6 {
419*4882a593Smuzhiyun				regulator-always-on;
420*4882a593Smuzhiyun				regulator-boot-on;
421*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
422*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
423*4882a593Smuzhiyun				regulator-name = "vcc3v3_pmu";
424*4882a593Smuzhiyun				regulator-state-mem {
425*4882a593Smuzhiyun					regulator-on-in-suspend;
426*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
427*4882a593Smuzhiyun				};
428*4882a593Smuzhiyun			};
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun			vcc_1v8: LDO_REG7 {
431*4882a593Smuzhiyun				regulator-always-on;
432*4882a593Smuzhiyun				regulator-boot-on;
433*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
434*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
435*4882a593Smuzhiyun				regulator-name = "vcc_1v8";
436*4882a593Smuzhiyun				regulator-state-mem {
437*4882a593Smuzhiyun					regulator-off-in-suspend;
438*4882a593Smuzhiyun				};
439*4882a593Smuzhiyun			};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun			vcc1v8_dvp: LDO_REG8 {
442*4882a593Smuzhiyun				regulator-always-on;
443*4882a593Smuzhiyun				regulator-boot-on;
444*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
445*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
446*4882a593Smuzhiyun				regulator-name = "vcc1v8_dvp";
447*4882a593Smuzhiyun				regulator-state-mem {
448*4882a593Smuzhiyun					regulator-off-in-suspend;
449*4882a593Smuzhiyun				};
450*4882a593Smuzhiyun			};
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun			vcc2v8_dvp: LDO_REG9 {
453*4882a593Smuzhiyun				regulator-always-on;
454*4882a593Smuzhiyun				regulator-boot-on;
455*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
456*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
457*4882a593Smuzhiyun				regulator-name = "vcc2v8_dvp";
458*4882a593Smuzhiyun				regulator-state-mem {
459*4882a593Smuzhiyun					regulator-off-in-suspend;
460*4882a593Smuzhiyun				};
461*4882a593Smuzhiyun			};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun			dcdc_boost: BOOST {
464*4882a593Smuzhiyun				regulator-always-on;
465*4882a593Smuzhiyun				regulator-boot-on;
466*4882a593Smuzhiyun				regulator-min-microvolt = <4700000>;
467*4882a593Smuzhiyun				regulator-max-microvolt = <5400000>;
468*4882a593Smuzhiyun				regulator-name = "boost";
469*4882a593Smuzhiyun				regulator-state-mem {
470*4882a593Smuzhiyun					regulator-off-in-suspend;
471*4882a593Smuzhiyun				};
472*4882a593Smuzhiyun			};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun			otg_switch: OTG_SWITCH {
475*4882a593Smuzhiyun				regulator-name = "otg_switch";
476*4882a593Smuzhiyun				regulator-state-mem {
477*4882a593Smuzhiyun					regulator-off-in-suspend;
478*4882a593Smuzhiyun				};
479*4882a593Smuzhiyun			};
480*4882a593Smuzhiyun		};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun		battery {
483*4882a593Smuzhiyun			compatible = "rk817,battery";
484*4882a593Smuzhiyun			ocv_table = <3400 3513 3578 3687 3734 3752 3763
485*4882a593Smuzhiyun				     3766 3771 3784 3804 3836 3885 3925
486*4882a593Smuzhiyun				     3962 4005 4063 4114 4169 4227 4303>;
487*4882a593Smuzhiyun			design_capacity = <5000>;
488*4882a593Smuzhiyun			design_qmax = <5500>;
489*4882a593Smuzhiyun			bat_res = <100>;
490*4882a593Smuzhiyun			sleep_enter_current = <150>;
491*4882a593Smuzhiyun			sleep_exit_current = <180>;
492*4882a593Smuzhiyun			sleep_filter_current = <100>;
493*4882a593Smuzhiyun			power_off_thresd = <3450>;
494*4882a593Smuzhiyun			zero_algorithm_vol = <3850>;
495*4882a593Smuzhiyun			max_soc_offset = <60>;
496*4882a593Smuzhiyun			monitor_sec = <5>;
497*4882a593Smuzhiyun			sample_res = <10>;
498*4882a593Smuzhiyun			virtual_power = <0>;
499*4882a593Smuzhiyun		};
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun		charger {
502*4882a593Smuzhiyun			compatible = "rk817,charger";
503*4882a593Smuzhiyun			min_input_voltage = <4500>;
504*4882a593Smuzhiyun			max_input_current = <1500>;
505*4882a593Smuzhiyun			max_chrg_current = <2000>;
506*4882a593Smuzhiyun			max_chrg_voltage = <4300>;
507*4882a593Smuzhiyun			chrg_term_mode = <0>;
508*4882a593Smuzhiyun			chrg_finish_cur = <300>;
509*4882a593Smuzhiyun			virtual_power = <0>;
510*4882a593Smuzhiyun			dc_det_adc = <0>;
511*4882a593Smuzhiyun			extcon = <&usb2phy0>;
512*4882a593Smuzhiyun			gate_function_disable = <1>;
513*4882a593Smuzhiyun		};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun		rk817_codec: codec {
516*4882a593Smuzhiyun			#sound-dai-cells = <0>;
517*4882a593Smuzhiyun			compatible = "rockchip,rk817-codec";
518*4882a593Smuzhiyun			clocks = <&cru I2S1_MCLKOUT>;
519*4882a593Smuzhiyun			clock-names = "mclk";
520*4882a593Smuzhiyun			assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
521*4882a593Smuzhiyun			assigned-clock-rates = <12288000>;
522*4882a593Smuzhiyun			assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
523*4882a593Smuzhiyun			pinctrl-names = "default";
524*4882a593Smuzhiyun			pinctrl-0 = <&i2s1m0_mclk>;
525*4882a593Smuzhiyun			hp-volume = <20>;
526*4882a593Smuzhiyun			spk-volume = <3>;
527*4882a593Smuzhiyun			out-l2spk-r2hp;
528*4882a593Smuzhiyun			spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
529*4882a593Smuzhiyun			status = "okay";
530*4882a593Smuzhiyun		};
531*4882a593Smuzhiyun	};
532*4882a593Smuzhiyun};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun&i2c1 {
535*4882a593Smuzhiyun	status = "okay";
536*4882a593Smuzhiyun	tps65185: tps65185@68 {
537*4882a593Smuzhiyun		status = "okay";
538*4882a593Smuzhiyun		compatible = "ti,tps65185";
539*4882a593Smuzhiyun		reg = <0x68>;
540*4882a593Smuzhiyun		pinctrl-names = "default";
541*4882a593Smuzhiyun		pinctrl-0 = <&tps65185_gpio>;
542*4882a593Smuzhiyun		int-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
543*4882a593Smuzhiyun		wakeup-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
544*4882a593Smuzhiyun		vcomctl-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
545*4882a593Smuzhiyun		powerup-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
546*4882a593Smuzhiyun	};
547*4882a593Smuzhiyun};
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun&i2c2 {
550*4882a593Smuzhiyun	status = "okay";
551*4882a593Smuzhiyun	wacom: wacom@9 {
552*4882a593Smuzhiyun		compatible = "wacom,w9013";
553*4882a593Smuzhiyun		reg = <0x09>;
554*4882a593Smuzhiyun		pinctrl-names = "default";
555*4882a593Smuzhiyun		pinctrl-0 = <&wacom_gpio>;
556*4882a593Smuzhiyun		gpio_detect = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
557*4882a593Smuzhiyun		gpio_intr = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
558*4882a593Smuzhiyun		gpio_rst = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
559*4882a593Smuzhiyun		revert_x = <0>;
560*4882a593Smuzhiyun		revert_y = <0>;
561*4882a593Smuzhiyun		xy_exchange = <0>;
562*4882a593Smuzhiyun	};
563*4882a593Smuzhiyun};
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun&i2c3 {
566*4882a593Smuzhiyun	status = "okay";
567*4882a593Smuzhiyun	pinctrl-names = "default";
568*4882a593Smuzhiyun	pinctrl-0 = <&i2c3m1_xfer>;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun	ts@40 {
571*4882a593Smuzhiyun		compatible = "gslX680-pad";
572*4882a593Smuzhiyun		reg = <0x40>;
573*4882a593Smuzhiyun		touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_LEVEL_HIGH>;
574*4882a593Smuzhiyun		reset-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_HIGH>;
575*4882a593Smuzhiyun		pinctrl-names = "default";
576*4882a593Smuzhiyun		pinctrl-0 = <&tp_gpio>;
577*4882a593Smuzhiyun		screen_max_x = <1200>;
578*4882a593Smuzhiyun		screen_max_y = <1920>;
579*4882a593Smuzhiyun		revert_x = <0>;
580*4882a593Smuzhiyun		revert_y = <1>;
581*4882a593Smuzhiyun		revert_xy = <0>;
582*4882a593Smuzhiyun		chip_id = <1>;
583*4882a593Smuzhiyun		status = "disabled";
584*4882a593Smuzhiyun	};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun	tsc@24 {
587*4882a593Smuzhiyun		status = "okay";
588*4882a593Smuzhiyun		compatible = "cy,cyttsp5_i2c_adapter";
589*4882a593Smuzhiyun		reg = <0x24>;
590*4882a593Smuzhiyun		cy,adapter_id = "cyttsp5_i2c_adapter";
591*4882a593Smuzhiyun		//cytp-supply = <&vcc_sd>;
592*4882a593Smuzhiyun		cy,core {
593*4882a593Smuzhiyun			cy,name = "cyttsp5_core";
594*4882a593Smuzhiyun			pinctrl-names = "default";
595*4882a593Smuzhiyun			pinctrl-0 = <&tsc_gpio>;
596*4882a593Smuzhiyun			cy,irq_gpio =  <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
597*4882a593Smuzhiyun			cy,rst_gpio =  <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
598*4882a593Smuzhiyun			cy,1v8_gpio =  <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
599*4882a593Smuzhiyun			cy,2v8_gpio =  <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
600*4882a593Smuzhiyun			cy,hid_desc_register = <1>;
601*4882a593Smuzhiyun			/* CY_CORE_FLAG_RESTORE_PARAMETERS */
602*4882a593Smuzhiyun			cy,flags = <6>;
603*4882a593Smuzhiyun			/* CY_CORE_EWG_NONE */
604*4882a593Smuzhiyun			cy,easy_wakeup_gesture = <0>;
605*4882a593Smuzhiyun			cy,btn_keys = <172 /* KEY_HOMEPAGE */
606*4882a593Smuzhiyun						/* previously was KEY_HOME, new Android versions use KEY_HOMEPAGE */
607*4882a593Smuzhiyun						139 /* KEY_MENU */
608*4882a593Smuzhiyun						158 /* KEY_BACK */
609*4882a593Smuzhiyun						217 /* KEY_SEARCH */
610*4882a593Smuzhiyun						114 /* KEY_VOLUMEDOWN */
611*4882a593Smuzhiyun						115 /* KEY_VOLUMEUP */
612*4882a593Smuzhiyun						212 /* KEY_CAMERA */
613*4882a593Smuzhiyun						116>; /* KEY_POWER */
614*4882a593Smuzhiyun			cy,btn_keys-tag = <0>;
615*4882a593Smuzhiyun			cy,mt {
616*4882a593Smuzhiyun				cy,name = "cyttsp5_mt";
617*4882a593Smuzhiyun				cy,inp_dev_name = "cyttsp5_mt";
618*4882a593Smuzhiyun				cy,flags = <0>;
619*4882a593Smuzhiyun				cy,abs =
620*4882a593Smuzhiyun					/* ABS_MT_POSITION_X, CY_ABS_MIN_X, CY_ABS_MAX_X, 0, 0 */
621*4882a593Smuzhiyun					<0x35 0 1872 0 0
622*4882a593Smuzhiyun					/* ABS_MT_POSITION_Y, CY_ABS_MIN_Y, CY_ABS_MAX_Y, 0, 0 */
623*4882a593Smuzhiyun					0x36 0 1404 0 0
624*4882a593Smuzhiyun					/* ABS_MT_PRESSURE, CY_ABS_MIN_P, CY_ABS_MAX_P, 0, 0 */
625*4882a593Smuzhiyun					0x3a 0 255 0 0
626*4882a593Smuzhiyun					/* CY_IGNORE_VALUE, CY_ABS_MIN_W, CY_ABS_MAX_W, 0, 0 */
627*4882a593Smuzhiyun					0xffff 0 255 0 0
628*4882a593Smuzhiyun					/* ABS_MT_TRACKING_ID, CY_ABS_MIN_T, CY_ABS_MAX_T, 0, 0 */
629*4882a593Smuzhiyun					0x39 0 15 0 0
630*4882a593Smuzhiyun					/* ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0 */
631*4882a593Smuzhiyun					0x30 0 255 0 0
632*4882a593Smuzhiyun					/* ABS_MT_TOUCH_MINOR, 0, 255, 0, 0 */
633*4882a593Smuzhiyun					0x31 0 255 0 0
634*4882a593Smuzhiyun					/* ABS_MT_ORIENTATION, -127, 127, 0, 0 */
635*4882a593Smuzhiyun					0x34 0xffffff81 127 0 0
636*4882a593Smuzhiyun					/* ABS_MT_TOOL_TYPE, 0, MT_TOOL_MAX, 0, 0 */
637*4882a593Smuzhiyun					0x37 0 1 0 0
638*4882a593Smuzhiyun					/* ABS_DISTANCE, 0, 255, 0, 0 */
639*4882a593Smuzhiyun					0x19 0 255 0 0>;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun					cy,vkeys_x = <1872>;
642*4882a593Smuzhiyun					cy,vkeys_y = <1404>;
643*4882a593Smuzhiyun					cy,revert_x = <0>;
644*4882a593Smuzhiyun					cy,revert_y = <1>;
645*4882a593Smuzhiyun					cy,xy_exchange = <0>;
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun					cy,virtual_keys =
648*4882a593Smuzhiyun						/* KeyCode CenterX CenterY Width Height */
649*4882a593Smuzhiyun						/* KEY_BACK */
650*4882a593Smuzhiyun						<158 1360 90 160 180
651*4882a593Smuzhiyun						/* KEY_MENU */
652*4882a593Smuzhiyun						139 1360 270 160 180
653*4882a593Smuzhiyun						/* KEY_HOMEPAGE */
654*4882a593Smuzhiyun						172 1360 450 160 180
655*4882a593Smuzhiyun						/* KEY SEARCH */
656*4882a593Smuzhiyun						217 1360 630 160 180>;
657*4882a593Smuzhiyun			};
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun			cy,btn {
660*4882a593Smuzhiyun				cy,name = "cyttsp5_btn";
661*4882a593Smuzhiyun				cy,inp_dev_name = "cyttsp5_btn";
662*4882a593Smuzhiyun			};
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun			cy,proximity {
665*4882a593Smuzhiyun				cy,name = "cyttsp5_proximity";
666*4882a593Smuzhiyun				cy,inp_dev_name = "cyttsp5_proximity";
667*4882a593Smuzhiyun				cy,abs =
668*4882a593Smuzhiyun			/* ABS_DISTANCE, CY_PROXIMITY_MIN_VAL, CY_PROXIMITY_MAX_VAL, 0, 0 */
669*4882a593Smuzhiyun					<0x19 0 1 0 0>;
670*4882a593Smuzhiyun			};
671*4882a593Smuzhiyun		};
672*4882a593Smuzhiyun	};
673*4882a593Smuzhiyun};
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun&i2c5 {
676*4882a593Smuzhiyun	status = "disabled";
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun	kxtj: kxtj3@e {
679*4882a593Smuzhiyun		status = "disabled";
680*4882a593Smuzhiyun		compatible = "gs_kxtj9";
681*4882a593Smuzhiyun		pinctrl-names = "default";
682*4882a593Smuzhiyun		pinctrl-0 = <&kxtj3_irq_gpio>;
683*4882a593Smuzhiyun		reg = <0x0e>;
684*4882a593Smuzhiyun		irq-gpio = <&gpio4 RK_PC6 IRQ_TYPE_EDGE_RISING>;
685*4882a593Smuzhiyun		type = <SENSOR_TYPE_ACCEL>;
686*4882a593Smuzhiyun		irq_enable = <0>;
687*4882a593Smuzhiyun		poll_delay_ms = <30>;
688*4882a593Smuzhiyun		power-off-in-suspend = <1>;
689*4882a593Smuzhiyun		layout = <5>;
690*4882a593Smuzhiyun	};
691*4882a593Smuzhiyun};
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun&i2s0_8ch {
694*4882a593Smuzhiyun	status = "disabled";
695*4882a593Smuzhiyun};
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun&i2s1_8ch {
698*4882a593Smuzhiyun	status = "okay";
699*4882a593Smuzhiyun	rockchip,clk-trcm = <1>;
700*4882a593Smuzhiyun	pinctrl-names = "default";
701*4882a593Smuzhiyun	pinctrl-0 = <&i2s1m0_sclktx
702*4882a593Smuzhiyun		     &i2s1m0_lrcktx
703*4882a593Smuzhiyun		     &i2s1m0_sdi0
704*4882a593Smuzhiyun		     &i2s1m0_sdo0>;
705*4882a593Smuzhiyun};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun&jpegd {
708*4882a593Smuzhiyun	status = "okay";
709*4882a593Smuzhiyun};
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun&jpegd_mmu {
712*4882a593Smuzhiyun	status = "okay";
713*4882a593Smuzhiyun};
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun&video_phy0 {
716*4882a593Smuzhiyun	status = "disabled";
717*4882a593Smuzhiyun};
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun&mpp_srv {
720*4882a593Smuzhiyun	status = "okay";
721*4882a593Smuzhiyun};
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun&nandc0 {
724*4882a593Smuzhiyun	status = "disabled";
725*4882a593Smuzhiyun};
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun&pinctrl {
728*4882a593Smuzhiyun	wacom {
729*4882a593Smuzhiyun		wacom_gpio: wacom-gpio {
730*4882a593Smuzhiyun			rockchip,pins =
731*4882a593Smuzhiyun					<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
732*4882a593Smuzhiyun					<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
733*4882a593Smuzhiyun					<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
734*4882a593Smuzhiyun		};
735*4882a593Smuzhiyun	};
736*4882a593Smuzhiyun	tsc {
737*4882a593Smuzhiyun		tsc_gpio: tsc-gpio {
738*4882a593Smuzhiyun			rockchip,pins =
739*4882a593Smuzhiyun					<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
740*4882a593Smuzhiyun					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
741*4882a593Smuzhiyun					<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
742*4882a593Smuzhiyun					<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
743*4882a593Smuzhiyun		};
744*4882a593Smuzhiyun	};
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun	tps_pmic {
747*4882a593Smuzhiyun		tps65185_gpio: tps65185-gpio {
748*4882a593Smuzhiyun			rockchip,pins =
749*4882a593Smuzhiyun					<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
750*4882a593Smuzhiyun					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
751*4882a593Smuzhiyun					<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
752*4882a593Smuzhiyun					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
753*4882a593Smuzhiyun		};
754*4882a593Smuzhiyun	};
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun	tp {
757*4882a593Smuzhiyun		tp_gpio: tp-gpio {
758*4882a593Smuzhiyun			rockchip,pins =
759*4882a593Smuzhiyun				<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
760*4882a593Smuzhiyun				<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
761*4882a593Smuzhiyun		};
762*4882a593Smuzhiyun	};
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun	headphone {
765*4882a593Smuzhiyun		hp_det: hp-det {
766*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
767*4882a593Smuzhiyun		};
768*4882a593Smuzhiyun	};
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun	sensor {
771*4882a593Smuzhiyun		kxtj3_irq_gpio: kxtj3-irq-gpio {
772*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
773*4882a593Smuzhiyun		};
774*4882a593Smuzhiyun	};
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun	pmic {
777*4882a593Smuzhiyun		pmic_int: pmic_int {
778*4882a593Smuzhiyun			rockchip,pins =
779*4882a593Smuzhiyun				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
780*4882a593Smuzhiyun		};
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun		soc_slppin_gpio: soc_slppin_gpio {
783*4882a593Smuzhiyun			rockchip,pins =
784*4882a593Smuzhiyun				<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
785*4882a593Smuzhiyun		};
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun		soc_slppin_slp: soc_slppin_slp {
788*4882a593Smuzhiyun			rockchip,pins =
789*4882a593Smuzhiyun				<0 RK_PA2 1 &pcfg_pull_none>;
790*4882a593Smuzhiyun		};
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun		soc_slppin_rst: soc_slppin_rst {
793*4882a593Smuzhiyun			rockchip,pins =
794*4882a593Smuzhiyun				<0 RK_PA2 2 &pcfg_pull_none>;
795*4882a593Smuzhiyun		};
796*4882a593Smuzhiyun	};
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun	sdio-pwrseq {
799*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
800*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
801*4882a593Smuzhiyun		};
802*4882a593Smuzhiyun	};
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun	vcc_sd {
805*4882a593Smuzhiyun		vcc_sd_h: vcc-sd-h {
806*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
807*4882a593Smuzhiyun		};
808*4882a593Smuzhiyun	};
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun	wireless-wlan {
811*4882a593Smuzhiyun		wifi_host_wake_irq: wifi-host-wake-irq {
812*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
813*4882a593Smuzhiyun		};
814*4882a593Smuzhiyun	};
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun	wireless-bluetooth {
817*4882a593Smuzhiyun		uart1_gpios: uart1-gpios {
818*4882a593Smuzhiyun			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
819*4882a593Smuzhiyun		};
820*4882a593Smuzhiyun	};
821*4882a593Smuzhiyun};
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun&pmu_io_domains {
824*4882a593Smuzhiyun	status = "okay";
825*4882a593Smuzhiyun	pmuio1-supply = <&vcc3v3_pmu>;
826*4882a593Smuzhiyun	pmuio2-supply = <&vcc3v3_pmu>;
827*4882a593Smuzhiyun	vccio1-supply = <&vccio_acodec>;
828*4882a593Smuzhiyun	vccio3-supply = <&vccio_sd>;
829*4882a593Smuzhiyun	vccio4-supply = <&vcc_3v3>;
830*4882a593Smuzhiyun	vccio5-supply = <&vcc_3v3>;
831*4882a593Smuzhiyun	vccio6-supply = <&vcc_3v3>;
832*4882a593Smuzhiyun	vccio7-supply = <&vcc_3v3>;
833*4882a593Smuzhiyun};
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun&pwm4 {
836*4882a593Smuzhiyun	status = "disabled";
837*4882a593Smuzhiyun};
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun&rk_rga {
840*4882a593Smuzhiyun	status = "okay";
841*4882a593Smuzhiyun};
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun&rkvdec {
844*4882a593Smuzhiyun	status = "okay";
845*4882a593Smuzhiyun};
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun&rkvdec_mmu {
848*4882a593Smuzhiyun	status = "okay";
849*4882a593Smuzhiyun};
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun&rkvenc {
852*4882a593Smuzhiyun	status = "okay";
853*4882a593Smuzhiyun};
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun&rkvenc_mmu {
856*4882a593Smuzhiyun	status = "okay";
857*4882a593Smuzhiyun};
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun&saradc {
860*4882a593Smuzhiyun	status = "disabled";
861*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
862*4882a593Smuzhiyun};
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun&sdhci {
865*4882a593Smuzhiyun	bus-width = <8>;
866*4882a593Smuzhiyun	no-sdio;
867*4882a593Smuzhiyun	no-sd;
868*4882a593Smuzhiyun	non-removable;
869*4882a593Smuzhiyun	keep-power-in-suspend;
870*4882a593Smuzhiyun	max-frequency = <200000000>;
871*4882a593Smuzhiyun	status = "okay";
872*4882a593Smuzhiyun};
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun&sdmmc0 {
875*4882a593Smuzhiyun	max-frequency = <50000000>;
876*4882a593Smuzhiyun	no-sdio;
877*4882a593Smuzhiyun	no-mmc;
878*4882a593Smuzhiyun	bus-width = <4>;
879*4882a593Smuzhiyun	cap-mmc-highspeed;
880*4882a593Smuzhiyun	cap-sd-highspeed;
881*4882a593Smuzhiyun	disable-wp;
882*4882a593Smuzhiyun	sd-uhs-sdr104;
883*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
884*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
885*4882a593Smuzhiyun	pinctrl-names = "default";
886*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
887*4882a593Smuzhiyun	status = "okay";
888*4882a593Smuzhiyun};
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun&sdmmc1 {
891*4882a593Smuzhiyun	max-frequency = <150000000>;
892*4882a593Smuzhiyun	no-sd;
893*4882a593Smuzhiyun	no-mmc;
894*4882a593Smuzhiyun	bus-width = <4>;
895*4882a593Smuzhiyun	disable-wp;
896*4882a593Smuzhiyun	cap-sd-highspeed;
897*4882a593Smuzhiyun	cap-sdio-irq;
898*4882a593Smuzhiyun	keep-power-in-suspend;
899*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
900*4882a593Smuzhiyun	non-removable;
901*4882a593Smuzhiyun	pinctrl-names = "default";
902*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
903*4882a593Smuzhiyun	sd-uhs-sdr104;
904*4882a593Smuzhiyun	status = "disabled";
905*4882a593Smuzhiyun};
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun&tsadc {
908*4882a593Smuzhiyun	status = "okay";
909*4882a593Smuzhiyun};
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun&uart1 {
912*4882a593Smuzhiyun	status = "disabled";
913*4882a593Smuzhiyun	pinctrl-names = "default";
914*4882a593Smuzhiyun	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
915*4882a593Smuzhiyun};
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun&u2phy0_otg {
918*4882a593Smuzhiyun	status = "okay";
919*4882a593Smuzhiyun};
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun&usb2phy0 {
922*4882a593Smuzhiyun	status = "okay";
923*4882a593Smuzhiyun};
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun&usbdrd_dwc3 {
926*4882a593Smuzhiyun	status = "okay";
927*4882a593Smuzhiyun};
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun&usbdrd30 {
930*4882a593Smuzhiyun	status = "okay";
931*4882a593Smuzhiyun};
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun&vdpu {
934*4882a593Smuzhiyun	status = "okay";
935*4882a593Smuzhiyun};
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun&vdpu_mmu {
938*4882a593Smuzhiyun	status = "okay";
939*4882a593Smuzhiyun};
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun&vepu {
942*4882a593Smuzhiyun	status = "okay";
943*4882a593Smuzhiyun};
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun&vepu_mmu {
946*4882a593Smuzhiyun	status = "okay";
947*4882a593Smuzhiyun};
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun&vop {
950*4882a593Smuzhiyun	status = "okay";
951*4882a593Smuzhiyun};
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun&vop_mmu {
954*4882a593Smuzhiyun	status = "okay";
955*4882a593Smuzhiyun};
956